Linux patch 4.9.444.9-45

2 files changed, 1685 insertions, 0 deletions

diff --git a/0000_README b/0000_README
index 1e2c0329..88008321 100644
--- a/0000_README
+++ b/0000_README
@@ -215,6 +215,10 @@ Patch:  1042_linux-4.9.43.patch
 From:   http://www.kernel.org
 Desc:   Linux 4.9.43
 
+Patch:  1043_linux-4.9.44.patch
+From:   http://www.kernel.org
+Desc:   Linux 4.9.44
+
 Patch:  1500_XATTR_USER_PREFIX.patch
 From:   https://bugs.gentoo.org/show_bug.cgi?id=470644
 Desc:   Support for namespace user.pax.* on tmpfs.
diff --git a/1043_linux-4.9.44.patch b/1043_linux-4.9.44.patch
new file mode 100644
index 00000000..0c4b48f6
--- /dev/null
+++ b/1043_linux-4.9.44.patch
@@ -0,0 +1,1681 @@
+diff --git a/Makefile b/Makefile
+index 77953bf3f40a..3e95dfdbe572 100644
+--- a/Makefile
++++ b/Makefile
+@@ -1,6 +1,6 @@
+ VERSION = 4
+ PATCHLEVEL = 9
+-SUBLEVEL = 43
++SUBLEVEL = 44
+ EXTRAVERSION =
+ NAME = Roaring Lionus
+ 
+diff --git a/arch/mips/dec/int-handler.S b/arch/mips/dec/int-handler.S
+index 1910223a9c02..cea2bb1621e6 100644
+--- a/arch/mips/dec/int-handler.S
++++ b/arch/mips/dec/int-handler.S
+@@ -147,23 +147,12 @@
+ 		 * Find irq with highest priority
+ 		 */
+ 		# open coded PTR_LA t1, cpu_mask_nr_tbl
+-#if (_MIPS_SZPTR == 32)
++#if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
+ 		# open coded la t1, cpu_mask_nr_tbl
+ 		lui	t1, %hi(cpu_mask_nr_tbl)
+ 		addiu	t1, %lo(cpu_mask_nr_tbl)
+-
+-#endif
+-#if (_MIPS_SZPTR == 64)
+-		# open coded dla t1, cpu_mask_nr_tbl
+-		.set	push
+-		.set	noat
+-		lui	t1, %highest(cpu_mask_nr_tbl)
+-		lui	AT, %hi(cpu_mask_nr_tbl)
+-		daddiu	t1, t1, %higher(cpu_mask_nr_tbl)
+-		daddiu	AT, AT, %lo(cpu_mask_nr_tbl)
+-		dsll	t1, 32
+-		daddu	t1, t1, AT
+-		.set	pop
++#else
++#error GCC `-msym32' option required for 64-bit DECstation builds
+ #endif
+ 1:		lw	t2,(t1)
+ 		nop
+@@ -214,23 +203,12 @@
+ 		 * Find irq with highest priority
+ 		 */
+ 		# open coded PTR_LA t1,asic_mask_nr_tbl
+-#if (_MIPS_SZPTR == 32)
++#if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
+ 		# open coded la t1, asic_mask_nr_tbl
+ 		lui	t1, %hi(asic_mask_nr_tbl)
+ 		addiu	t1, %lo(asic_mask_nr_tbl)
+-
+-#endif
+-#if (_MIPS_SZPTR == 64)
+-		# open coded dla t1, asic_mask_nr_tbl
+-		.set	push
+-		.set	noat
+-		lui	t1, %highest(asic_mask_nr_tbl)
+-		lui	AT, %hi(asic_mask_nr_tbl)
+-		daddiu	t1, t1, %higher(asic_mask_nr_tbl)
+-		daddiu	AT, AT, %lo(asic_mask_nr_tbl)
+-		dsll	t1, 32
+-		daddu	t1, t1, AT
+-		.set	pop
++#else
++#error GCC `-msym32' option required for 64-bit DECstation builds
+ #endif
+ 2:		lw	t2,(t1)
+ 		nop
+diff --git a/arch/xtensa/kernel/xtensa_ksyms.c b/arch/xtensa/kernel/xtensa_ksyms.c
+index 4d2872fd9bb5..a71d2739fa82 100644
+--- a/arch/xtensa/kernel/xtensa_ksyms.c
++++ b/arch/xtensa/kernel/xtensa_ksyms.c
+@@ -94,13 +94,11 @@ unsigned long __sync_fetch_and_or_4(unsigned long *p, unsigned long v)
+ }
+ EXPORT_SYMBOL(__sync_fetch_and_or_4);
+ 
+-#ifdef CONFIG_NET
+ /*
+  * Networking support
+  */
+ EXPORT_SYMBOL(csum_partial);
+ EXPORT_SYMBOL(csum_partial_copy_generic);
+-#endif /* CONFIG_NET */
+ 
+ /*
+  * Architecture-specific symbols
+diff --git a/arch/xtensa/mm/cache.c b/arch/xtensa/mm/cache.c
+index 1a804a2f9a5b..3c75c4e597da 100644
+--- a/arch/xtensa/mm/cache.c
++++ b/arch/xtensa/mm/cache.c
+@@ -103,6 +103,7 @@ void clear_user_highpage(struct page *page, unsigned long vaddr)
+ 	clear_page_alias(kvaddr, paddr);
+ 	preempt_enable();
+ }
++EXPORT_SYMBOL(clear_user_highpage);
+ 
+ void copy_user_highpage(struct page *dst, struct page *src,
+ 			unsigned long vaddr, struct vm_area_struct *vma)
+@@ -119,10 +120,7 @@ void copy_user_highpage(struct page *dst, struct page *src,
+ 	copy_page_alias(dst_vaddr, src_vaddr, dst_paddr, src_paddr);
+ 	preempt_enable();
+ }
+-
+-#endif /* DCACHE_WAY_SIZE > PAGE_SIZE */
+-
+-#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
++EXPORT_SYMBOL(copy_user_highpage);
+ 
+ /*
+  * Any time the kernel writes to a user page cache page, or it is about to
+@@ -176,7 +174,7 @@ void flush_dcache_page(struct page *page)
+ 
+ 	/* There shouldn't be an entry in the cache for this page anymore. */
+ }
+-
++EXPORT_SYMBOL(flush_dcache_page);
+ 
+ /*
+  * For now, flush the whole cache. FIXME??
+@@ -188,6 +186,7 @@ void local_flush_cache_range(struct vm_area_struct *vma,
+ 	__flush_invalidate_dcache_all();
+ 	__invalidate_icache_all();
+ }
++EXPORT_SYMBOL(local_flush_cache_range);
+ 
+ /* 
+  * Remove any entry in the cache for this page. 
+@@ -207,8 +206,9 @@ void local_flush_cache_page(struct vm_area_struct *vma, unsigned long address,
+ 	__flush_invalidate_dcache_page_alias(virt, phys);
+ 	__invalidate_icache_page_alias(virt, phys);
+ }
++EXPORT_SYMBOL(local_flush_cache_page);
+ 
+-#endif
++#endif /* DCACHE_WAY_SIZE > PAGE_SIZE */
+ 
+ void
+ update_mmu_cache(struct vm_area_struct * vma, unsigned long addr, pte_t *ptep)
+@@ -225,7 +225,7 @@ update_mmu_cache(struct vm_area_struct * vma, unsigned long addr, pte_t *ptep)
+ 
+ 	flush_tlb_page(vma, addr);
+ 
+-#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
++#if (DCACHE_WAY_SIZE > PAGE_SIZE)
+ 
+ 	if (!PageReserved(page) && test_bit(PG_arch_1, &page->flags)) {
+ 		unsigned long phys = page_to_phys(page);
+@@ -256,7 +256,7 @@ update_mmu_cache(struct vm_area_struct * vma, unsigned long addr, pte_t *ptep)
+  * flush_dcache_page() on the page.
+  */
+ 
+-#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
++#if (DCACHE_WAY_SIZE > PAGE_SIZE)
+ 
+ void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
+ 		unsigned long vaddr, void *dst, const void *src,
+diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c b/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c
+index afdd55ddf821..1ac9a95e1d78 100644
+--- a/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c
++++ b/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c
+@@ -264,8 +264,8 @@ static int submit_reloc(struct etnaviv_gem_submit *submit, void *stream,
+ 		if (ret)
+ 			return ret;
+ 
+-		if (r->reloc_offset >= bo->obj->base.size - sizeof(*ptr)) {
+-			DRM_ERROR("relocation %u outside object", i);
++		if (r->reloc_offset > bo->obj->base.size - sizeof(*ptr)) {
++			DRM_ERROR("relocation %u outside object\n", i);
+ 			return -EINVAL;
+ 		}
+ 
+diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c
+index 95a72771eea6..89a77743ab29 100644
+--- a/drivers/gpu/drm/i915/intel_color.c
++++ b/drivers/gpu/drm/i915/intel_color.c
+@@ -394,6 +394,7 @@ static void broadwell_load_luts(struct drm_crtc_state *state)
+ 		}
+ 
+ 		/* Program the max register to clamp values > 1.0. */
++		i = lut_size - 1;
+ 		I915_WRITE(PREC_PAL_GC_MAX(pipe, 0),
+ 			   drm_color_lut_extract(lut[i].red, 16));
+ 		I915_WRITE(PREC_PAL_GC_MAX(pipe, 1),
+diff --git a/drivers/iio/accel/bmc150-accel-core.c b/drivers/iio/accel/bmc150-accel-core.c
+index 59b380dbf27f..c3888822add1 100644
+--- a/drivers/iio/accel/bmc150-accel-core.c
++++ b/drivers/iio/accel/bmc150-accel-core.c
+@@ -193,7 +193,6 @@ struct bmc150_accel_data {
+ 	struct regmap *regmap;
+ 	int irq;
+ 	struct bmc150_accel_interrupt interrupts[BMC150_ACCEL_INTERRUPTS];
+-	atomic_t active_intr;
+ 	struct bmc150_accel_trigger triggers[BMC150_ACCEL_TRIGGERS];
+ 	struct mutex mutex;
+ 	u8 fifo_mode, watermark;
+@@ -493,11 +492,6 @@ static int bmc150_accel_set_interrupt(struct bmc150_accel_data *data, int i,
+ 		goto out_fix_power_state;
+ 	}
+ 
+-	if (state)
+-		atomic_inc(&data->active_intr);
+-	else
+-		atomic_dec(&data->active_intr);
+-
+ 	return 0;
+ 
+ out_fix_power_state:
+@@ -1709,8 +1703,7 @@ static int bmc150_accel_resume(struct device *dev)
+ 	struct bmc150_accel_data *data = iio_priv(indio_dev);
+ 
+ 	mutex_lock(&data->mutex);
+-	if (atomic_read(&data->active_intr))
+-		bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0);
++	bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0);
+ 	bmc150_accel_fifo_set_mode(data);
+ 	mutex_unlock(&data->mutex);
+ 
+diff --git a/drivers/iio/adc/vf610_adc.c b/drivers/iio/adc/vf610_adc.c
+index 228a003adeed..d1bde6d2721e 100644
+--- a/drivers/iio/adc/vf610_adc.c
++++ b/drivers/iio/adc/vf610_adc.c
+@@ -77,7 +77,7 @@
+ #define VF610_ADC_ADSTS_MASK		0x300
+ #define VF610_ADC_ADLPC_EN		0x80
+ #define VF610_ADC_ADHSC_EN		0x400
+-#define VF610_ADC_REFSEL_VALT		0x100
++#define VF610_ADC_REFSEL_VALT		0x800
+ #define VF610_ADC_REFSEL_VBG		0x1000
+ #define VF610_ADC_ADTRG_HARD		0x2000
+ #define VF610_ADC_AVGS_8		0x4000
+diff --git a/drivers/iio/light/tsl2563.c b/drivers/iio/light/tsl2563.c
+index 04598ae993d4..f0d3f749aa01 100644
+--- a/drivers/iio/light/tsl2563.c
++++ b/drivers/iio/light/tsl2563.c
+@@ -626,7 +626,7 @@ static irqreturn_t tsl2563_event_handler(int irq, void *private)
+ 	struct tsl2563_chip *chip = iio_priv(dev_info);
+ 
+ 	iio_push_event(dev_info,
+-		       IIO_UNMOD_EVENT_CODE(IIO_LIGHT,
++		       IIO_UNMOD_EVENT_CODE(IIO_INTENSITY,
+ 					    0,
+ 					    IIO_EV_TYPE_THRESH,
+ 					    IIO_EV_DIR_EITHER),
+diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
+index 323dba35bc9a..b2ca10c4d2a5 100644
+--- a/drivers/mmc/core/mmc.c
++++ b/drivers/mmc/core/mmc.c
+@@ -1258,7 +1258,7 @@ int mmc_hs400_to_hs200(struct mmc_card *card)
+ static int mmc_select_hs400es(struct mmc_card *card)
+ {
+ 	struct mmc_host *host = card->host;
+-	int err = 0;
++	int err = -EINVAL;
+ 	u8 val;
+ 
+ 	if (!(host->caps & MMC_CAP_8_BIT_DATA)) {
+diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
+index f222f8a7ba52..31a6ee307d80 100644
+--- a/drivers/mtd/nand/nand_base.c
++++ b/drivers/mtd/nand/nand_base.c
+@@ -64,8 +64,14 @@ static int nand_ooblayout_ecc_sp(struct mtd_info *mtd, int section,
+ 
+ 	if (!section) {
+ 		oobregion->offset = 0;
+-		oobregion->length = 4;
++		if (mtd->oobsize == 16)
++			oobregion->length = 4;
++		else
++			oobregion->length = 3;
+ 	} else {
++		if (mtd->oobsize == 8)
++			return -ERANGE;
++
+ 		oobregion->offset = 6;
+ 		oobregion->length = ecc->total - 4;
+ 	}
+@@ -1081,7 +1087,9 @@ static int nand_setup_data_interface(struct nand_chip *chip)
+ 	 * Ensure the timing mode has been changed on the chip side
+ 	 * before changing timings on the controller side.
+ 	 */
+-	if (chip->onfi_version) {
++	if (chip->onfi_version &&
++	    (le16_to_cpu(chip->onfi_params.opt_cmd) &
++	     ONFI_OPT_CMD_SET_GET_FEATURES)) {
+ 		u8 tmode_param[ONFI_SUBFEATURE_PARAM_LEN] = {
+ 			chip->onfi_timing_mode_default,
+ 		};
+diff --git a/drivers/pinctrl/intel/pinctrl-merrifield.c b/drivers/pinctrl/intel/pinctrl-merrifield.c
+index 9931be6af0ca..04d6fd2be08c 100644
+--- a/drivers/pinctrl/intel/pinctrl-merrifield.c
++++ b/drivers/pinctrl/intel/pinctrl-merrifield.c
+@@ -343,9 +343,9 @@ static const struct pinctrl_pin_desc mrfld_pins[] = {
+ 
+ static const unsigned int mrfld_sdio_pins[] = { 50, 51, 52, 53, 54, 55, 56 };
+ static const unsigned int mrfld_spi5_pins[] = { 90, 91, 92, 93, 94, 95, 96 };
+-static const unsigned int mrfld_uart0_pins[] = { 124, 125, 126, 127 };
+-static const unsigned int mrfld_uart1_pins[] = { 128, 129, 130, 131 };
+-static const unsigned int mrfld_uart2_pins[] = { 132, 133, 134, 135 };
++static const unsigned int mrfld_uart0_pins[] = { 115, 116, 117, 118 };
++static const unsigned int mrfld_uart1_pins[] = { 119, 120, 121, 122 };
++static const unsigned int mrfld_uart2_pins[] = { 123, 124, 125, 126 };
+ static const unsigned int mrfld_pwm0_pins[] = { 144 };
+ static const unsigned int mrfld_pwm1_pins[] = { 145 };
+ static const unsigned int mrfld_pwm2_pins[] = { 132 };
+diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
+index c3928aa3fefa..7511723c6b05 100644
+--- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
++++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
+@@ -85,6 +85,7 @@ static const struct pinctrl_pin_desc meson_gxbb_periphs_pins[] = {
+ 	MESON_PIN(GPIODV_15, EE_OFF),
+ 	MESON_PIN(GPIODV_16, EE_OFF),
+ 	MESON_PIN(GPIODV_17, EE_OFF),
++	MESON_PIN(GPIODV_18, EE_OFF),
+ 	MESON_PIN(GPIODV_19, EE_OFF),
+ 	MESON_PIN(GPIODV_20, EE_OFF),
+ 	MESON_PIN(GPIODV_21, EE_OFF),
+diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c
+index d32fa2b5ff82..e8aee6d88a40 100644
+--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
++++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
+@@ -195,8 +195,6 @@ static int exynos_irq_request_resources(struct irq_data *irqd)
+ 
+ 	spin_unlock_irqrestore(&bank->slock, flags);
+ 
+-	exynos_irq_unmask(irqd);
+-
+ 	return 0;
+ }
+ 
+@@ -217,8 +215,6 @@ static void exynos_irq_release_resources(struct irq_data *irqd)
+ 	shift = irqd->hwirq * bank_type->fld_width[PINCFG_TYPE_FUNC];
+ 	mask = (1 << bank_type->fld_width[PINCFG_TYPE_FUNC]) - 1;
+ 
+-	exynos_irq_mask(irqd);
+-
+ 	spin_lock_irqsave(&bank->slock, flags);
+ 
+ 	con = readl(d->virt_base + reg_con);
+diff --git a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
+index 862a096c5dba..be5c71df148d 100644
+--- a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
++++ b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
+@@ -811,6 +811,7 @@ static const struct sunxi_desc_pin sun4i_a10_pins[] = {
+ 		  SUNXI_FUNCTION(0x2, "lcd1"),		/* D16 */
+ 		  SUNXI_FUNCTION(0x3, "pata"),		/* ATAD12 */
+ 		  SUNXI_FUNCTION(0x4, "keypad"),	/* IN6 */
++		  SUNXI_FUNCTION(0x5, "sim"),		/* DET */
+ 		  SUNXI_FUNCTION_IRQ(0x6, 16),		/* EINT16 */
+ 		  SUNXI_FUNCTION(0x7, "csi1")),		/* D16 */
+ 	SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 17),
+diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c
+index 77a0236ee781..b190904c864a 100644
+--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c
++++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c
+@@ -508,57 +508,71 @@ static const unsigned usb1_pins[] = {48, 49};
+ static const int usb1_muxvals[] = {0, 0};
+ static const unsigned usb2_pins[] = {50, 51};
+ static const int usb2_muxvals[] = {0, 0};
+-static const unsigned port_range_pins[] = {
++static const unsigned port_range0_pins[] = {
+ 	159, 160, 161, 162, 163, 164, 165, 166,		/* PORT0x */
+ 	0, 1, 2, 3, 4, 5, 6, 7,				/* PORT1x */
+ 	8, 9, 10, 11, 12, 13, 14, 15,			/* PORT2x */
+-	16, 17, 18, -1, -1, -1, -1, -1,			/* PORT3x */
+-	-1, -1, -1, -1, -1, -1, -1, -1,			/* PORT4x */
+-	-1, -1, -1, 46, 47, 48, 49, 50,			/* PORT5x */
+-	51, -1, -1, 54, 55, 56, 57, 58,			/* PORT6x */
++	16, 17, 18,					/* PORT30-32 */
++};
++static const int port_range0_muxvals[] = {
++	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT0x */
++	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT1x */
++	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT2x */
++	15, 15, 15,					/* PORT30-32 */
++};
++static const unsigned port_range1_pins[] = {
++	46, 47, 48, 49, 50,				/* PORT53-57 */
++	51,						/* PORT60 */
++};
++static const int port_range1_muxvals[] = {
++	15, 15, 15, 15, 15,				/* PORT53-57 */
++	15,						/* PORT60 */
++};
++static const unsigned port_range2_pins[] = {
++	54, 55, 56, 57, 58,				/* PORT63-67 */
+ 	59, 60, 69, 70, 71, 72, 73, 74,			/* PORT7x */
+ 	75, 76, 77, 78, 79, 80, 81, 82,			/* PORT8x */
+ 	83, 84, 85, 86, 87, 88, 89, 90,			/* PORT9x */
+ 	91, 92, 93, 94, 95, 96, 97, 98,			/* PORT10x */
+-	-1, -1, -1, -1, -1, -1, -1, -1,			/* PORT11x */
+-	99, 100, 101, 102, 103, 104, 105, 106,		/* PORT12x */
+-	107, 108, 109, 110, 111, 112, 113, 114,		/* PORT13x */
+-	115, 116, 117, 118, 119, 120, 121, 122,		/* PORT14x */
+-	-1, -1, -1, -1, -1, -1, -1, -1,			/* PORT15x */
+-	-1, -1, -1, -1, -1, -1, -1, -1,			/* PORT16x */
+-	-1, -1, -1, -1, -1, -1, -1, -1,			/* PORT17x */
+-	61, 62, 63, 64, 65, 66, 67, 68,			/* PORT18x */
+-	-1, -1, -1, -1, -1, -1, -1, -1,			/* PORT19x */
+-	123, 124, 125, 126, 127, 128, 129, 130,		/* PORT20x */
+-	131, 132, 133, 134, 135, 136, 137, 138,		/* PORT21x */
+-	139, 140, 141, 142, -1, -1, -1, -1,		/* PORT22x */
+-	147, 148, 149, 150, 151, 152, 153, 154,		/* PORT23x */
+-	155, 156, 157, 143, 144, 145, 146, 158,		/* PORT24x */
+ };
+-static const int port_range_muxvals[] = {
+-	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT0x */
+-	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT1x */
+-	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT2x */
+-	15, 15, 15, -1, -1, -1, -1, -1,			/* PORT3x */
+-	-1, -1, -1, -1, -1, -1, -1, -1,			/* PORT4x */
+-	-1, -1, -1, 15, 15, 15, 15, 15,			/* PORT5x */
+-	15, -1, -1, 15, 15, 15, 15, 15,			/* PORT6x */
++static const int port_range2_muxvals[] = {
++	15, 15, 15, 15, 15,				/* PORT63-67 */
+ 	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT7x */
+ 	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT8x */
+ 	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT9x */
+ 	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT10x */
+-	-1, -1, -1, -1, -1, -1, -1, -1,			/* PORT11x */
++};
++static const unsigned port_range3_pins[] = {
++	99, 100, 101, 102, 103, 104, 105, 106,		/* PORT12x */
++	107, 108, 109, 110, 111, 112, 113, 114,		/* PORT13x */
++	115, 116, 117, 118, 119, 120, 121, 122,		/* PORT14x */
++};
++static const int port_range3_muxvals[] = {
+ 	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT12x */
+ 	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT13x */
+ 	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT14x */
+-	-1, -1, -1, -1, -1, -1, -1, -1,			/* PORT15x */
+-	-1, -1, -1, -1, -1, -1, -1, -1,			/* PORT16x */
+-	-1, -1, -1, -1, -1, -1, -1, -1,			/* PORT17x */
++};
++static const unsigned port_range4_pins[] = {
++	61, 62, 63, 64, 65, 66, 67, 68,			/* PORT18x */
++};
++static const int port_range4_muxvals[] = {
+ 	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT18x */
+-	-1, -1, -1, -1, -1, -1, -1, -1,			/* PORT19x */
++};
++static const unsigned port_range5_pins[] = {
++	123, 124, 125, 126, 127, 128, 129, 130,		/* PORT20x */
++	131, 132, 133, 134, 135, 136, 137, 138,		/* PORT21x */
++	139, 140, 141, 142,				/* PORT220-223 */
++};
++static const int port_range5_muxvals[] = {
+ 	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT20x */
+ 	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT21x */
+-	15, 15, 15, 15, -1, -1, -1, -1,			/* PORT22x */
++	15, 15, 15, 15,					/* PORT220-223 */
++};
++static const unsigned port_range6_pins[] = {
++	147, 148, 149, 150, 151, 152, 153, 154,		/* PORT23x */
++	155, 156, 157, 143, 144, 145, 146, 158,		/* PORT24x */
++};
++static const int port_range6_muxvals[] = {
+ 	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT23x */
+ 	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT24x */
+ };
+@@ -607,147 +621,153 @@ static const struct uniphier_pinctrl_group uniphier_ld11_groups[] = {
+ 	UNIPHIER_PINCTRL_GROUP(usb0),
+ 	UNIPHIER_PINCTRL_GROUP(usb1),
+ 	UNIPHIER_PINCTRL_GROUP(usb2),
+-	UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range),
++	UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range0),
++	UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range1),
++	UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range2),
++	UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range3),
++	UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range4),
++	UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range5),
++	UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range6),
+ 	UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_IRQ(xirq),
+ 	UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_IRQ(xirq_alternatives),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port00, port_range, 0),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port01, port_range, 1),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port02, port_range, 2),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port03, port_range, 3),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port04, port_range, 4),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port05, port_range, 5),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port06, port_range, 6),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port07, port_range, 7),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port10, port_range, 8),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port11, port_range, 9),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port12, port_range, 10),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port13, port_range, 11),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port14, port_range, 12),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port15, port_range, 13),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port16, port_range, 14),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port17, port_range, 15),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port20, port_range, 16),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port21, port_range, 17),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port22, port_range, 18),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port23, port_range, 19),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port24, port_range, 20),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port25, port_range, 21),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port26, port_range, 22),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port27, port_range, 23),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port30, port_range, 24),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port31, port_range, 25),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port32, port_range, 26),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port53, port_range, 43),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port54, port_range, 44),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port55, port_range, 45),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port56, port_range, 46),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port57, port_range, 47),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port60, port_range, 48),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port63, port_range, 51),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port64, port_range, 52),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port65, port_range, 53),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port66, port_range, 54),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port67, port_range, 55),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port70, port_range, 56),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port71, port_range, 57),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port72, port_range, 58),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port73, port_range, 59),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port74, port_range, 60),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port75, port_range, 61),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port76, port_range, 62),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port77, port_range, 63),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port80, port_range, 64),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port81, port_range, 65),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port82, port_range, 66),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port83, port_range, 67),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port84, port_range, 68),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port85, port_range, 69),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port86, port_range, 70),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port87, port_range, 71),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port90, port_range, 72),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port91, port_range, 73),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port92, port_range, 74),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port93, port_range, 75),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port94, port_range, 76),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port95, port_range, 77),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port96, port_range, 78),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port97, port_range, 79),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port100, port_range, 80),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port101, port_range, 81),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port102, port_range, 82),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port103, port_range, 83),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port104, port_range, 84),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port105, port_range, 85),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port106, port_range, 86),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port107, port_range, 87),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port120, port_range, 96),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port121, port_range, 97),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port122, port_range, 98),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port123, port_range, 99),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port124, port_range, 100),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port125, port_range, 101),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port126, port_range, 102),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port127, port_range, 103),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port130, port_range, 104),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port131, port_range, 105),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port132, port_range, 106),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port133, port_range, 107),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port134, port_range, 108),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port135, port_range, 109),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port136, port_range, 110),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port137, port_range, 111),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port140, port_range, 112),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port141, port_range, 113),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port142, port_range, 114),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port143, port_range, 115),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port144, port_range, 116),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port145, port_range, 117),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port146, port_range, 118),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port147, port_range, 119),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port180, port_range, 144),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port181, port_range, 145),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port182, port_range, 146),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port183, port_range, 147),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port184, port_range, 148),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port185, port_range, 149),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port186, port_range, 150),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port187, port_range, 151),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port200, port_range, 160),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port201, port_range, 161),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port202, port_range, 162),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port203, port_range, 163),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port204, port_range, 164),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port205, port_range, 165),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port206, port_range, 166),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port207, port_range, 167),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port210, port_range, 168),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port211, port_range, 169),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port212, port_range, 170),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port213, port_range, 171),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port214, port_range, 172),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port215, port_range, 173),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port216, port_range, 174),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port217, port_range, 175),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port220, port_range, 176),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port221, port_range, 177),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port222, port_range, 178),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port223, port_range, 179),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port230, port_range, 184),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port231, port_range, 185),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port232, port_range, 186),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port233, port_range, 187),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port234, port_range, 188),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port235, port_range, 189),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port236, port_range, 190),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port237, port_range, 191),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port240, port_range, 192),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port241, port_range, 193),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port242, port_range, 194),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port243, port_range, 195),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port244, port_range, 196),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port245, port_range, 197),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port246, port_range, 198),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port247, port_range, 199),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port00, port_range0, 0),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port01, port_range0, 1),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port02, port_range0, 2),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port03, port_range0, 3),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port04, port_range0, 4),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port05, port_range0, 5),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port06, port_range0, 6),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port07, port_range0, 7),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port10, port_range0, 8),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port11, port_range0, 9),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port12, port_range0, 10),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port13, port_range0, 11),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port14, port_range0, 12),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port15, port_range0, 13),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port16, port_range0, 14),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port17, port_range0, 15),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port20, port_range0, 16),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port21, port_range0, 17),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port22, port_range0, 18),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port23, port_range0, 19),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port24, port_range0, 20),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port25, port_range0, 21),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port26, port_range0, 22),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port27, port_range0, 23),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port30, port_range0, 24),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port31, port_range0, 25),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port32, port_range0, 26),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port53, port_range1, 0),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port54, port_range1, 1),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port55, port_range1, 2),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port56, port_range1, 3),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port57, port_range1, 4),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port60, port_range1, 5),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port63, port_range2, 0),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port64, port_range2, 1),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port65, port_range2, 2),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port66, port_range2, 3),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port67, port_range2, 4),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port70, port_range2, 5),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port71, port_range2, 6),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port72, port_range2, 7),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port73, port_range2, 8),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port74, port_range2, 9),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port75, port_range2, 10),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port76, port_range2, 11),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port77, port_range2, 12),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port80, port_range2, 13),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port81, port_range2, 14),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port82, port_range2, 15),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port83, port_range2, 16),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port84, port_range2, 17),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port85, port_range2, 18),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port86, port_range2, 19),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port87, port_range2, 20),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port90, port_range2, 21),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port91, port_range2, 22),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port92, port_range2, 23),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port93, port_range2, 24),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port94, port_range2, 25),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port95, port_range2, 26),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port96, port_range2, 27),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port97, port_range2, 28),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port100, port_range2, 29),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port101, port_range2, 30),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port102, port_range2, 31),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port103, port_range2, 32),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port104, port_range2, 33),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port105, port_range2, 34),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port106, port_range2, 35),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port107, port_range2, 36),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port120, port_range3, 0),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port121, port_range3, 1),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port122, port_range3, 2),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port123, port_range3, 3),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port124, port_range3, 4),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port125, port_range3, 5),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port126, port_range3, 6),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port127, port_range3, 7),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port130, port_range3, 8),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port131, port_range3, 9),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port132, port_range3, 10),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port133, port_range3, 11),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port134, port_range3, 12),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port135, port_range3, 13),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port136, port_range3, 14),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port137, port_range3, 15),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port140, port_range3, 16),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port141, port_range3, 17),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port142, port_range3, 18),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port143, port_range3, 19),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port144, port_range3, 20),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port145, port_range3, 21),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port146, port_range3, 22),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port147, port_range3, 23),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port180, port_range4, 0),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port181, port_range4, 1),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port182, port_range4, 2),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port183, port_range4, 3),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port184, port_range4, 4),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port185, port_range4, 5),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port186, port_range4, 6),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port187, port_range4, 7),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port200, port_range5, 0),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port201, port_range5, 1),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port202, port_range5, 2),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port203, port_range5, 3),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port204, port_range5, 4),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port205, port_range5, 5),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port206, port_range5, 6),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port207, port_range5, 7),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port210, port_range5, 8),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port211, port_range5, 9),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port212, port_range5, 10),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port213, port_range5, 11),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port214, port_range5, 12),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port215, port_range5, 13),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port216, port_range5, 14),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port217, port_range5, 15),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port220, port_range5, 16),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port221, port_range5, 17),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port222, port_range5, 18),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port223, port_range5, 19),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port230, port_range6, 0),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port231, port_range6, 1),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port232, port_range6, 2),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port233, port_range6, 3),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port234, port_range6, 4),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port235, port_range6, 5),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port236, port_range6, 6),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port237, port_range6, 7),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port240, port_range6, 8),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port241, port_range6, 9),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port242, port_range6, 10),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port243, port_range6, 11),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port244, port_range6, 12),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port245, port_range6, 13),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port246, port_range6, 14),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port247, port_range6, 15),
+ 	UNIPHIER_PINCTRL_GROUP_SINGLE(xirq0, xirq, 0),
+ 	UNIPHIER_PINCTRL_GROUP_SINGLE(xirq1, xirq, 1),
+ 	UNIPHIER_PINCTRL_GROUP_SINGLE(xirq2, xirq, 2),
+diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c
+index 96686336e3a3..73b828b22901 100644
+--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c
++++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c
+@@ -597,7 +597,7 @@ static const unsigned usb2_pins[] = {50, 51};
+ static const int usb2_muxvals[] = {0, 0};
+ static const unsigned usb3_pins[] = {52, 53};
+ static const int usb3_muxvals[] = {0, 0};
+-static const unsigned port_range_pins[] = {
++static const unsigned port_range0_pins[] = {
+ 	168, 169, 170, 171, 172, 173, 174, 175,		/* PORT0x */
+ 	0, 1, 2, 3, 4, 5, 6, 7,				/* PORT1x */
+ 	8, 9, 10, 11, 12, 13, 14, 15,			/* PORT2x */
+@@ -609,23 +609,8 @@ static const unsigned port_range_pins[] = {
+ 	75, 76, 77, 78, 79, 80, 81, 82,			/* PORT8x */
+ 	83, 84, 85, 86, 87, 88, 89, 90,			/* PORT9x */
+ 	91, 92, 93, 94, 95, 96, 97, 98,			/* PORT10x */
+-	-1, -1, -1, -1, -1, -1, -1, -1,			/* PORT11x */
+-	99, 100, 101, 102, 103, 104, 105, 106,		/* PORT12x */
+-	107, 108, 109, 110, 111, 112, 113, 114,		/* PORT13x */
+-	115, 116, 117, 118, 119, 120, 121, 122,		/* PORT14x */
+-	-1, -1, -1, -1, -1, -1, -1, -1,			/* PORT15x */
+-	-1, -1, -1, -1, -1, -1, -1, -1,			/* PORT16x */
+-	-1, -1, -1, -1, -1, -1, -1, -1,			/* PORT17x */
+-	61, 62, 63, 64, 65, 66, 67, 68,			/* PORT18x */
+-	-1, -1, -1, -1, -1, -1, -1, -1,			/* PORT19x */
+-	123, 124, 125, 126, 127, 128, 129, 130,		/* PORT20x */
+-	131, 132, 133, 134, 135, 136, 137, 138,		/* PORT21x */
+-	139, 140, 141, 142, 143, 144, 145, 146,		/* PORT22x */
+-	147, 148, 149, 150, 151, 152, 153, 154,		/* PORT23x */
+-	155, 156, 157, 158, 159, 160, 161, 162,		/* PORT24x */
+-	163, 164, 165, 166, 167,			/* PORT25x */
+ };
+-static const int port_range_muxvals[] = {
++static const int port_range0_muxvals[] = {
+ 	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT0x */
+ 	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT1x */
+ 	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT2x */
+@@ -637,21 +622,38 @@ static const int port_range_muxvals[] = {
+ 	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT8x */
+ 	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT9x */
+ 	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT10x */
+-	-1, -1, -1, -1, -1, -1, -1, -1,			/* PORT11x */
++};
++static const unsigned port_range1_pins[] = {
++	99, 100, 101, 102, 103, 104, 105, 106,		/* PORT12x */
++	107, 108, 109, 110, 111, 112, 113, 114,		/* PORT13x */
++	115, 116, 117, 118, 119, 120, 121, 122,		/* PORT14x */
++};
++static const int port_range1_muxvals[] = {
+ 	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT12x */
+ 	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT13x */
+ 	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT14x */
+-	-1, -1, -1, -1, -1, -1, -1, -1,			/* PORT15x */
+-	-1, -1, -1, -1, -1, -1, -1, -1,			/* PORT16x */
+-	-1, -1, -1, -1, -1, -1, -1, -1,			/* PORT17x */
++};
++static const unsigned port_range2_pins[] = {
++	61, 62, 63, 64, 65, 66, 67, 68,			/* PORT18x */
++};
++static const int port_range2_muxvals[] = {
+ 	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT18x */
+-	-1, -1, -1, -1, -1, -1, -1, -1,			/* PORT19x */
++};
++static const unsigned port_range3_pins[] = {
++	123, 124, 125, 126, 127, 128, 129, 130,		/* PORT20x */
++	131, 132, 133, 134, 135, 136, 137, 138,		/* PORT21x */
++	139, 140, 141, 142, 143, 144, 145, 146,		/* PORT22x */
++	147, 148, 149, 150, 151, 152, 153, 154,		/* PORT23x */
++	155, 156, 157, 158, 159, 160, 161, 162,		/* PORT24x */
++	163, 164, 165, 166, 167,			/* PORT250-254 */
++};
++static const int port_range3_muxvals[] = {
+ 	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT20x */
+ 	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT21x */
+ 	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT22x */
+ 	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT23x */
+ 	15, 15, 15, 15, 15, 15, 15, 15,			/* PORT24x */
+-	15, 15, 15, 15, 15,				/* PORT25x */
++	15, 15, 15, 15, 15,				/* PORT250-254 */
+ };
+ static const unsigned xirq_pins[] = {
+ 	149, 150, 151, 152, 153, 154, 155, 156,		/* XIRQ0-7 */
+@@ -695,174 +697,177 @@ static const struct uniphier_pinctrl_group uniphier_ld20_groups[] = {
+ 	UNIPHIER_PINCTRL_GROUP(usb1),
+ 	UNIPHIER_PINCTRL_GROUP(usb2),
+ 	UNIPHIER_PINCTRL_GROUP(usb3),
+-	UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range),
++	UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range0),
++	UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range1),
++	UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range2),
++	UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range3),
+ 	UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_IRQ(xirq),
+ 	UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_IRQ(xirq_alternatives),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port00, port_range, 0),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port01, port_range, 1),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port02, port_range, 2),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port03, port_range, 3),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port04, port_range, 4),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port05, port_range, 5),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port06, port_range, 6),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port07, port_range, 7),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port10, port_range, 8),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port11, port_range, 9),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port12, port_range, 10),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port13, port_range, 11),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port14, port_range, 12),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port15, port_range, 13),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port16, port_range, 14),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port17, port_range, 15),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port20, port_range, 16),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port21, port_range, 17),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port22, port_range, 18),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port23, port_range, 19),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port24, port_range, 20),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port25, port_range, 21),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port26, port_range, 22),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port27, port_range, 23),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port30, port_range, 24),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port31, port_range, 25),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port32, port_range, 26),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port33, port_range, 27),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port34, port_range, 28),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port35, port_range, 29),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port36, port_range, 30),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port37, port_range, 31),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port40, port_range, 32),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port41, port_range, 33),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port42, port_range, 34),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port43, port_range, 35),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port44, port_range, 36),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port45, port_range, 37),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port46, port_range, 38),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port47, port_range, 39),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port50, port_range, 40),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port51, port_range, 41),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port52, port_range, 42),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port53, port_range, 43),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port54, port_range, 44),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port55, port_range, 45),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port56, port_range, 46),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port57, port_range, 47),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port60, port_range, 48),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port61, port_range, 49),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port62, port_range, 50),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port63, port_range, 51),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port64, port_range, 52),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port65, port_range, 53),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port66, port_range, 54),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port67, port_range, 55),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port70, port_range, 56),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port71, port_range, 57),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port72, port_range, 58),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port73, port_range, 59),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port74, port_range, 60),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port75, port_range, 61),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port76, port_range, 62),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port77, port_range, 63),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port80, port_range, 64),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port81, port_range, 65),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port82, port_range, 66),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port83, port_range, 67),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port84, port_range, 68),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port85, port_range, 69),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port86, port_range, 70),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port87, port_range, 71),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port90, port_range, 72),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port91, port_range, 73),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port92, port_range, 74),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port93, port_range, 75),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port94, port_range, 76),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port95, port_range, 77),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port96, port_range, 78),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port97, port_range, 79),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port100, port_range, 80),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port101, port_range, 81),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port102, port_range, 82),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port103, port_range, 83),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port104, port_range, 84),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port105, port_range, 85),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port106, port_range, 86),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port107, port_range, 87),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port120, port_range, 96),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port121, port_range, 97),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port122, port_range, 98),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port123, port_range, 99),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port124, port_range, 100),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port125, port_range, 101),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port126, port_range, 102),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port127, port_range, 103),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port130, port_range, 104),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port131, port_range, 105),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port132, port_range, 106),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port133, port_range, 107),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port134, port_range, 108),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port135, port_range, 109),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port136, port_range, 110),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port137, port_range, 111),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port140, port_range, 112),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port141, port_range, 113),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port142, port_range, 114),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port143, port_range, 115),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port144, port_range, 116),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port145, port_range, 117),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port146, port_range, 118),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port147, port_range, 119),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port180, port_range, 144),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port181, port_range, 145),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port182, port_range, 146),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port183, port_range, 147),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port184, port_range, 148),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port185, port_range, 149),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port186, port_range, 150),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port187, port_range, 151),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port200, port_range, 160),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port201, port_range, 161),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port202, port_range, 162),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port203, port_range, 163),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port204, port_range, 164),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port205, port_range, 165),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port206, port_range, 166),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port207, port_range, 167),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port210, port_range, 168),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port211, port_range, 169),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port212, port_range, 170),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port213, port_range, 171),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port214, port_range, 172),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port215, port_range, 173),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port216, port_range, 174),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port217, port_range, 175),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port220, port_range, 176),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port221, port_range, 177),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port222, port_range, 178),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port223, port_range, 179),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port224, port_range, 180),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port225, port_range, 181),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port226, port_range, 182),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port227, port_range, 183),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port230, port_range, 184),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port231, port_range, 185),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port232, port_range, 186),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port233, port_range, 187),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port234, port_range, 188),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port235, port_range, 189),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port236, port_range, 190),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port237, port_range, 191),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port240, port_range, 192),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port241, port_range, 193),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port242, port_range, 194),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port243, port_range, 195),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port244, port_range, 196),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port245, port_range, 197),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port246, port_range, 198),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port247, port_range, 199),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port250, port_range, 200),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port251, port_range, 201),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port252, port_range, 202),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port253, port_range, 203),
+-	UNIPHIER_PINCTRL_GROUP_SINGLE(port254, port_range, 204),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port00, port_range0, 0),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port01, port_range0, 1),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port02, port_range0, 2),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port03, port_range0, 3),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port04, port_range0, 4),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port05, port_range0, 5),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port06, port_range0, 6),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port07, port_range0, 7),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port10, port_range0, 8),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port11, port_range0, 9),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port12, port_range0, 10),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port13, port_range0, 11),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port14, port_range0, 12),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port15, port_range0, 13),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port16, port_range0, 14),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port17, port_range0, 15),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port20, port_range0, 16),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port21, port_range0, 17),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port22, port_range0, 18),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port23, port_range0, 19),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port24, port_range0, 20),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port25, port_range0, 21),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port26, port_range0, 22),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port27, port_range0, 23),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port30, port_range0, 24),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port31, port_range0, 25),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port32, port_range0, 26),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port33, port_range0, 27),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port34, port_range0, 28),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port35, port_range0, 29),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port36, port_range0, 30),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port37, port_range0, 31),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port40, port_range0, 32),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port41, port_range0, 33),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port42, port_range0, 34),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port43, port_range0, 35),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port44, port_range0, 36),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port45, port_range0, 37),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port46, port_range0, 38),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port47, port_range0, 39),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port50, port_range0, 40),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port51, port_range0, 41),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port52, port_range0, 42),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port53, port_range0, 43),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port54, port_range0, 44),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port55, port_range0, 45),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port56, port_range0, 46),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port57, port_range0, 47),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port60, port_range0, 48),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port61, port_range0, 49),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port62, port_range0, 50),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port63, port_range0, 51),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port64, port_range0, 52),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port65, port_range0, 53),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port66, port_range0, 54),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port67, port_range0, 55),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port70, port_range0, 56),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port71, port_range0, 57),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port72, port_range0, 58),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port73, port_range0, 59),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port74, port_range0, 60),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port75, port_range0, 61),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port76, port_range0, 62),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port77, port_range0, 63),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port80, port_range0, 64),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port81, port_range0, 65),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port82, port_range0, 66),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port83, port_range0, 67),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port84, port_range0, 68),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port85, port_range0, 69),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port86, port_range0, 70),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port87, port_range0, 71),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port90, port_range0, 72),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port91, port_range0, 73),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port92, port_range0, 74),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port93, port_range0, 75),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port94, port_range0, 76),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port95, port_range0, 77),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port96, port_range0, 78),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port97, port_range0, 79),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port100, port_range0, 80),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port101, port_range0, 81),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port102, port_range0, 82),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port103, port_range0, 83),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port104, port_range0, 84),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port105, port_range0, 85),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port106, port_range0, 86),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port107, port_range0, 87),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port120, port_range1, 0),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port121, port_range1, 1),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port122, port_range1, 2),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port123, port_range1, 3),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port124, port_range1, 4),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port125, port_range1, 5),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port126, port_range1, 6),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port127, port_range1, 7),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port130, port_range1, 8),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port131, port_range1, 9),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port132, port_range1, 10),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port133, port_range1, 11),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port134, port_range1, 12),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port135, port_range1, 13),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port136, port_range1, 14),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port137, port_range1, 15),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port140, port_range1, 16),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port141, port_range1, 17),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port142, port_range1, 18),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port143, port_range1, 19),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port144, port_range1, 20),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port145, port_range1, 21),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port146, port_range1, 22),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port147, port_range1, 23),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port180, port_range2, 0),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port181, port_range2, 1),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port182, port_range2, 2),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port183, port_range2, 3),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port184, port_range2, 4),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port185, port_range2, 5),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port186, port_range2, 6),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port187, port_range2, 7),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port200, port_range3, 0),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port201, port_range3, 1),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port202, port_range3, 2),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port203, port_range3, 3),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port204, port_range3, 4),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port205, port_range3, 5),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port206, port_range3, 6),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port207, port_range3, 7),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port210, port_range3, 8),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port211, port_range3, 9),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port212, port_range3, 10),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port213, port_range3, 11),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port214, port_range3, 12),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port215, port_range3, 13),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port216, port_range3, 14),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port217, port_range3, 15),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port220, port_range3, 16),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port221, port_range3, 17),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port222, port_range3, 18),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port223, port_range3, 19),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port224, port_range3, 20),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port225, port_range3, 21),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port226, port_range3, 22),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port227, port_range3, 23),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port230, port_range3, 24),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port231, port_range3, 25),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port232, port_range3, 26),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port233, port_range3, 27),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port234, port_range3, 28),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port235, port_range3, 29),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port236, port_range3, 30),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port237, port_range3, 31),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port240, port_range3, 32),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port241, port_range3, 33),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port242, port_range3, 34),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port243, port_range3, 35),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port244, port_range3, 36),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port245, port_range3, 37),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port246, port_range3, 38),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port247, port_range3, 39),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port250, port_range3, 40),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port251, port_range3, 41),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port252, port_range3, 42),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port253, port_range3, 43),
++	UNIPHIER_PINCTRL_GROUP_SINGLE(port254, port_range3, 44),
+ 	UNIPHIER_PINCTRL_GROUP_SINGLE(xirq0, xirq, 0),
+ 	UNIPHIER_PINCTRL_GROUP_SINGLE(xirq1, xirq, 1),
+ 	UNIPHIER_PINCTRL_GROUP_SINGLE(xirq2, xirq, 2),
+diff --git a/drivers/staging/comedi/comedi_fops.c b/drivers/staging/comedi/comedi_fops.c
+index ec9979070479..7458df4b6854 100644
+--- a/drivers/staging/comedi/comedi_fops.c
++++ b/drivers/staging/comedi/comedi_fops.c
+@@ -2385,6 +2385,7 @@ static ssize_t comedi_write(struct file *file, const char __user *buf,
+ 			continue;
+ 		}
+ 
++		set_current_state(TASK_RUNNING);
+ 		wp = async->buf_write_ptr;
+ 		n1 = min(n, async->prealloc_bufsz - wp);
+ 		n2 = n - n1;
+@@ -2517,6 +2518,8 @@ static ssize_t comedi_read(struct file *file, char __user *buf, size_t nbytes,
+ 			}
+ 			continue;
+ 		}
++
++		set_current_state(TASK_RUNNING);
+ 		rp = async->buf_read_ptr;
+ 		n1 = min(n, async->prealloc_bufsz - rp);
+ 		n2 = n - n1;
+diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/resolver/ad2s1210.c
+index 6b992634f009..598f0faa48c8 100644
+--- a/drivers/staging/iio/resolver/ad2s1210.c
++++ b/drivers/staging/iio/resolver/ad2s1210.c
+@@ -472,7 +472,7 @@ static int ad2s1210_read_raw(struct iio_dev *indio_dev,
+ 			     long m)
+ {
+ 	struct ad2s1210_state *st = iio_priv(indio_dev);
+-	bool negative;
++	u16 negative;
+ 	int ret = 0;
+ 	u16 pos;
+ 	s16 vel;
+diff --git a/drivers/target/iscsi/iscsi_target.c b/drivers/target/iscsi/iscsi_target.c
+index 155fe0e0623f..e49fcd5e61f7 100644
+--- a/drivers/target/iscsi/iscsi_target.c
++++ b/drivers/target/iscsi/iscsi_target.c
+@@ -418,6 +418,7 @@ int iscsit_reset_np_thread(
+ 		return 0;
+ 	}
+ 	np->np_thread_state = ISCSI_NP_THREAD_RESET;
++	atomic_inc(&np->np_reset_count);
+ 
+ 	if (np->np_thread) {
+ 		spin_unlock_bh(&np->np_thread_lock);
+@@ -2177,6 +2178,7 @@ iscsit_setup_text_cmd(struct iscsi_conn *conn, struct iscsi_cmd *cmd,
+ 	cmd->cmd_sn		= be32_to_cpu(hdr->cmdsn);
+ 	cmd->exp_stat_sn	= be32_to_cpu(hdr->exp_statsn);
+ 	cmd->data_direction	= DMA_NONE;
++	kfree(cmd->text_in_ptr);
+ 	cmd->text_in_ptr	= NULL;
+ 
+ 	return 0;
+diff --git a/drivers/target/iscsi/iscsi_target_login.c b/drivers/target/iscsi/iscsi_target_login.c
+index 6128e8e80170..9ccd5da8f204 100644
+--- a/drivers/target/iscsi/iscsi_target_login.c
++++ b/drivers/target/iscsi/iscsi_target_login.c
+@@ -1233,9 +1233,11 @@ static int __iscsi_target_login_thread(struct iscsi_np *np)
+ 	flush_signals(current);
+ 
+ 	spin_lock_bh(&np->np_thread_lock);
+-	if (np->np_thread_state == ISCSI_NP_THREAD_RESET) {
++	if (atomic_dec_if_positive(&np->np_reset_count) >= 0) {
+ 		np->np_thread_state = ISCSI_NP_THREAD_ACTIVE;
++		spin_unlock_bh(&np->np_thread_lock);
+ 		complete(&np->np_restart_comp);
++		return 1;
+ 	} else if (np->np_thread_state == ISCSI_NP_THREAD_SHUTDOWN) {
+ 		spin_unlock_bh(&np->np_thread_lock);
+ 		goto exit;
+@@ -1268,7 +1270,8 @@ static int __iscsi_target_login_thread(struct iscsi_np *np)
+ 		goto exit;
+ 	} else if (rc < 0) {
+ 		spin_lock_bh(&np->np_thread_lock);
+-		if (np->np_thread_state == ISCSI_NP_THREAD_RESET) {
++		if (atomic_dec_if_positive(&np->np_reset_count) >= 0) {
++			np->np_thread_state = ISCSI_NP_THREAD_ACTIVE;
+ 			spin_unlock_bh(&np->np_thread_lock);
+ 			complete(&np->np_restart_comp);
+ 			iscsit_put_transport(conn->conn_transport);
+diff --git a/drivers/target/target_core_tpg.c b/drivers/target/target_core_tpg.c
+index 1949f50725a5..0e2e71f6c198 100644
+--- a/drivers/target/target_core_tpg.c
++++ b/drivers/target/target_core_tpg.c
+@@ -364,7 +364,7 @@ void core_tpg_del_initiator_node_acl(struct se_node_acl *acl)
+ 	mutex_lock(&tpg->acl_node_mutex);
+ 	if (acl->dynamic_node_acl)
+ 		acl->dynamic_node_acl = 0;
+-	list_del(&acl->acl_list);
++	list_del_init(&acl->acl_list);
+ 	mutex_unlock(&tpg->acl_node_mutex);
+ 
+ 	target_shutdown_sessions(acl);
+@@ -540,7 +540,7 @@ int core_tpg_deregister(struct se_portal_group *se_tpg)
+ 	 * in transport_deregister_session().
+ 	 */
+ 	list_for_each_entry_safe(nacl, nacl_tmp, &node_list, acl_list) {
+-		list_del(&nacl->acl_list);
++		list_del_init(&nacl->acl_list);
+ 
+ 		core_tpg_wait_for_nacl_pr_ref(nacl);
+ 		core_free_device_list_for_node(nacl, se_tpg);
+diff --git a/drivers/target/target_core_transport.c b/drivers/target/target_core_transport.c
+index e8a1f5cadba5..bacfa8f81be8 100644
+--- a/drivers/target/target_core_transport.c
++++ b/drivers/target/target_core_transport.c
+@@ -465,7 +465,7 @@ static void target_complete_nacl(struct kref *kref)
+ 	}
+ 
+ 	mutex_lock(&se_tpg->acl_node_mutex);
+-	list_del(&nacl->acl_list);
++	list_del_init(&nacl->acl_list);
+ 	mutex_unlock(&se_tpg->acl_node_mutex);
+ 
+ 	core_tpg_wait_for_nacl_pr_ref(nacl);
+@@ -537,7 +537,7 @@ void transport_free_session(struct se_session *se_sess)
+ 			spin_unlock_irqrestore(&se_nacl->nacl_sess_lock, flags);
+ 
+ 			if (se_nacl->dynamic_stop)
+-				list_del(&se_nacl->acl_list);
++				list_del_init(&se_nacl->acl_list);
+ 		}
+ 		mutex_unlock(&se_tpg->acl_node_mutex);
+ 
+diff --git a/drivers/usb/core/hcd.c b/drivers/usb/core/hcd.c
+index 8a7c6bbaed7e..882fc4e08284 100644
+--- a/drivers/usb/core/hcd.c
++++ b/drivers/usb/core/hcd.c
+@@ -1877,7 +1877,7 @@ void usb_hcd_flush_endpoint(struct usb_device *udev,
+ 	/* No more submits can occur */
+ 	spin_lock_irq(&hcd_urb_list_lock);
+ rescan:
+-	list_for_each_entry (urb, &ep->urb_list, urb_list) {
++	list_for_each_entry_reverse(urb, &ep->urb_list, urb_list) {
+ 		int	is_in;
+ 
+ 		if (urb->unlinked)
+@@ -2474,6 +2474,8 @@ void usb_hc_died (struct usb_hcd *hcd)
+ 	}
+ 	if (usb_hcd_is_primary_hcd(hcd) && hcd->shared_hcd) {
+ 		hcd = hcd->shared_hcd;
++		clear_bit(HCD_FLAG_RH_RUNNING, &hcd->flags);
++		set_bit(HCD_FLAG_DEAD, &hcd->flags);
+ 		if (hcd->rh_registered) {
+ 			clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
+ 
+diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
+index f953d6d647f2..80d4ef31ba8d 100644
+--- a/drivers/usb/core/hub.c
++++ b/drivers/usb/core/hub.c
+@@ -4728,7 +4728,8 @@ hub_power_remaining(struct usb_hub *hub)
+ static void hub_port_connect(struct usb_hub *hub, int port1, u16 portstatus,
+ 		u16 portchange)
+ {
+-	int status, i;
++	int status = -ENODEV;
++	int i;
+ 	unsigned unit_load;
+ 	struct usb_device *hdev = hub->hdev;
+ 	struct usb_hcd *hcd = bus_to_hcd(hdev->bus);
+@@ -4932,9 +4933,10 @@ static void hub_port_connect(struct usb_hub *hub, int port1, u16 portstatus,
+ 
+ done:
+ 	hub_port_disable(hub, port1, 1);
+-	if (hcd->driver->relinquish_port && !hub->hdev->parent)
+-		hcd->driver->relinquish_port(hcd, port1);
+-
++	if (hcd->driver->relinquish_port && !hub->hdev->parent) {
++		if (status != -ENOTCONN && status != -ENODEV)
++			hcd->driver->relinquish_port(hcd, port1);
++	}
+ }
+ 
+ /* Handle physical or logical connection change events.
+diff --git a/drivers/usb/core/quirks.c b/drivers/usb/core/quirks.c
+index 3116edfcdc18..574da2b4529c 100644
+--- a/drivers/usb/core/quirks.c
++++ b/drivers/usb/core/quirks.c
+@@ -150,6 +150,9 @@ static const struct usb_device_id usb_quirk_list[] = {
+ 	/* appletouch */
+ 	{ USB_DEVICE(0x05ac, 0x021a), .driver_info = USB_QUIRK_RESET_RESUME },
+ 
++	/* Genesys Logic hub, internally used by Moshi USB to Ethernet Adapter */
++	{ USB_DEVICE(0x05e3, 0x0616), .driver_info = USB_QUIRK_NO_LPM },
++
+ 	/* Avision AV600U */
+ 	{ USB_DEVICE(0x0638, 0x0a13), .driver_info =
+ 	  USB_QUIRK_STRING_FETCH_255 },
+@@ -249,6 +252,7 @@ static const struct usb_device_id usb_amd_resume_quirk_list[] = {
+ 	{ USB_DEVICE(0x093a, 0x2500), .driver_info = USB_QUIRK_RESET_RESUME },
+ 	{ USB_DEVICE(0x093a, 0x2510), .driver_info = USB_QUIRK_RESET_RESUME },
+ 	{ USB_DEVICE(0x093a, 0x2521), .driver_info = USB_QUIRK_RESET_RESUME },
++	{ USB_DEVICE(0x03f0, 0x2b4a), .driver_info = USB_QUIRK_RESET_RESUME },
+ 
+ 	/* Logitech Optical Mouse M90/M100 */
+ 	{ USB_DEVICE(0x046d, 0xc05a), .driver_info = USB_QUIRK_RESET_RESUME },
+diff --git a/drivers/usb/gadget/udc/renesas_usb3.c b/drivers/usb/gadget/udc/renesas_usb3.c
+index ba78e3f7aea8..d2cfefadca3c 100644
+--- a/drivers/usb/gadget/udc/renesas_usb3.c
++++ b/drivers/usb/gadget/udc/renesas_usb3.c
+@@ -685,21 +685,32 @@ static struct renesas_usb3_request *usb3_get_request(struct renesas_usb3_ep
+ 	return usb3_req;
+ }
+ 
+-static void usb3_request_done(struct renesas_usb3_ep *usb3_ep,
+-			      struct renesas_usb3_request *usb3_req, int status)
++static void __usb3_request_done(struct renesas_usb3_ep *usb3_ep,
++				struct renesas_usb3_request *usb3_req,
++				int status)
+ {
+ 	struct renesas_usb3 *usb3 = usb3_ep_to_usb3(usb3_ep);
+-	unsigned long flags;
+ 
+ 	dev_dbg(usb3_to_dev(usb3), "giveback: ep%2d, %u, %u, %d\n",
+ 		usb3_ep->num, usb3_req->req.length, usb3_req->req.actual,
+ 		status);
+ 	usb3_req->req.status = status;
+-	spin_lock_irqsave(&usb3->lock, flags);
+ 	usb3_ep->started = false;
+ 	list_del_init(&usb3_req->queue);
+-	spin_unlock_irqrestore(&usb3->lock, flags);
++	spin_unlock(&usb3->lock);
+ 	usb_gadget_giveback_request(&usb3_ep->ep, &usb3_req->req);
++	spin_lock(&usb3->lock);
++}
++
++static void usb3_request_done(struct renesas_usb3_ep *usb3_ep,
++			      struct renesas_usb3_request *usb3_req, int status)
++{
++	struct renesas_usb3 *usb3 = usb3_ep_to_usb3(usb3_ep);
++	unsigned long flags;
++
++	spin_lock_irqsave(&usb3->lock, flags);
++	__usb3_request_done(usb3_ep, usb3_req, status);
++	spin_unlock_irqrestore(&usb3->lock, flags);
+ }
+ 
+ static void usb3_irq_epc_pipe0_status_end(struct renesas_usb3 *usb3)
+diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c
+index c8989c62a262..5f4ca7890435 100644
+--- a/drivers/usb/host/pci-quirks.c
++++ b/drivers/usb/host/pci-quirks.c
+@@ -98,6 +98,7 @@ enum amd_chipset_gen {
+ 	AMD_CHIPSET_HUDSON2,
+ 	AMD_CHIPSET_BOLTON,
+ 	AMD_CHIPSET_YANGTZE,
++	AMD_CHIPSET_TAISHAN,
+ 	AMD_CHIPSET_UNKNOWN,
+ };
+ 
+@@ -141,6 +142,11 @@ static int amd_chipset_sb_type_init(struct amd_chipset_info *pinfo)
+ 			pinfo->sb_type.gen = AMD_CHIPSET_SB700;
+ 		else if (rev >= 0x40 && rev <= 0x4f)
+ 			pinfo->sb_type.gen = AMD_CHIPSET_SB800;
++	}
++	pinfo->smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD,
++					  0x145c, NULL);
++	if (pinfo->smbus_dev) {
++		pinfo->sb_type.gen = AMD_CHIPSET_TAISHAN;
+ 	} else {
+ 		pinfo->smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD,
+ 				PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, NULL);
+@@ -260,11 +266,12 @@ int usb_hcd_amd_remote_wakeup_quirk(struct pci_dev *pdev)
+ {
+ 	/* Make sure amd chipset type has already been initialized */
+ 	usb_amd_find_chipset_info();
+-	if (amd_chipset.sb_type.gen != AMD_CHIPSET_YANGTZE)
+-		return 0;
+-
+-	dev_dbg(&pdev->dev, "QUIRK: Enable AMD remote wakeup fix\n");
+-	return 1;
++	if (amd_chipset.sb_type.gen == AMD_CHIPSET_YANGTZE ||
++	    amd_chipset.sb_type.gen == AMD_CHIPSET_TAISHAN) {
++		dev_dbg(&pdev->dev, "QUIRK: Enable AMD remote wakeup fix\n");
++		return 1;
++	}
++	return 0;
+ }
+ EXPORT_SYMBOL_GPL(usb_hcd_amd_remote_wakeup_quirk);
+ 
+diff --git a/drivers/usb/musb/musb_host.c b/drivers/usb/musb/musb_host.c
+index 99beda9e241d..55c624f2a8c0 100644
+--- a/drivers/usb/musb/musb_host.c
++++ b/drivers/usb/musb/musb_host.c
+@@ -139,6 +139,7 @@ static void musb_h_tx_flush_fifo(struct musb_hw_ep *ep)
+ 				"Could not flush host TX%d fifo: csr: %04x\n",
+ 				ep->epnum, csr))
+ 			return;
++		mdelay(1);
+ 	}
+ }
+ 
+diff --git a/drivers/usb/renesas_usbhs/rcar3.c b/drivers/usb/renesas_usbhs/rcar3.c
+index d544b331c9f2..02b67abfc2a1 100644
+--- a/drivers/usb/renesas_usbhs/rcar3.c
++++ b/drivers/usb/renesas_usbhs/rcar3.c
+@@ -20,9 +20,13 @@
+ /* Low Power Status register (LPSTS) */
+ #define LPSTS_SUSPM	0x4000
+ 
+-/* USB General control register 2 (UGCTRL2), bit[31:6] should be 0 */
++/*
++ * USB General control register 2 (UGCTRL2)
++ * Remarks: bit[31:11] and bit[9:6] should be 0
++ */
+ #define UGCTRL2_RESERVED_3	0x00000001	/* bit[3:0] should be B'0001 */
+ #define UGCTRL2_USB0SEL_OTG	0x00000030
++#define UGCTRL2_VBUSSEL		0x00000400
+ 
+ static void usbhs_write32(struct usbhs_priv *priv, u32 reg, u32 data)
+ {
+@@ -34,7 +38,8 @@ static int usbhs_rcar3_power_ctrl(struct platform_device *pdev,
+ {
+ 	struct usbhs_priv *priv = usbhs_pdev_to_priv(pdev);
+ 
+-	usbhs_write32(priv, UGCTRL2, UGCTRL2_RESERVED_3 | UGCTRL2_USB0SEL_OTG);
++	usbhs_write32(priv, UGCTRL2, UGCTRL2_RESERVED_3 | UGCTRL2_USB0SEL_OTG |
++		      UGCTRL2_VBUSSEL);
+ 
+ 	if (enable) {
+ 		usbhs_bset(priv, LPSTS, LPSTS_SUSPM, LPSTS_SUSPM);
+diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c
+index 84b444f69c9b..470b17b0c11b 100644
+--- a/drivers/usb/serial/cp210x.c
++++ b/drivers/usb/serial/cp210x.c
+@@ -136,6 +136,7 @@ static const struct usb_device_id id_table[] = {
+ 	{ USB_DEVICE(0x10C4, 0x8998) }, /* KCF Technologies PRN */
+ 	{ USB_DEVICE(0x10C4, 0x8A2A) }, /* HubZ dual ZigBee and Z-Wave dongle */
+ 	{ USB_DEVICE(0x10C4, 0x8A5E) }, /* CEL EM3588 ZigBee USB Stick Long Range */
++	{ USB_DEVICE(0x10C4, 0x8B34) }, /* Qivicon ZigBee USB Radio Stick */
+ 	{ USB_DEVICE(0x10C4, 0xEA60) }, /* Silicon Labs factory default */
+ 	{ USB_DEVICE(0x10C4, 0xEA61) }, /* Silicon Labs factory default */
+ 	{ USB_DEVICE(0x10C4, 0xEA70) }, /* Silicon Labs factory default */
+diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c
+index ebe51f11105d..fe123153b1a5 100644
+--- a/drivers/usb/serial/option.c
++++ b/drivers/usb/serial/option.c
+@@ -2025,6 +2025,8 @@ static const struct usb_device_id option_ids[] = {
+ 	{ USB_DEVICE_INTERFACE_CLASS(0x2001, 0x7d04, 0xff) },			/* D-Link DWM-158 */
+ 	{ USB_DEVICE_INTERFACE_CLASS(0x2001, 0x7e19, 0xff),			/* D-Link DWM-221 B1 */
+ 	  .driver_info = (kernel_ulong_t)&net_intf4_blacklist },
++	{ USB_DEVICE_INTERFACE_CLASS(0x2001, 0x7e35, 0xff),			/* D-Link DWM-222 */
++	  .driver_info = (kernel_ulong_t)&net_intf4_blacklist },
+ 	{ USB_DEVICE_AND_INTERFACE_INFO(0x07d1, 0x3e01, 0xff, 0xff, 0xff) }, /* D-Link DWM-152/C1 */
+ 	{ USB_DEVICE_AND_INTERFACE_INFO(0x07d1, 0x3e02, 0xff, 0xff, 0xff) }, /* D-Link DWM-156/C1 */
+ 	{ USB_DEVICE_AND_INTERFACE_INFO(0x07d1, 0x7e11, 0xff, 0xff, 0xff) }, /* D-Link DWM-156/A3 */
+diff --git a/drivers/usb/serial/pl2303.c b/drivers/usb/serial/pl2303.c
+index 1db4b61bdf7b..a51b28379850 100644
+--- a/drivers/usb/serial/pl2303.c
++++ b/drivers/usb/serial/pl2303.c
+@@ -49,6 +49,7 @@ static const struct usb_device_id id_table[] = {
+ 	{ USB_DEVICE(IODATA_VENDOR_ID, IODATA_PRODUCT_ID) },
+ 	{ USB_DEVICE(IODATA_VENDOR_ID, IODATA_PRODUCT_ID_RSAQ5) },
+ 	{ USB_DEVICE(ATEN_VENDOR_ID, ATEN_PRODUCT_ID) },
++	{ USB_DEVICE(ATEN_VENDOR_ID, ATEN_PRODUCT_UC485) },
+ 	{ USB_DEVICE(ATEN_VENDOR_ID, ATEN_PRODUCT_ID2) },
+ 	{ USB_DEVICE(ATEN_VENDOR_ID2, ATEN_PRODUCT_ID) },
+ 	{ USB_DEVICE(ELCOM_VENDOR_ID, ELCOM_PRODUCT_ID) },
+diff --git a/drivers/usb/serial/pl2303.h b/drivers/usb/serial/pl2303.h
+index 09d9be88209e..3b5a15d1dc0d 100644
+--- a/drivers/usb/serial/pl2303.h
++++ b/drivers/usb/serial/pl2303.h
+@@ -27,6 +27,7 @@
+ #define ATEN_VENDOR_ID		0x0557
+ #define ATEN_VENDOR_ID2		0x0547
+ #define ATEN_PRODUCT_ID		0x2008
++#define ATEN_PRODUCT_UC485	0x2021
+ #define ATEN_PRODUCT_ID2	0x2118
+ 
+ #define IODATA_VENDOR_ID	0x04bb
+diff --git a/drivers/usb/storage/unusual_uas.h b/drivers/usb/storage/unusual_uas.h
+index cbea9f329e71..cde115359793 100644
+--- a/drivers/usb/storage/unusual_uas.h
++++ b/drivers/usb/storage/unusual_uas.h
+@@ -124,9 +124,9 @@ UNUSUAL_DEV(0x0bc2, 0xab2a, 0x0000, 0x9999,
+ /* Reported-by: Benjamin Tissoires <benjamin.tissoires@redhat.com> */
+ UNUSUAL_DEV(0x13fd, 0x3940, 0x0000, 0x9999,
+ 		"Initio Corporation",
+-		"",
++		"INIC-3069",
+ 		USB_SC_DEVICE, USB_PR_DEVICE, NULL,
+-		US_FL_NO_ATA_1X),
++		US_FL_NO_ATA_1X | US_FL_IGNORE_RESIDUE),
+ 
+ /* Reported-by: Tom Arild Naess <tanaess@gmail.com> */
+ UNUSUAL_DEV(0x152d, 0x0539, 0x0000, 0x9999,
+diff --git a/fs/fuse/file.c b/fs/fuse/file.c
+index 5ec5870e423a..996aa23c409e 100644
+--- a/fs/fuse/file.c
++++ b/fs/fuse/file.c
+@@ -46,7 +46,7 @@ struct fuse_file *fuse_file_alloc(struct fuse_conn *fc)
+ {
+ 	struct fuse_file *ff;
+ 
+-	ff = kmalloc(sizeof(struct fuse_file), GFP_KERNEL);
++	ff = kzalloc(sizeof(struct fuse_file), GFP_KERNEL);
+ 	if (unlikely(!ff))
+ 		return NULL;
+ 
+diff --git a/fs/nfs/Kconfig b/fs/nfs/Kconfig
+index f31fd0dd92c6..b1daeafbea92 100644
+--- a/fs/nfs/Kconfig
++++ b/fs/nfs/Kconfig
+@@ -121,6 +121,7 @@ config PNFS_FILE_LAYOUT
+ config PNFS_BLOCK
+ 	tristate
+ 	depends on NFS_V4_1 && BLK_DEV_DM
++	depends on 64BIT || LBDAF
+ 	default NFS_V4
+ 
+ config PNFS_OBJLAYOUT
+diff --git a/fs/nfs/flexfilelayout/flexfilelayoutdev.c b/fs/nfs/flexfilelayout/flexfilelayoutdev.c
+index f7a3f6b05369..90099896b838 100644
+--- a/fs/nfs/flexfilelayout/flexfilelayoutdev.c
++++ b/fs/nfs/flexfilelayout/flexfilelayoutdev.c
+@@ -30,6 +30,7 @@ void nfs4_ff_layout_free_deviceid(struct nfs4_ff_layout_ds *mirror_ds)
+ {
+ 	nfs4_print_deviceid(&mirror_ds->id_node.deviceid);
+ 	nfs4_pnfs_ds_put(mirror_ds->ds);
++	kfree(mirror_ds->ds_versions);
+ 	kfree_rcu(mirror_ds, id_node.rcu);
+ }
+ 
+diff --git a/include/target/iscsi/iscsi_target_core.h b/include/target/iscsi/iscsi_target_core.h
+index c8132b419148..6021c3acb6c5 100644
+--- a/include/target/iscsi/iscsi_target_core.h
++++ b/include/target/iscsi/iscsi_target_core.h
+@@ -785,6 +785,7 @@ struct iscsi_np {
+ 	int			np_sock_type;
+ 	enum np_thread_state_table np_thread_state;
+ 	bool                    enabled;
++	atomic_t		np_reset_count;
+ 	enum iscsi_timer_flags_table np_login_timer_flags;
+ 	u32			np_exports;
+ 	enum np_flags_table	np_flags;
+diff --git a/kernel/futex.c b/kernel/futex.c
+index 4c6b6e697b73..88bad86180ac 100644
+--- a/kernel/futex.c
++++ b/kernel/futex.c
+@@ -668,13 +668,14 @@ get_futex_key(u32 __user *uaddr, int fshared, union futex_key *key, int rw)
+ 		 * this reference was taken by ihold under the page lock
+ 		 * pinning the inode in place so i_lock was unnecessary. The
+ 		 * only way for this check to fail is if the inode was
+-		 * truncated in parallel so warn for now if this happens.
++		 * truncated in parallel which is almost certainly an
++		 * application bug. In such a case, just retry.
+ 		 *
+ 		 * We are not calling into get_futex_key_refs() in file-backed
+ 		 * cases, therefore a successful atomic_inc return below will
+ 		 * guarantee that get_futex_key() will still imply smp_mb(); (B).
+ 		 */
+-		if (WARN_ON_ONCE(!atomic_inc_not_zero(&inode->i_count))) {
++		if (!atomic_inc_not_zero(&inode->i_count)) {
+ 			rcu_read_unlock();
+ 			put_page(page);
+ 
+diff --git a/mm/page_alloc.c b/mm/page_alloc.c
+index 77b797c2d094..9419aa4e5441 100644
+--- a/mm/page_alloc.c
++++ b/mm/page_alloc.c
+@@ -7335,7 +7335,7 @@ int alloc_contig_range(unsigned long start, unsigned long end,
+ 
+ 	/* Make sure the range is really isolated. */
+ 	if (test_pages_isolated(outer_start, end, false)) {
+-		pr_info("%s: [%lx, %lx) PFNs busy\n",
++		pr_info_ratelimited("%s: [%lx, %lx) PFNs busy\n",
+ 			__func__, outer_start, end);
+ 		ret = -EBUSY;
+ 		goto done;
+diff --git a/mm/shmem.c b/mm/shmem.c
+index d99cfb6eb03a..7ee5444ffb6d 100644
+--- a/mm/shmem.c
++++ b/mm/shmem.c
+@@ -1007,7 +1007,11 @@ static int shmem_setattr(struct dentry *dentry, struct iattr *attr)
+ 			 */
+ 			if (IS_ENABLED(CONFIG_TRANSPARENT_HUGE_PAGECACHE)) {
+ 				spin_lock(&sbinfo->shrinklist_lock);
+-				if (list_empty(&info->shrinklist)) {
++				/*
++				 * _careful to defend against unlocked access to
++				 * ->shrink_list in shmem_unused_huge_shrink()
++				 */
++				if (list_empty_careful(&info->shrinklist)) {
+ 					list_add_tail(&info->shrinklist,
+ 							&sbinfo->shrinklist);
+ 					sbinfo->shrinklist_len++;
+@@ -1774,7 +1778,11 @@ alloc_nohuge:		page = shmem_alloc_and_acct_page(gfp, info, sbinfo,
+ 			 * to shrink under memory pressure.
+ 			 */
+ 			spin_lock(&sbinfo->shrinklist_lock);
+-			if (list_empty(&info->shrinklist)) {
++			/*
++			 * _careful to defend against unlocked access to
++			 * ->shrink_list in shmem_unused_huge_shrink()
++			 */
++			if (list_empty_careful(&info->shrinklist)) {
+ 				list_add_tail(&info->shrinklist,
+ 						&sbinfo->shrinklist);
+ 				sbinfo->shrinklist_len++;