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authorths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-06-07 17:38:50 +0000
committerths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-06-07 17:38:50 +0000
commit0f78cf0c442549e32c877ce37b4201af03e19a43 (patch)
tree4aeb207a641c0d3a2609d94b1502b16500a66675 /hw/gt64xxx.c
parentPCI device saving for GT64xxx. (diff)
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Fix some Malta PCI config bits.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2955 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/gt64xxx.c')
-rw-r--r--hw/gt64xxx.c22
1 files changed, 13 insertions, 9 deletions
diff --git a/hw/gt64xxx.c b/hw/gt64xxx.c
index 76472df39..f36e24abf 100644
--- a/hw/gt64xxx.c
+++ b/hw/gt64xxx.c
@@ -984,26 +984,30 @@ PCIBus *pci_gt64120_init(qemu_irq *pic)
d = pci_register_device(s->pci->bus, "GT64120 PCI Bus", sizeof(PCIDevice),
0, gt64120_read_config, gt64120_write_config);
+ /* FIXME: Malta specific hw assumptions ahead */
+
d->config[0x00] = 0xab; // vendor_id
d->config[0x01] = 0x11;
d->config[0x02] = 0x20; // device_id
d->config[0x03] = 0x46;
- d->config[0x04] = 0x06;
+
+ d->config[0x04] = 0x00;
d->config[0x05] = 0x00;
d->config[0x06] = 0x80;
- d->config[0x07] = 0xa2;
+ d->config[0x07] = 0x02;
+
d->config[0x08] = 0x10;
d->config[0x09] = 0x00;
- d->config[0x0A] = 0x80;
- d->config[0x0B] = 0x05;
- d->config[0x0C] = 0x08;
- d->config[0x0D] = 0x40;
- d->config[0x0E] = 0x00;
- d->config[0x0F] = 0x00;
- d->config[0x17] = 0x08;
+ d->config[0x0A] = 0x00;
+ d->config[0x0B] = 0x06;
+
+ d->config[0x10] = 0x08;
+ d->config[0x14] = 0x08;
+ d->config[0x17] = 0x01;
d->config[0x1B] = 0x1c;
d->config[0x1F] = 0x1f;
d->config[0x23] = 0x14;
+ d->config[0x24] = 0x01;
d->config[0x27] = 0x14;
d->config[0x3D] = 0x01;