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author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-05-30 20:46:02 +0000 |
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committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-05-30 20:46:02 +0000 |
commit | 51b2772f28f51b04e10e6e51f411f7246e1159d9 (patch) | |
tree | 46ac64740a6e04204a5e8285a715d5c564311b7f /hw/mips_pica61.c | |
parent | Replace target_ulong with target_phys_addr_t (diff) | |
download | qemu-kvm-51b2772f28f51b04e10e6e51f411f7246e1159d9.tar.gz qemu-kvm-51b2772f28f51b04e10e6e51f411f7246e1159d9.tar.bz2 qemu-kvm-51b2772f28f51b04e10e6e51f411f7246e1159d9.zip |
Fix CPU (re-)selection on reset.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2900 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/mips_pica61.c')
-rw-r--r-- | hw/mips_pica61.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/mips_pica61.c b/hw/mips_pica61.c index 40ea8b5a6..5bb340535 100644 --- a/hw/mips_pica61.c +++ b/hw/mips_pica61.c @@ -51,6 +51,7 @@ static void main_cpu_reset(void *opaque) { CPUState *env = opaque; cpu_reset(env); + cpu_mips_register(env, NULL); } static |