diff options
| author |   balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-05-08 19:03:12 +0000 |
|---|---|---|
| committer | balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-05-08 19:03:12 +0000 |
| commit | d95b2f8d365a3ef431111e9188d219de1f577a90 (patch) | |
| tree | 218856598a07ffa4ef0bfac361738c8c7881b847 /hw/pxa2xx_lcd.c | |
| parent | ARM946 CPU support. (diff) | |
| download | qemu-kvm-d95b2f8d365a3ef431111e9188d219de1f577a90.tar.gz qemu-kvm-d95b2f8d365a3ef431111e9188d219de1f577a90.tar.bz2 qemu-kvm-d95b2f8d365a3ef431111e9188d219de1f577a90.zip | |
Switch to qemu_ram_alloc() for memory allocation in PXA255/270.
Pass correct RAM size to arm_load_kernel (currently unused) - thanks to BobOfDoom.
Register the Xscale Internal Memory Storage.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2784 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/pxa2xx_lcd.c')
| -rw-r--r-- | hw/pxa2xx_lcd.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/hw/pxa2xx_lcd.c b/hw/pxa2xx_lcd.c index a599dd768..a594e278f 100644 --- a/hw/pxa2xx_lcd.c +++ b/hw/pxa2xx_lcd.c @@ -300,11 +300,11 @@ static void pxa2xx_descriptor_load(struct pxa2xx_lcdc_s *s) } else descptr = s->dma_ch[i].descriptor; - if (!(descptr >= PXA2XX_RAM_BASE && descptr + - sizeof(*desc[i]) <= PXA2XX_RAM_BASE + phys_ram_size)) + if (!(descptr >= PXA2XX_SDRAM_BASE && descptr + + sizeof(*desc[i]) <= PXA2XX_SDRAM_BASE + phys_ram_size)) continue; - descptr -= PXA2XX_RAM_BASE; + descptr -= PXA2XX_SDRAM_BASE; desc[i] = (struct pxa_frame_descriptor_s *) (phys_ram_base + descptr); s->dma_ch[i].descriptor = desc[i]->fdaddr; s->dma_ch[i].source = desc[i]->fsaddr; @@ -855,12 +855,12 @@ static void pxa2xx_update_display(void *opaque) continue; } fbptr = s->dma_ch[ch].source; - if (!(fbptr >= PXA2XX_RAM_BASE && - fbptr <= PXA2XX_RAM_BASE + phys_ram_size)) { + if (!(fbptr >= PXA2XX_SDRAM_BASE && + fbptr <= PXA2XX_SDRAM_BASE + phys_ram_size)) { pxa2xx_dma_ber_set(s, ch); continue; } - fbptr -= PXA2XX_RAM_BASE; + fbptr -= PXA2XX_SDRAM_BASE; fb = phys_ram_base + fbptr; if (s->dma_ch[ch].command & LDCMD_PAL) { |