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authoredgar_igl <edgar_igl@c046a42c-6fe2-441c-8c8c-71466251a162>2009-01-07 13:19:21 +0000
committeredgar_igl <edgar_igl@c046a42c-6fe2-441c-8c8c-71466251a162>2009-01-07 13:19:21 +0000
commitc38ac98da54d2da7a71efde0cbf5ad9021dac4e4 (patch)
tree2809c60bcfba776eb7369eecef6142724c4a84ea /target-cris
parentCRIS: bound operates directly on regs, no need to allocate temp destination. (diff)
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CRIS: Use a helper for lz.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6205 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-cris')
-rw-r--r--target-cris/helper.h1
-rw-r--r--target-cris/op_helper.c6
-rw-r--r--target-cris/translate.c70
3 files changed, 8 insertions, 69 deletions
diff --git a/target-cris/helper.h b/target-cris/helper.h
index 18195a01b..339a59a04 100644
--- a/target-cris/helper.h
+++ b/target-cris/helper.h
@@ -10,6 +10,7 @@ DEF_HELPER_0(rfn, void);
DEF_HELPER_2(movl_sreg_reg, void, i32, i32)
DEF_HELPER_2(movl_reg_sreg, void, i32, i32)
+DEF_HELPER_FLAGS_1(lz, TCG_CALL_PURE, i32, i32);
DEF_HELPER_FLAGS_3(btst, TCG_CALL_PURE, i32, i32, i32, i32);
DEF_HELPER_0(evaluate_flags_muls, void)
diff --git a/target-cris/op_helper.c b/target-cris/op_helper.c
index 6b2398074..144da9c3e 100644
--- a/target-cris/op_helper.c
+++ b/target-cris/op_helper.c
@@ -23,6 +23,7 @@
#include "exec.h"
#include "mmu.h"
#include "helper.h"
+#include "host-utils.h"
#define D(x)
@@ -243,6 +244,11 @@ void helper_rfn(void)
env->pregs[PR_CCS] |= M_FLAG;
}
+uint32_t helper_lz(uint32_t t0)
+{
+ return clz32(t0);
+}
+
uint32_t helper_btst(uint32_t t0, uint32_t t1, uint32_t ccs)
{
/* FIXME: clean this up. */
diff --git a/target-cris/translate.c b/target-cris/translate.c
index b9aae8662..735e4442a 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -320,74 +320,6 @@ static void t_gen_mulu(TCGv d, TCGv d2, TCGv a, TCGv b)
tcg_temp_free_i64(t1);
}
-/* 32bit branch-free binary search for counting leading zeros. */
-static void t_gen_lz_i32(TCGv d, TCGv x)
-{
- TCGv_i32 y, m, n;
-
- y = tcg_temp_new_i32();
- m = tcg_temp_new_i32();
- n = tcg_temp_new_i32();
-
- /* y = -(x >> 16) */
- tcg_gen_shri_i32(y, x, 16);
- tcg_gen_neg_i32(y, y);
-
- /* m = (y >> 16) & 16 */
- tcg_gen_sari_i32(m, y, 16);
- tcg_gen_andi_i32(m, m, 16);
-
- /* n = 16 - m */
- tcg_gen_sub_i32(n, tcg_const_i32(16), m);
- /* x = x >> m */
- tcg_gen_shr_i32(x, x, m);
-
- /* y = x - 0x100 */
- tcg_gen_subi_i32(y, x, 0x100);
- /* m = (y >> 16) & 8 */
- tcg_gen_sari_i32(m, y, 16);
- tcg_gen_andi_i32(m, m, 8);
- /* n = n + m */
- tcg_gen_add_i32(n, n, m);
- /* x = x << m */
- tcg_gen_shl_i32(x, x, m);
-
- /* y = x - 0x1000 */
- tcg_gen_subi_i32(y, x, 0x1000);
- /* m = (y >> 16) & 4 */
- tcg_gen_sari_i32(m, y, 16);
- tcg_gen_andi_i32(m, m, 4);
- /* n = n + m */
- tcg_gen_add_i32(n, n, m);
- /* x = x << m */
- tcg_gen_shl_i32(x, x, m);
-
- /* y = x - 0x4000 */
- tcg_gen_subi_i32(y, x, 0x4000);
- /* m = (y >> 16) & 2 */
- tcg_gen_sari_i32(m, y, 16);
- tcg_gen_andi_i32(m, m, 2);
- /* n = n + m */
- tcg_gen_add_i32(n, n, m);
- /* x = x << m */
- tcg_gen_shl_i32(x, x, m);
-
- /* y = x >> 14 */
- tcg_gen_shri_i32(y, x, 14);
- /* m = y & ~(y >> 1) */
- tcg_gen_sari_i32(m, y, 1);
- tcg_gen_not_i32(m, m);
- tcg_gen_and_i32(m, m, y);
-
- /* d = n + 2 - m */
- tcg_gen_addi_i32(d, n, 2);
- tcg_gen_sub_i32(d, d, m);
-
- tcg_temp_free(y);
- tcg_temp_free(m);
- tcg_temp_free(n);
-}
-
static void t_gen_cris_dstep(TCGv d, TCGv a, TCGv b)
{
int l1;
@@ -825,7 +757,7 @@ static void cris_alu_op_exec(DisasContext *dc, int op,
t_gen_subx_carry(dc, dst);
break;
case CC_OP_LZ:
- t_gen_lz_i32(dst, b);
+ gen_helper_lz(dst, b);
break;
case CC_OP_MULS:
t_gen_muls(dst, cpu_PR[PR_MOF], a, b);