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authorHervé Poussineau <hpoussin@reactos.org>2010-07-31 12:29:03 +0200
committerAurelien Jarno <aurelien@aurel32.net>2010-07-31 17:14:52 +0200
commit671b0f368bda45e6bcb7a86a6cd49bb90cce3e17 (patch)
treeceef4eb85d3fc229bbe0e74cacda1add2ea6344c /target-mips
parentRemove unused constant (diff)
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Correctly identify multiple cpus in SMP systems
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-mips')
-rw-r--r--target-mips/op_helper.c3
-rw-r--r--target-mips/translate.c3
2 files changed, 2 insertions, 4 deletions
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index a619b7261..50c65bdc3 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -1359,8 +1359,7 @@ void helper_mtc0_cause (target_ulong arg1)
void helper_mtc0_ebase (target_ulong arg1)
{
/* vectored interrupts not implemented */
- /* Multi-CPU not implemented */
- env->CP0_EBase = 0x80000000 | (arg1 & 0x3FFFF000);
+ env->CP0_EBase = (env->CP0_EBase & ~0x3FFFF000) | (arg1 & 0x3FFFF000);
}
void helper_mtc0_config0 (target_ulong arg1)
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 6c72dee1b..20b66a8a5 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -12679,8 +12679,7 @@ void cpu_reset (CPUMIPSState *env)
env->CP0_Random = env->tlb->nb_tlb - 1;
env->tlb->tlb_in_use = env->tlb->nb_tlb;
env->CP0_Wired = 0;
- /* SMP not implemented */
- env->CP0_EBase = 0x80000000;
+ env->CP0_EBase = 0x80000000 | (env->cpu_index & 0x3FF);
env->CP0_Status = (1 << CP0St_BEV) | (1 << CP0St_ERL);
/* vectored interrupts not implemented, timer on int 7,
no performance counters. */