Merge commit '1452411b25fb207e7f442e5a5128f34b4939d31c' into upstream-merge

* commit '1452411b25fb207e7f442e5a5128f34b4939d31c': (38 commits)
  Route PC irqs to ISA bus instead of i8259 directly
  Makefile: fixed rule TAGS
  QEMU set irq0override in fw_cfg
  SMART ATA Functionality
  Add missing linefeed in error message
  Clean up VGA type selection; far too many variables being used to track one state leads to confusion if new variables are added.
  When using stdio monitor and VNC display, one can set or clear a VNC password; this should set or turn off VNC authentication as well.
  Don't segfault when changing VNC password on an SDL display.
  Fix detached migration with exec.
  Do not disable autostart for live migration
  make vga screen_dump use DisplayState properly
  Restore consistent formatting
  es1370: Remove unused indirection of PCIES1370State and ES1370State
  Fix device name completion for 'eject'
  Revert my commit c00a9de060124a988bd9847c095e5836488c6f01
  Fix segfault of qemu-system-arm with PXA target
  sdl.c: support 32 bpp cursors
  Use corect depth from DisplaySurface in vmware_vga.c
  Remove the unnecessary and only global in musicpal.c
  Make musicpal.c use the I2C device and the Marvell 88w8618 audio device
  ...

Conflicts:
	hw/pc.c

Signed-off-by: Avi Kivity <avi@redhat.com>

1 files changed, 172 insertions, 189 deletions

diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index 8daf9758a..ba2a49534 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -105,23 +105,23 @@ target_phys_addr_t cpu_get_phys_page_debug (CPUState *env, target_ulong addr)
 
 #else
 /* Common routines used by software and hardware TLBs emulation */
-static always_inline int pte_is_valid (target_ulong pte0)
+static inline int pte_is_valid(target_ulong pte0)
 {
     return pte0 & 0x80000000 ? 1 : 0;
 }
 
-static always_inline void pte_invalidate (target_ulong *pte0)
+static inline void pte_invalidate(target_ulong *pte0)
 {
     *pte0 &= ~0x80000000;
 }
 
 #if defined(TARGET_PPC64)
-static always_inline int pte64_is_valid (target_ulong pte0)
+static inline int pte64_is_valid(target_ulong pte0)
 {
     return pte0 & 0x0000000000000001ULL ? 1 : 0;
 }
 
-static always_inline void pte64_invalidate (target_ulong *pte0)
+static inline void pte64_invalidate(target_ulong *pte0)
 {
     *pte0 &= ~0x0000000000000001ULL;
 }
@@ -134,7 +134,7 @@ static always_inline void pte64_invalidate (target_ulong *pte0)
 #define PTE64_CHECK_MASK (TARGET_PAGE_MASK | 0x7F)
 #endif
 
-static always_inline int pp_check (int key, int pp, int nx)
+static inline int pp_check(int key, int pp, int nx)
 {
     int access;
 
@@ -174,7 +174,7 @@ static always_inline int pp_check (int key, int pp, int nx)
     return access;
 }
 
-static always_inline int check_prot (int prot, int rw, int access_type)
+static inline int check_prot(int prot, int rw, int access_type)
 {
     int ret;
 
@@ -198,9 +198,8 @@ static always_inline int check_prot (int prot, int rw, int access_type)
     return ret;
 }
 
-static always_inline int _pte_check (mmu_ctx_t *ctx, int is_64b,
-                                     target_ulong pte0, target_ulong pte1,
-                                     int h, int rw, int type)
+static inline int _pte_check(mmu_ctx_t *ctx, int is_64b, target_ulong pte0,
+                             target_ulong pte1, int h, int rw, int type)
 {
     target_ulong ptem, mmask;
     int access, ret, pteh, ptev, pp;
@@ -261,24 +260,22 @@ static always_inline int _pte_check (mmu_ctx_t *ctx, int is_64b,
     return ret;
 }
 
-static always_inline int pte32_check (mmu_ctx_t *ctx,
-                                      target_ulong pte0, target_ulong pte1,
-                                      int h, int rw, int type)
+static inline int pte32_check(mmu_ctx_t *ctx, target_ulong pte0,
+                              target_ulong pte1, int h, int rw, int type)
 {
     return _pte_check(ctx, 0, pte0, pte1, h, rw, type);
 }
 
 #if defined(TARGET_PPC64)
-static always_inline int pte64_check (mmu_ctx_t *ctx,
-                                      target_ulong pte0, target_ulong pte1,
-                                      int h, int rw, int type)
+static inline int pte64_check(mmu_ctx_t *ctx, target_ulong pte0,
+                              target_ulong pte1, int h, int rw, int type)
 {
     return _pte_check(ctx, 1, pte0, pte1, h, rw, type);
 }
 #endif
 
-static always_inline int pte_update_flags (mmu_ctx_t *ctx, target_ulong *pte1p,
-                                           int ret, int rw)
+static inline int pte_update_flags(mmu_ctx_t *ctx, target_ulong *pte1p,
+                                   int ret, int rw)
 {
     int store = 0;
 
@@ -303,8 +300,8 @@ static always_inline int pte_update_flags (mmu_ctx_t *ctx, target_ulong *pte1p,
 }
 
 /* Software driven TLB helpers */
-static always_inline int ppc6xx_tlb_getnum (CPUState *env, target_ulong eaddr,
-                                            int way, int is_code)
+static inline int ppc6xx_tlb_getnum(CPUState *env, target_ulong eaddr, int way,
+                                    int is_code)
 {
     int nr;
 
@@ -319,7 +316,7 @@ static always_inline int ppc6xx_tlb_getnum (CPUState *env, target_ulong eaddr,
     return nr;
 }
 
-static always_inline void ppc6xx_tlb_invalidate_all (CPUState *env)
+static inline void ppc6xx_tlb_invalidate_all(CPUState *env)
 {
     ppc6xx_tlb_t *tlb;
     int nr, max;
@@ -336,10 +333,9 @@ static always_inline void ppc6xx_tlb_invalidate_all (CPUState *env)
     tlb_flush(env, 1);
 }
 
-static always_inline void __ppc6xx_tlb_invalidate_virt (CPUState *env,
-                                                        target_ulong eaddr,
-                                                        int is_code,
-                                                        int match_epn)
+static inline void __ppc6xx_tlb_invalidate_virt(CPUState *env,
+                                                target_ulong eaddr,
+                                                int is_code, int match_epn)
 {
 #if !defined(FLUSH_ALL_TLBS)
     ppc6xx_tlb_t *tlb;
@@ -350,8 +346,8 @@ static always_inline void __ppc6xx_tlb_invalidate_virt (CPUState *env,
         nr = ppc6xx_tlb_getnum(env, eaddr, way, is_code);
         tlb = &env->tlb[nr].tlb6;
         if (pte_is_valid(tlb->pte0) && (match_epn == 0 || eaddr == tlb->EPN)) {
-            LOG_SWTLB("TLB invalidate %d/%d " ADDRX "\n",
-                        nr, env->nb_tlb, eaddr);
+            LOG_SWTLB("TLB invalidate %d/%d " TARGET_FMT_lx "\n", nr,
+                      env->nb_tlb, eaddr);
             pte_invalidate(&tlb->pte0);
             tlb_flush_page(env, tlb->EPN);
         }
@@ -362,9 +358,8 @@ static always_inline void __ppc6xx_tlb_invalidate_virt (CPUState *env,
 #endif
 }
 
-static always_inline void ppc6xx_tlb_invalidate_virt (CPUState *env,
-                                                      target_ulong eaddr,
-                                                      int is_code)
+static inline void ppc6xx_tlb_invalidate_virt(CPUState *env,
+                                              target_ulong eaddr, int is_code)
 {
     __ppc6xx_tlb_invalidate_virt(env, eaddr, is_code, 0);
 }
@@ -377,8 +372,8 @@ void ppc6xx_tlb_store (CPUState *env, target_ulong EPN, int way, int is_code,
 
     nr = ppc6xx_tlb_getnum(env, EPN, way, is_code);
     tlb = &env->tlb[nr].tlb6;
-    LOG_SWTLB("Set TLB %d/%d EPN " ADDRX " PTE0 " ADDRX
-                " PTE1 " ADDRX "\n", nr, env->nb_tlb, EPN, pte0, pte1);
+    LOG_SWTLB("Set TLB %d/%d EPN " TARGET_FMT_lx " PTE0 " TARGET_FMT_lx
+              " PTE1 " TARGET_FMT_lx "\n", nr, env->nb_tlb, EPN, pte0, pte1);
     /* Invalidate any pending reference in Qemu for this virtual address */
     __ppc6xx_tlb_invalidate_virt(env, EPN, is_code, 1);
     tlb->pte0 = pte0;
@@ -388,9 +383,8 @@ void ppc6xx_tlb_store (CPUState *env, target_ulong EPN, int way, int is_code,
     env->last_way = way;
 }
 
-static always_inline int ppc6xx_tlb_check (CPUState *env, mmu_ctx_t *ctx,
-                                           target_ulong eaddr, int rw,
-                                           int access_type)
+static inline int ppc6xx_tlb_check(CPUState *env, mmu_ctx_t *ctx,
+                                   target_ulong eaddr, int rw, int access_type)
 {
     ppc6xx_tlb_t *tlb;
     int nr, best, way;
@@ -404,19 +398,17 @@ static always_inline int ppc6xx_tlb_check (CPUState *env, mmu_ctx_t *ctx,
         tlb = &env->tlb[nr].tlb6;
         /* This test "emulates" the PTE index match for hardware TLBs */
         if ((eaddr & TARGET_PAGE_MASK) != tlb->EPN) {
-            LOG_SWTLB("TLB %d/%d %s [" ADDRX " " ADDRX
-                        "] <> " ADDRX "\n",
-                        nr, env->nb_tlb,
-                        pte_is_valid(tlb->pte0) ? "valid" : "inval",
-                        tlb->EPN, tlb->EPN + TARGET_PAGE_SIZE, eaddr);
+            LOG_SWTLB("TLB %d/%d %s [" TARGET_FMT_lx " " TARGET_FMT_lx
+                      "] <> " TARGET_FMT_lx "\n", nr, env->nb_tlb,
+                      pte_is_valid(tlb->pte0) ? "valid" : "inval",
+                      tlb->EPN, tlb->EPN + TARGET_PAGE_SIZE, eaddr);
             continue;
         }
-        LOG_SWTLB("TLB %d/%d %s " ADDRX " <> " ADDRX " " ADDRX
-                    " %c %c\n",
-                    nr, env->nb_tlb,
-                    pte_is_valid(tlb->pte0) ? "valid" : "inval",
-                    tlb->EPN, eaddr, tlb->pte1,
-                    rw ? 'S' : 'L', access_type == ACCESS_CODE ? 'I' : 'D');
+        LOG_SWTLB("TLB %d/%d %s " TARGET_FMT_lx " <> " TARGET_FMT_lx " "
+                  TARGET_FMT_lx " %c %c\n", nr, env->nb_tlb,
+                  pte_is_valid(tlb->pte0) ? "valid" : "inval",
+                  tlb->EPN, eaddr, tlb->pte1,
+                  rw ? 'S' : 'L', access_type == ACCESS_CODE ? 'I' : 'D');
         switch (pte32_check(ctx, tlb->pte0, tlb->pte1, 0, rw, access_type)) {
         case -3:
             /* TLB inconsistency */
@@ -443,8 +435,8 @@ static always_inline int ppc6xx_tlb_check (CPUState *env, mmu_ctx_t *ctx,
     }
     if (best != -1) {
     done:
-        LOG_SWTLB("found TLB at addr " PADDRX " prot=%01x ret=%d\n",
-                    ctx->raddr & TARGET_PAGE_MASK, ctx->prot, ret);
+        LOG_SWTLB("found TLB at addr " TARGET_FMT_plx " prot=%01x ret=%d\n",
+                  ctx->raddr & TARGET_PAGE_MASK, ctx->prot, ret);
         /* Update page flags */
         pte_update_flags(ctx, &env->tlb[best].tlb6.pte1, ret, rw);
     }
@@ -453,9 +445,9 @@ static always_inline int ppc6xx_tlb_check (CPUState *env, mmu_ctx_t *ctx,
 }
 
 /* Perform BAT hit & translation */
-static always_inline void bat_size_prot (CPUState *env, target_ulong *blp,
-                                         int *validp, int *protp,
-                                         target_ulong *BATu, target_ulong *BATl)
+static inline void bat_size_prot(CPUState *env, target_ulong *blp, int *validp,
+                                 int *protp, target_ulong *BATu,
+                                 target_ulong *BATl)
 {
     target_ulong bl;
     int pp, valid, prot;
@@ -478,17 +470,16 @@ static always_inline void bat_size_prot (CPUState *env, target_ulong *blp,
     *protp = prot;
 }
 
-static always_inline void bat_601_size_prot (CPUState *env,target_ulong *blp,
-                                             int *validp, int *protp,
-                                             target_ulong *BATu,
-                                             target_ulong *BATl)
+static inline void bat_601_size_prot(CPUState *env, target_ulong *blp,
+                                     int *validp, int *protp,
+                                     target_ulong *BATu, target_ulong *BATl)
 {
     target_ulong bl;
     int key, pp, valid, prot;
 
     bl = (*BATl & 0x0000003F) << 17;
-    LOG_BATS("b %02x ==> bl " ADDRX " msk " ADDRX "\n",
-                (uint8_t)(*BATl & 0x0000003F), bl, ~bl);
+    LOG_BATS("b %02x ==> bl " TARGET_FMT_lx " msk " TARGET_FMT_lx "\n",
+             (uint8_t)(*BATl & 0x0000003F), bl, ~bl);
     prot = 0;
     valid = (*BATl >> 6) & 1;
     if (valid) {
@@ -504,16 +495,16 @@ static always_inline void bat_601_size_prot (CPUState *env,target_ulong *blp,
     *protp = prot;
 }
 
-static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx,
-                                  target_ulong virtual, int rw, int type)
+static inline int get_bat(CPUState *env, mmu_ctx_t *ctx, target_ulong virtual,
+                          int rw, int type)
 {
     target_ulong *BATlt, *BATut, *BATu, *BATl;
     target_ulong base, BEPIl, BEPIu, bl;
     int i, valid, prot;
     int ret = -1;
 
-    LOG_BATS("%s: %cBAT v " ADDRX "\n", __func__,
-                type == ACCESS_CODE ? 'I' : 'D', virtual);
+    LOG_BATS("%s: %cBAT v " TARGET_FMT_lx "\n", __func__,
+             type == ACCESS_CODE ? 'I' : 'D', virtual);
     switch (type) {
     case ACCESS_CODE:
         BATlt = env->IBAT[1];
@@ -535,9 +526,9 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx,
         } else {
             bat_size_prot(env, &bl, &valid, &prot, BATu, BATl);
         }
-        LOG_BATS("%s: %cBAT%d v " ADDRX " BATu " ADDRX
-                    " BATl " ADDRX "\n", __func__,
-                    type == ACCESS_CODE ? 'I' : 'D', i, virtual, *BATu, *BATl);
+        LOG_BATS("%s: %cBAT%d v " TARGET_FMT_lx " BATu " TARGET_FMT_lx
+                 " BATl " TARGET_FMT_lx "\n", __func__,
+                 type == ACCESS_CODE ? 'I' : 'D', i, virtual, *BATu, *BATl);
         if ((virtual & 0xF0000000) == BEPIu &&
             ((virtual & 0x0FFE0000) & ~bl) == BEPIl) {
             /* BAT matches */
@@ -550,7 +541,7 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx,
                 ctx->prot = prot;
                 ret = check_prot(ctx->prot, rw, type);
                 if (ret == 0)
-                    LOG_BATS("BAT %d match: r " PADDRX " prot=%c%c\n",
+                    LOG_BATS("BAT %d match: r " TARGET_FMT_plx " prot=%c%c\n",
                              i, ctx->raddr, ctx->prot & PAGE_READ ? 'R' : '-',
                              ctx->prot & PAGE_WRITE ? 'W' : '-');
                 break;
@@ -560,15 +551,16 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx,
     if (ret < 0) {
 #if defined(DEBUG_BATS)
         if (qemu_log_enabled()) {
-            LOG_BATS("no BAT match for " ADDRX ":\n", virtual);
+            LOG_BATS("no BAT match for " TARGET_FMT_lx ":\n", virtual);
             for (i = 0; i < 4; i++) {
                 BATu = &BATut[i];
                 BATl = &BATlt[i];
                 BEPIu = *BATu & 0xF0000000;
                 BEPIl = *BATu & 0x0FFE0000;
                 bl = (*BATu & 0x00001FFC) << 15;
-                LOG_BATS("%s: %cBAT%d v " ADDRX " BATu " ADDRX
-                         " BATl " ADDRX " \n\t" ADDRX " " ADDRX " " ADDRX "\n",
+                LOG_BATS("%s: %cBAT%d v " TARGET_FMT_lx " BATu " TARGET_FMT_lx
+                         " BATl " TARGET_FMT_lx " \n\t" TARGET_FMT_lx " "
+                         TARGET_FMT_lx " " TARGET_FMT_lx "\n",
                          __func__, type == ACCESS_CODE ? 'I' : 'D', i, virtual,
                          *BATu, *BATl, BEPIu, BEPIl, bl);
             }
@@ -580,9 +572,8 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx,
 }
 
 /* PTE table lookup */
-static always_inline int _find_pte (mmu_ctx_t *ctx, int is_64b, int h,
-                                    int rw, int type,
-                                    int target_page_bits)
+static inline int _find_pte(mmu_ctx_t *ctx, int is_64b, int h, int rw,
+                            int type, int target_page_bits)
 {
     target_ulong base, pte0, pte1;
     int i, good = -1;
@@ -603,22 +594,20 @@ static always_inline int _find_pte (mmu_ctx_t *ctx, int is_64b, int h,
                         & TARGET_PAGE_MASK;
 
             r = pte64_check(ctx, pte0, pte1, h, rw, type);
-            LOG_MMU("Load pte from " ADDRX " => " ADDRX " " ADDRX
-                        " %d %d %d " ADDRX "\n",
-                        base + (i * 16), pte0, pte1,
-                        (int)(pte0 & 1), h, (int)((pte0 >> 1) & 1),
-                        ctx->ptem);
+            LOG_MMU("Load pte from " TARGET_FMT_lx " => " TARGET_FMT_lx " "
+                    TARGET_FMT_lx " %d %d %d " TARGET_FMT_lx "\n",
+                    base + (i * 16), pte0, pte1, (int)(pte0 & 1), h,
+                    (int)((pte0 >> 1) & 1), ctx->ptem);
         } else
 #endif
         {
             pte0 = ldl_phys(base + (i * 8));
             pte1 =  ldl_phys(base + (i * 8) + 4);
             r = pte32_check(ctx, pte0, pte1, h, rw, type);
-            LOG_MMU("Load pte from " ADDRX " => " ADDRX " " ADDRX
-                        " %d %d %d " ADDRX "\n",
-                        base + (i * 8), pte0, pte1,
-                        (int)(pte0 >> 31), h, (int)((pte0 >> 6) & 1),
-                        ctx->ptem);
+            LOG_MMU("Load pte from " TARGET_FMT_lx " => " TARGET_FMT_lx " "
+                    TARGET_FMT_lx " %d %d %d " TARGET_FMT_lx "\n",
+                    base + (i * 8), pte0, pte1, (int)(pte0 >> 31), h,
+                    (int)((pte0 >> 6) & 1), ctx->ptem);
         }
         switch (r) {
         case -3:
@@ -646,8 +635,8 @@ static always_inline int _find_pte (mmu_ctx_t *ctx, int is_64b, int h,
     }
     if (good != -1) {
     done:
-        LOG_MMU("found PTE at addr " PADDRX " prot=%01x ret=%d\n",
-                    ctx->raddr, ctx->prot, ret);
+        LOG_MMU("found PTE at addr " TARGET_FMT_lx " prot=%01x ret=%d\n",
+                ctx->raddr, ctx->prot, ret);
         /* Update page flags */
         pte1 = ctx->raddr;
         if (pte_update_flags(ctx, &pte1, ret, rw) == 1) {
@@ -665,23 +654,22 @@ static always_inline int _find_pte (mmu_ctx_t *ctx, int is_64b, int h,
     return ret;
 }
 
-static always_inline int find_pte32 (mmu_ctx_t *ctx, int h, int rw,
-                                     int type, int target_page_bits)
+static inline int find_pte32(mmu_ctx_t *ctx, int h, int rw, int type,
+                             int target_page_bits)
 {
     return _find_pte(ctx, 0, h, rw, type, target_page_bits);
 }
 
 #if defined(TARGET_PPC64)
-static always_inline int find_pte64 (mmu_ctx_t *ctx, int h, int rw,
-                                     int type, int target_page_bits)
+static inline int find_pte64(mmu_ctx_t *ctx, int h, int rw, int type,
+                             int target_page_bits)
 {
     return _find_pte(ctx, 1, h, rw, type, target_page_bits);
 }
 #endif
 
-static always_inline int find_pte (CPUState *env, mmu_ctx_t *ctx,
-                                   int h, int rw, int type,
-                                   int target_page_bits)
+static inline int find_pte(CPUState *env, mmu_ctx_t *ctx, int h, int rw,
+                           int type, int target_page_bits)
 {
 #if defined(TARGET_PPC64)
     if (env->mmu_model & POWERPC_MMU_64)
@@ -722,26 +710,25 @@ static void slb_set_entry(CPUPPCState *env, int nr, ppc_slb_t *slb)
     entry->tmp = slb->tmp;
 }
 
-static always_inline int slb_is_valid (ppc_slb_t *slb)
+static inline int slb_is_valid(ppc_slb_t *slb)
 {
     return (int)(slb->tmp64 & 0x0000000008000000ULL);
 }
 
-static always_inline void slb_invalidate (ppc_slb_t *slb)
+static inline void slb_invalidate(ppc_slb_t *slb)
 {
     slb->tmp64 &= ~0x0000000008000000ULL;
 }
 
-static always_inline int slb_lookup (CPUPPCState *env, target_ulong eaddr,
-                                     target_ulong *vsid,
-                                     target_ulong *page_mask, int *attr,
-                                     int *target_page_bits)
+static inline int slb_lookup(CPUPPCState *env, target_ulong eaddr,
+                             target_ulong *vsid, target_ulong *page_mask,
+                             int *attr, int *target_page_bits)
 {
     target_ulong mask;
     int n, ret;
 
     ret = -5;
-    LOG_SLB("%s: eaddr " ADDRX "\n", __func__, eaddr);
+    LOG_SLB("%s: eaddr " TARGET_FMT_lx "\n", __func__, eaddr);
     mask = 0x0000000000000000ULL; /* Avoid gcc warning */
     for (n = 0; n < env->slb_nr; n++) {
         ppc_slb_t *slb = slb_get_entry(env, n);
@@ -836,7 +823,7 @@ target_ulong ppc_load_slb (CPUPPCState *env, int slb_nr)
         rt = 0;
     }
     LOG_SLB("%s: %016" PRIx64 " %08" PRIx32 " => %d "
-                ADDRX "\n", __func__, slb->tmp64, slb->tmp, slb_nr, rt);
+            TARGET_FMT_lx "\n", __func__, slb->tmp64, slb->tmp, slb_nr, rt);
 
     return rt;
 }
@@ -860,25 +847,25 @@ void ppc_store_slb (CPUPPCState *env, target_ulong rb, target_ulong rs)
     slb->tmp64 = (esid << 28) | valid | (vsid >> 24);
     slb->tmp = (vsid << 8) | (flags << 3);
 
-    LOG_SLB("%s: %d " ADDRX " - " ADDRX " => %016" PRIx64
-            " %08" PRIx32 "\n", __func__,
-            slb_nr, rb, rs, slb->tmp64, slb->tmp);
+    LOG_SLB("%s: %d " TARGET_FMT_lx " - " TARGET_FMT_lx " => %016" PRIx64
+            " %08" PRIx32 "\n", __func__, slb_nr, rb, rs, slb->tmp64,
+            slb->tmp);
 
     slb_set_entry(env, slb_nr, slb);
 }
 #endif /* defined(TARGET_PPC64) */
 
 /* Perform segment based translation */
-static always_inline target_phys_addr_t get_pgaddr (target_phys_addr_t sdr1,
-                                                    int sdr_sh,
-                                                    target_phys_addr_t hash,
-                                                    target_phys_addr_t mask)
+static inline target_phys_addr_t get_pgaddr(target_phys_addr_t sdr1,
+                                            int sdr_sh,
+                                            target_phys_addr_t hash,
+                                            target_phys_addr_t mask)
 {
     return (sdr1 & ((target_phys_addr_t)(-1ULL) << sdr_sh)) | (hash & mask);
 }
 
-static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx,
-                                      target_ulong eaddr, int rw, int type)
+static inline int get_segment(CPUState *env, mmu_ctx_t *ctx,
+                              target_ulong eaddr, int rw, int type)
 {
     target_phys_addr_t sdr, hash, mask, sdr_mask, htab_mask;
     target_ulong sr, vsid, vsid_mask, pgidx, page_mask;
@@ -920,14 +907,14 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx,
         sdr_sh = 16;
         sdr_mask = 0xFFC0;
         target_page_bits = TARGET_PAGE_BITS;
-        LOG_MMU("Check segment v=" ADDRX " %d " ADDRX
-                    " nip=" ADDRX " lr=" ADDRX " ir=%d dr=%d pr=%d %d t=%d\n",
-                    eaddr, (int)(eaddr >> 28), sr, env->nip,
-                    env->lr, (int)msr_ir, (int)msr_dr, pr != 0 ? 1 : 0,
-                    rw, type);
+        LOG_MMU("Check segment v=" TARGET_FMT_lx " %d " TARGET_FMT_lx " nip="
+                TARGET_FMT_lx " lr=" TARGET_FMT_lx
+                " ir=%d dr=%d pr=%d %d t=%d\n",
+                eaddr, (int)(eaddr >> 28), sr, env->nip, env->lr, (int)msr_ir,
+                (int)msr_dr, pr != 0 ? 1 : 0, rw, type);
     }
-    LOG_MMU("pte segment: key=%d ds %d nx %d vsid " ADDRX "\n",
-                ctx->key, ds, ctx->nx, vsid);
+    LOG_MMU("pte segment: key=%d ds %d nx %d vsid " TARGET_FMT_lx "\n",
+            ctx->key, ds, ctx->nx, vsid);
     ret = -1;
     if (!ds) {
         /* Check if instruction fetch is allowed, if needed */
@@ -948,15 +935,14 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx,
                 hash = ((vsid ^ pgidx) << vsid_sh) & vsid_mask;
             }
             mask = (htab_mask << sdr_sh) | sdr_mask;
-            LOG_MMU("sdr " PADDRX " sh %d hash " PADDRX
-                        " mask " PADDRX " " ADDRX "\n",
-                        sdr, sdr_sh, hash, mask, page_mask);
+            LOG_MMU("sdr " TARGET_FMT_plx " sh %d hash " TARGET_FMT_plx
+                    " mask " TARGET_FMT_plx " " TARGET_FMT_lx "\n",
+                    sdr, sdr_sh, hash, mask, page_mask);
             ctx->pg_addr[0] = get_pgaddr(sdr, sdr_sh, hash, mask);
             /* Secondary table address */
             hash = (~hash) & vsid_mask;
-            LOG_MMU("sdr " PADDRX " sh %d hash " PADDRX
-                        " mask " PADDRX "\n",
-                        sdr, sdr_sh, hash, mask);
+            LOG_MMU("sdr " TARGET_FMT_plx " sh %d hash " TARGET_FMT_plx
+                    " mask " TARGET_FMT_plx "\n", sdr, sdr_sh, hash, mask);
             ctx->pg_addr[1] = get_pgaddr(sdr, sdr_sh, hash, mask);
 #if defined(TARGET_PPC64)
             if (env->mmu_model & POWERPC_MMU_64) {
@@ -979,19 +965,19 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx,
                 /* Software TLB search */
                 ret = ppc6xx_tlb_check(env, ctx, eaddr, rw, type);
             } else {
-                LOG_MMU("0 sdr1=" PADDRX " vsid=" ADDRX " "
-                            "api=" ADDRX " hash=" PADDRX
-                            " pg_addr=" PADDRX "\n",
-                            sdr, vsid, pgidx, hash, ctx->pg_addr[0]);
+                LOG_MMU("0 sdr1=" TARGET_FMT_plx " vsid=" TARGET_FMT_lx " "
+                        "api=" TARGET_FMT_lx " hash=" TARGET_FMT_plx
+                        " pg_addr=" TARGET_FMT_plx "\n",
+                        sdr, vsid, pgidx, hash, ctx->pg_addr[0]);
                 /* Primary table lookup */
                 ret = find_pte(env, ctx, 0, rw, type, target_page_bits);
                 if (ret < 0) {
                     /* Secondary table lookup */
                     if (eaddr != 0xEFFFFFFF)
-                        LOG_MMU("1 sdr1=" PADDRX " vsid=" ADDRX " "
-                                "api=" ADDRX " hash=" PADDRX
-                                " pg_addr=" PADDRX "\n",
-                                sdr, vsid, pgidx, hash, ctx->pg_addr[1]);
+                        LOG_MMU("1 sdr1=" TARGET_FMT_plx " vsid=" TARGET_FMT_lx " "
+                                "api=" TARGET_FMT_lx " hash=" TARGET_FMT_plx
+                                " pg_addr=" TARGET_FMT_plx "\n", sdr, vsid,
+                                pgidx, hash, ctx->pg_addr[1]);
                     ret2 = find_pte(env, ctx, 1, rw, type,
                                     target_page_bits);
                     if (ret2 != -1)
@@ -1002,8 +988,8 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx,
             if (qemu_log_enabled()) {
                 target_phys_addr_t curaddr;
                 uint32_t a0, a1, a2, a3;
-                qemu_log("Page table: " PADDRX " len " PADDRX "\n",
-                          sdr, mask + 0x80);
+                qemu_log("Page table: " TARGET_FMT_plx " len " TARGET_FMT_plx
+                         "\n", sdr, mask + 0x80);
                 for (curaddr = sdr; curaddr < (sdr + mask + 0x80);
                      curaddr += 16) {
                     a0 = ldl_phys(curaddr);
@@ -1011,8 +997,8 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx,
                     a2 = ldl_phys(curaddr + 8);
                     a3 = ldl_phys(curaddr + 12);
                     if (a0 != 0 || a1 != 0 || a2 != 0 || a3 != 0) {
-                        qemu_log(PADDRX ": %08x %08x %08x %08x\n",
-                                  curaddr, a0, a1, a2, a3);
+                        qemu_log(TARGET_FMT_plx ": %08x %08x %08x %08x\n",
+                                 curaddr, a0, a1, a2, a3);
                     }
                 }
             }
@@ -1064,10 +1050,10 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx,
 }
 
 /* Generic TLB check function for embedded PowerPC implementations */
-static always_inline int ppcemb_tlb_check (CPUState *env, ppcemb_tlb_t *tlb,
-                                           target_phys_addr_t *raddrp,
-                                           target_ulong address,
-                                           uint32_t pid, int ext, int i)
+static inline int ppcemb_tlb_check(CPUState *env, ppcemb_tlb_t *tlb,
+                                   target_phys_addr_t *raddrp,
+                                   target_ulong address, uint32_t pid, int ext,
+                                   int i)
 {
     target_ulong mask;
 
@@ -1077,9 +1063,9 @@ static always_inline int ppcemb_tlb_check (CPUState *env, ppcemb_tlb_t *tlb,
         return -1;
     }
     mask = ~(tlb->size - 1);
-    LOG_SWTLB("%s: TLB %d address " ADDRX " PID %u <=> " ADDRX
-                " " ADDRX " %u\n",
-                __func__, i, address, pid, tlb->EPN, mask, (uint32_t)tlb->PID);
+    LOG_SWTLB("%s: TLB %d address " TARGET_FMT_lx " PID %u <=> " TARGET_FMT_lx
+              " " TARGET_FMT_lx " %u\n", __func__, i, address, pid, tlb->EPN,
+              mask, (uint32_t)tlb->PID);
     /* Check PID */
     if (tlb->PID != 0 && tlb->PID != pid)
         return -1;
@@ -1118,7 +1104,7 @@ int ppcemb_tlb_search (CPUPPCState *env, target_ulong address, uint32_t pid)
 }
 
 /* Helpers specific to PowerPC 40x implementations */
-static always_inline void ppc4xx_tlb_invalidate_all (CPUState *env)
+static inline void ppc4xx_tlb_invalidate_all(CPUState *env)
 {
     ppcemb_tlb_t *tlb;
     int i;
@@ -1130,9 +1116,8 @@ static always_inline void ppc4xx_tlb_invalidate_all (CPUState *env)
     tlb_flush(env, 1);
 }
 
-static always_inline void ppc4xx_tlb_invalidate_virt (CPUState *env,
-                                                      target_ulong eaddr,
-                                                      uint32_t pid)
+static inline void ppc4xx_tlb_invalidate_virt(CPUState *env,
+                                              target_ulong eaddr, uint32_t pid)
 {
 #if !defined(FLUSH_ALL_TLBS)
     ppcemb_tlb_t *tlb;
@@ -1203,15 +1188,14 @@ static int mmu40x_get_physical_address (CPUState *env, mmu_ctx_t *ctx,
         }
         if (ret >= 0) {
             ctx->raddr = raddr;
-            LOG_SWTLB("%s: access granted " ADDRX " => " PADDRX
-                        " %d %d\n", __func__, address, ctx->raddr, ctx->prot,
-                        ret);
+            LOG_SWTLB("%s: access granted " TARGET_FMT_lx " => " TARGET_FMT_plx
+                      " %d %d\n", __func__, address, ctx->raddr, ctx->prot,
+                      ret);
             return 0;
         }
     }
-    LOG_SWTLB("%s: access refused " ADDRX " => " PADDRX
-                " %d %d\n", __func__, address, raddr, ctx->prot,
-                ret);
+    LOG_SWTLB("%s: access refused " TARGET_FMT_lx " => " TARGET_FMT_plx
+              " %d %d\n", __func__, address, raddr, ctx->prot, ret);
 
     return ret;
 }
@@ -1271,8 +1255,8 @@ static int mmubooke_get_physical_address (CPUState *env, mmu_ctx_t *ctx,
     return ret;
 }
 
-static always_inline int check_physical (CPUState *env, mmu_ctx_t *ctx,
-                                         target_ulong eaddr, int rw)
+static inline int check_physical(CPUState *env, mmu_ctx_t *ctx,
+                                 target_ulong eaddr, int rw)
 {
     int in_plb, ret;
 
@@ -1394,8 +1378,8 @@ int get_physical_address (CPUState *env, mmu_ctx_t *ctx, target_ulong eaddr,
         }
     }
 #if 0
-    qemu_log("%s address " ADDRX " => %d " PADDRX "\n",
-                __func__, eaddr, ret, ctx->raddr);
+    qemu_log("%s address " TARGET_FMT_lx " => %d " TARGET_FMT_plx "\n",
+             __func__, eaddr, ret, ctx->raddr);
 #endif
 
     return ret;
@@ -1675,27 +1659,26 @@ int cpu_ppc_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
 /*****************************************************************************/
 /* BATs management */
 #if !defined(FLUSH_ALL_TLBS)
-static always_inline void do_invalidate_BAT (CPUPPCState *env,
-                                             target_ulong BATu,
-                                             target_ulong mask)
+static inline void do_invalidate_BAT(CPUPPCState *env, target_ulong BATu,
+                                     target_ulong mask)
 {
     target_ulong base, end, page;
 
     base = BATu & ~0x0001FFFF;
     end = base + mask + 0x00020000;
-    LOG_BATS("Flush BAT from " ADDRX " to " ADDRX " (" ADDRX ")\n",
-                base, end, mask);
+    LOG_BATS("Flush BAT from " TARGET_FMT_lx " to " TARGET_FMT_lx " ("
+             TARGET_FMT_lx ")\n", base, end, mask);
     for (page = base; page != end; page += TARGET_PAGE_SIZE)
         tlb_flush_page(env, page);
     LOG_BATS("Flush done\n");
 }
 #endif
 
-static always_inline void dump_store_bat (CPUPPCState *env, char ID,
-                                          int ul, int nr, target_ulong value)
+static inline void dump_store_bat(CPUPPCState *env, char ID, int ul, int nr,
+                                  target_ulong value)
 {
-    LOG_BATS("Set %cBAT%d%c to " ADDRX " (" ADDRX ")\n",
-                ID, nr, ul == 0 ? 'u' : 'l', value, env->nip);
+    LOG_BATS("Set %cBAT%d%c to " TARGET_FMT_lx " (" TARGET_FMT_lx ")\n", ID,
+             nr, ul == 0 ? 'u' : 'l', value, env->nip);
 }
 
 void ppc_store_ibatu (CPUPPCState *env, int nr, target_ulong value)
@@ -1965,7 +1948,7 @@ void ppc_store_asr (CPUPPCState *env, target_ulong value)
 
 void ppc_store_sdr1 (CPUPPCState *env, target_ulong value)
 {
-    LOG_MMU("%s: " ADDRX "\n", __func__, value);
+    LOG_MMU("%s: " TARGET_FMT_lx "\n", __func__, value);
     if (env->sdr1 != value) {
         /* XXX: for PowerPC 64, should check that the HTABSIZE value
          *      is <= 28
@@ -1985,8 +1968,8 @@ target_ulong ppc_load_sr (CPUPPCState *env, int slb_nr)
 
 void ppc_store_sr (CPUPPCState *env, int srnum, target_ulong value)
 {
-    LOG_MMU("%s: reg=%d " ADDRX " " ADDRX "\n",
-                __func__, srnum, value, env->sr[srnum]);
+    LOG_MMU("%s: reg=%d " TARGET_FMT_lx " " TARGET_FMT_lx "\n", __func__,
+            srnum, value, env->sr[srnum]);
 #if defined(TARGET_PPC64)
     if (env->mmu_model & POWERPC_MMU_64) {
         uint64_t rb = 0, rs = 0;
@@ -2047,19 +2030,20 @@ void ppc_hw_interrupt (CPUState *env)
     env->error_code = 0;
 }
 #else /* defined (CONFIG_USER_ONLY) */
-static always_inline void dump_syscall (CPUState *env)
+static inline void dump_syscall(CPUState *env)
 {
-    qemu_log_mask(CPU_LOG_INT, "syscall r0=" REGX " r3=" REGX " r4=" REGX
-            " r5=" REGX " r6=" REGX " nip=" ADDRX "\n",
-            ppc_dump_gpr(env, 0), ppc_dump_gpr(env, 3), ppc_dump_gpr(env, 4),
-            ppc_dump_gpr(env, 5), ppc_dump_gpr(env, 6), env->nip);
+    qemu_log_mask(CPU_LOG_INT, "syscall r0=%016" PRIx64 " r3=%016" PRIx64
+                  " r4=%016" PRIx64 " r5=%016" PRIx64 " r6=%016" PRIx64
+                  " nip=" TARGET_FMT_lx "\n",
+                  ppc_dump_gpr(env, 0), ppc_dump_gpr(env, 3),
+                  ppc_dump_gpr(env, 4), ppc_dump_gpr(env, 5),
+                  ppc_dump_gpr(env, 6), env->nip);
 }
 
 /* Note that this function should be greatly optimized
  * when called with a constant excp, from ppc_hw_interrupt
  */
-static always_inline void powerpc_excp (CPUState *env,
-                                        int excp_model, int excp)
+static inline void powerpc_excp(CPUState *env, int excp_model, int excp)
 {
     target_ulong msr, new_msr, vector;
     int srr0, srr1, asrr0, asrr1;
@@ -2075,8 +2059,8 @@ static always_inline void powerpc_excp (CPUState *env,
         lpes1 = 1;
     }
 
-    qemu_log_mask(CPU_LOG_INT, "Raise exception at " ADDRX " => %08x (%02x)\n",
-                 env->nip, excp, env->error_code);
+    qemu_log_mask(CPU_LOG_INT, "Raise exception at " TARGET_FMT_lx
+                  " => %08x (%02x)\n", env->nip, excp, env->error_code);
     msr = env->msr;
     new_msr = msr;
     srr0 = SPR_SRR0;
@@ -2143,15 +2127,15 @@ static always_inline void powerpc_excp (CPUState *env,
         }
         goto store_next;
     case POWERPC_EXCP_DSI:       /* Data storage exception                   */
-        LOG_EXCP("DSI exception: DSISR=" ADDRX" DAR=" ADDRX "\n",
-                    env->spr[SPR_DSISR], env->spr[SPR_DAR]);
+        LOG_EXCP("DSI exception: DSISR=" TARGET_FMT_lx" DAR=" TARGET_FMT_lx
+                 "\n", env->spr[SPR_DSISR], env->spr[SPR_DAR]);
         new_msr &= ~((target_ulong)1 << MSR_RI);
         if (lpes1 == 0)
             new_msr |= (target_ulong)MSR_HVB;
         goto store_next;
     case POWERPC_EXCP_ISI:       /* Instruction storage exception            */
-        LOG_EXCP("ISI exception: msr=" ADDRX ", nip=" ADDRX "\n",
-                    msr, env->nip);
+        LOG_EXCP("ISI exception: msr=" TARGET_FMT_lx ", nip=" TARGET_FMT_lx
+                 "\n", msr, env->nip);
         new_msr &= ~((target_ulong)1 << MSR_RI);
         if (lpes1 == 0)
             new_msr |= (target_ulong)MSR_HVB;
@@ -2188,8 +2172,7 @@ static always_inline void powerpc_excp (CPUState *env,
             msr |= 0x00010000;
             break;
         case POWERPC_EXCP_INVAL:
-            LOG_EXCP("Invalid instruction at " ADDRX "\n",
-                        env->nip);
+            LOG_EXCP("Invalid instruction at " TARGET_FMT_lx "\n", env->nip);
             new_msr &= ~((target_ulong)1 << MSR_RI);
             if (lpes1 == 0)
                 new_msr |= (target_ulong)MSR_HVB;
@@ -2463,11 +2446,11 @@ static always_inline void powerpc_excp (CPUState *env,
                     miss = &env->spr[SPR_DMISS];
                     cmp = &env->spr[SPR_DCMP];
                 }
-                qemu_log("6xx %sTLB miss: %cM " ADDRX " %cC " ADDRX
-                        " H1 " ADDRX " H2 " ADDRX " %08x\n",
-                        es, en, *miss, en, *cmp,
-                        env->spr[SPR_HASH1], env->spr[SPR_HASH2],
-                        env->error_code);
+                qemu_log("6xx %sTLB miss: %cM " TARGET_FMT_lx " %cC "
+                         TARGET_FMT_lx " H1 " TARGET_FMT_lx " H2 "
+                         TARGET_FMT_lx " %08x\n", es, en, *miss, en, *cmp,
+                         env->spr[SPR_HASH1], env->spr[SPR_HASH2],
+                         env->error_code);
             }
 #endif
             msr |= env->crf[0] << 28;
@@ -2496,9 +2479,9 @@ static always_inline void powerpc_excp (CPUState *env,
                     miss = &env->spr[SPR_TLBMISS];
                     cmp = &env->spr[SPR_PTEHI];
                 }
-                qemu_log("74xx %sTLB miss: %cM " ADDRX " %cC " ADDRX
-                        " %08x\n",
-                        es, en, *miss, en, *cmp, env->error_code);
+                qemu_log("74xx %sTLB miss: %cM " TARGET_FMT_lx " %cC "
+                         TARGET_FMT_lx " %08x\n", es, en, *miss, en, *cmp,
+                         env->error_code);
             }
 #endif
             msr |= env->error_code; /* key bit */
@@ -2762,8 +2745,8 @@ void ppc_hw_interrupt (CPUPPCState *env)
 
 void cpu_dump_rfi (target_ulong RA, target_ulong msr)
 {
-    qemu_log("Return from exception at " ADDRX " with flags " ADDRX "\n",
-             RA, msr);
+    qemu_log("Return from exception at " TARGET_FMT_lx " with flags "
+             TARGET_FMT_lx "\n", RA, msr);
 }
 
 void cpu_ppc_reset (void *opaque)