diff options
author | Mark McLoughlin <markmc@redhat.com> | 2009-10-28 10:55:42 +0000 |
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committer | Mark McLoughlin <markmc@redhat.com> | 2009-10-28 10:55:42 +0000 |
commit | 3deaf5aa6ab23d2f8b0250ea63908a30ff2726af (patch) | |
tree | 5109988bec768a066a9b7b39f4411f422b3f67b3 /target-ppc | |
parent | Update bios.bin (vapic removal) (diff) | |
parent | ne2k_isa: use qdev properties for configuration. (diff) | |
download | qemu-kvm-3deaf5aa6ab23d2f8b0250ea63908a30ff2726af.tar.gz qemu-kvm-3deaf5aa6ab23d2f8b0250ea63908a30ff2726af.tar.bz2 qemu-kvm-3deaf5aa6ab23d2f8b0250ea63908a30ff2726af.zip |
Merge commit '93db66850d99fd9885edeff6af5679be51e1c610' into upstream-merge
* commit '93db66850d99fd9885edeff6af5679be51e1c610': (81 commits)
ne2k_isa: use qdev properties for configuration.
qdev/net: common nic property bits
qdev: add vlan property
qdev: add netdev property
qdev: mac addr property fixups
net: add macaddr type.
Send a RARP packet after migration.
multiboot.S patch for old as(1) (was: Re: [Qemu-devel] Some OpenBSD/amd64 build fixes)
raw/linux-aio: Also initialize POSIX AIO
qcow2: Fix grow_refcount_table error handling
usb-linux: return USB_RET_STALL on -EPIPE
Makefile: Change make to be quiet again when doing nothing
eepro100: Restructure code
target-arm: use native tcg-ops for ror/bic/vorn
target-arm: fix neon shift helper functions
target-arm: fix neon vsri, vshl and vsli ops
target-arm: allow modifying vfp fpexc en bit only
target-arm: add support for neon vld1.64/vst1.64 instructions
target-arm: fix neon vshrn/vrshrn ops
target-arm: fix incorrect temporary variable freeing
...
Signed-off-by: Mark McLoughlin <markmc@redhat.com>
Diffstat (limited to 'target-ppc')
-rw-r--r-- | target-ppc/cpu.h | 8 | ||||
-rw-r--r-- | target-ppc/translate_init.c | 138 |
2 files changed, 80 insertions, 66 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index ff6bb34c8..2c850a7cd 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -580,11 +580,14 @@ struct CPUPPCState { /* floating point status and control register */ uint32_t fpscr; - CPU_COMMON + /* Next instruction pointer */ + target_ulong nip; int access_type; /* when a memory exception occurs, the access type is stored here */ + CPU_COMMON + /* MMU context - only relevant for full system emulation */ #if !defined(CONFIG_USER_ONLY) #if defined(TARGET_PPC64) @@ -664,9 +667,6 @@ struct CPUPPCState { #endif /* Those resources are used only during code translation */ - /* Next instruction pointer */ - target_ulong nip; - /* opcode handlers */ opc_handler_t *opcodes[0x40]; diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 79d3b4ca9..db4dc172b 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -233,7 +233,7 @@ static void spr_write_ibatu (void *opaque, int sprn, int gprn) static void spr_write_ibatu_h (void *opaque, int sprn, int gprn) { - TCGv_i32 t0 = tcg_const_i32((sprn - SPR_IBAT4U) / 2); + TCGv_i32 t0 = tcg_const_i32(((sprn - SPR_IBAT4U) / 2) + 4); gen_helper_store_ibatu(t0, cpu_gpr[gprn]); tcg_temp_free_i32(t0); } @@ -247,7 +247,7 @@ static void spr_write_ibatl (void *opaque, int sprn, int gprn) static void spr_write_ibatl_h (void *opaque, int sprn, int gprn) { - TCGv_i32 t0 = tcg_const_i32((sprn - SPR_IBAT4L) / 2); + TCGv_i32 t0 = tcg_const_i32(((sprn - SPR_IBAT4L) / 2) + 4); gen_helper_store_ibatl(t0, cpu_gpr[gprn]); tcg_temp_free_i32(t0); } @@ -4166,8 +4166,14 @@ static void init_proc_e300 (CPUPPCState *env) SPR_NOACCESS, SPR_NOACCESS, &spr_read_generic, &spr_write_generic, 0x00000000); + /* XXX : not implemented */ + spr_register(env, SPR_HID2, "HID2", + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_write_generic, + 0x00000000); /* Memory management */ gen_low_BATs(env); + gen_high_BATs(env); gen_6xx_7xx_soft_tlb(env, 64, 2); init_excp_603(env); env->dcache_line_size = 32; @@ -6719,36 +6725,12 @@ enum { CPU_POWERPC_e300c3 = 0x00850010, CPU_POWERPC_e300c4 = 0x00860010, /* MPC83xx microcontrollers */ -#define CPU_POWERPC_MPC8313 CPU_POWERPC_e300c3 -#define CPU_POWERPC_MPC8313E CPU_POWERPC_e300c3 -#define CPU_POWERPC_MPC8314 CPU_POWERPC_e300c3 -#define CPU_POWERPC_MPC8314E CPU_POWERPC_e300c3 -#define CPU_POWERPC_MPC8315 CPU_POWERPC_e300c3 -#define CPU_POWERPC_MPC8315E CPU_POWERPC_e300c3 -#define CPU_POWERPC_MPC8321 CPU_POWERPC_e300c2 -#define CPU_POWERPC_MPC8321E CPU_POWERPC_e300c2 -#define CPU_POWERPC_MPC8323 CPU_POWERPC_e300c2 -#define CPU_POWERPC_MPC8323E CPU_POWERPC_e300c2 -#define CPU_POWERPC_MPC8343A CPU_POWERPC_e300c1 -#define CPU_POWERPC_MPC8343EA CPU_POWERPC_e300c1 -#define CPU_POWERPC_MPC8347A CPU_POWERPC_e300c1 -#define CPU_POWERPC_MPC8347AT CPU_POWERPC_e300c1 -#define CPU_POWERPC_MPC8347AP CPU_POWERPC_e300c1 -#define CPU_POWERPC_MPC8347EA CPU_POWERPC_e300c1 -#define CPU_POWERPC_MPC8347EAT CPU_POWERPC_e300c1 -#define CPU_POWERPC_MPC8347EAP CPU_POWERPC_e300c1 -#define CPU_POWERPC_MPC8349 CPU_POWERPC_e300c1 -#define CPU_POWERPC_MPC8349A CPU_POWERPC_e300c1 -#define CPU_POWERPC_MPC8349E CPU_POWERPC_e300c1 -#define CPU_POWERPC_MPC8349EA CPU_POWERPC_e300c1 -#define CPU_POWERPC_MPC8358E CPU_POWERPC_e300c1 -#define CPU_POWERPC_MPC8360E CPU_POWERPC_e300c1 -#define CPU_POWERPC_MPC8377 CPU_POWERPC_e300c4 -#define CPU_POWERPC_MPC8377E CPU_POWERPC_e300c4 -#define CPU_POWERPC_MPC8378 CPU_POWERPC_e300c4 -#define CPU_POWERPC_MPC8378E CPU_POWERPC_e300c4 -#define CPU_POWERPC_MPC8379 CPU_POWERPC_e300c4 -#define CPU_POWERPC_MPC8379E CPU_POWERPC_e300c4 +#define CPU_POWERPC_MPC831x CPU_POWERPC_e300c3 +#define CPU_POWERPC_MPC832x CPU_POWERPC_e300c2 +#define CPU_POWERPC_MPC834x CPU_POWERPC_e300c1 +#define CPU_POWERPC_MPC835x CPU_POWERPC_e300c1 +#define CPU_POWERPC_MPC836x CPU_POWERPC_e300c1 +#define CPU_POWERPC_MPC837x CPU_POWERPC_e300c4 /* e500 family */ /* e500 cores */ #define CPU_POWERPC_e500 CPU_POWERPC_e500v2_v22 @@ -7109,11 +7091,19 @@ enum { #if 0 POWERPC_SVR_8323E = xxx, #endif + POWERPC_SVR_8343 = 0x80570010, POWERPC_SVR_8343A = 0x80570030, + POWERPC_SVR_8343E = 0x80560010, POWERPC_SVR_8343EA = 0x80560030, +#define POWERPC_SVR_8347 POWERPC_SVR_8347T + POWERPC_SVR_8347P = 0x80550010, /* PBGA package */ + POWERPC_SVR_8347T = 0x80530010, /* TBGA package */ #define POWERPC_SVR_8347A POWERPC_SVR_8347AT POWERPC_SVR_8347AP = 0x80550030, /* PBGA package */ POWERPC_SVR_8347AT = 0x80530030, /* TBGA package */ +#define POWERPC_SVR_8347E POWERPC_SVR_8347ET + POWERPC_SVR_8347EP = 0x80540010, /* PBGA package */ + POWERPC_SVR_8347ET = 0x80520010, /* TBGA package */ #define POWERPC_SVR_8347EA POWERPC_SVR_8347EAT POWERPC_SVR_8347EAP = 0x80540030, /* PBGA package */ POWERPC_SVR_8347EAT = 0x80520030, /* TBGA package */ @@ -7992,117 +7982,141 @@ static const ppc_def_t ppc_defs[] = { #if defined (TODO) /* MPC8313 */ POWERPC_DEF_SVR("MPC8313", - CPU_POWERPC_MPC8313, POWERPC_SVR_8313, e300), + CPU_POWERPC_MPC831x, POWERPC_SVR_8313, e300), #endif #if defined (TODO) /* MPC8313E */ POWERPC_DEF_SVR("MPC8313E", - CPU_POWERPC_MPC8313E, POWERPC_SVR_8313E, e300), + CPU_POWERPC_MPC831x, POWERPC_SVR_8313E, e300), #endif #if defined (TODO) /* MPC8314 */ POWERPC_DEF_SVR("MPC8314", - CPU_POWERPC_MPC8314, POWERPC_SVR_8314, e300), + CPU_POWERPC_MPC831x, POWERPC_SVR_8314, e300), #endif #if defined (TODO) /* MPC8314E */ POWERPC_DEF_SVR("MPC8314E", - CPU_POWERPC_MPC8314E, POWERPC_SVR_8314E, e300), + CPU_POWERPC_MPC831x, POWERPC_SVR_8314E, e300), #endif #if defined (TODO) /* MPC8315 */ POWERPC_DEF_SVR("MPC8315", - CPU_POWERPC_MPC8315, POWERPC_SVR_8315, e300), + CPU_POWERPC_MPC831x, POWERPC_SVR_8315, e300), #endif #if defined (TODO) /* MPC8315E */ POWERPC_DEF_SVR("MPC8315E", - CPU_POWERPC_MPC8315E, POWERPC_SVR_8315E, e300), + CPU_POWERPC_MPC831x, POWERPC_SVR_8315E, e300), #endif #if defined (TODO) /* MPC8321 */ POWERPC_DEF_SVR("MPC8321", - CPU_POWERPC_MPC8321, POWERPC_SVR_8321, e300), + CPU_POWERPC_MPC832x, POWERPC_SVR_8321, e300), #endif #if defined (TODO) /* MPC8321E */ POWERPC_DEF_SVR("MPC8321E", - CPU_POWERPC_MPC8321E, POWERPC_SVR_8321E, e300), + CPU_POWERPC_MPC832x, POWERPC_SVR_8321E, e300), #endif #if defined (TODO) /* MPC8323 */ POWERPC_DEF_SVR("MPC8323", - CPU_POWERPC_MPC8323, POWERPC_SVR_8323, e300), + CPU_POWERPC_MPC832x, POWERPC_SVR_8323, e300), #endif #if defined (TODO) /* MPC8323E */ POWERPC_DEF_SVR("MPC8323E", - CPU_POWERPC_MPC8323E, POWERPC_SVR_8323E, e300), + CPU_POWERPC_MPC832x, POWERPC_SVR_8323E, e300), #endif + /* MPC8343 */ + POWERPC_DEF_SVR("MPC8343", + CPU_POWERPC_MPC834x, POWERPC_SVR_8343, e300), /* MPC8343A */ POWERPC_DEF_SVR("MPC8343A", - CPU_POWERPC_MPC8343A, POWERPC_SVR_8343A, e300), + CPU_POWERPC_MPC834x, POWERPC_SVR_8343A, e300), + /* MPC8343E */ + POWERPC_DEF_SVR("MPC8343E", + CPU_POWERPC_MPC834x, POWERPC_SVR_8343E, e300), /* MPC8343EA */ POWERPC_DEF_SVR("MPC8343EA", - CPU_POWERPC_MPC8343EA, POWERPC_SVR_8343EA, e300), + CPU_POWERPC_MPC834x, POWERPC_SVR_8343EA, e300), + /* MPC8347 */ + POWERPC_DEF_SVR("MPC8347", + CPU_POWERPC_MPC834x, POWERPC_SVR_8347, e300), + /* MPC8347T */ + POWERPC_DEF_SVR("MPC8347T", + CPU_POWERPC_MPC834x, POWERPC_SVR_8347T, e300), + /* MPC8347P */ + POWERPC_DEF_SVR("MPC8347P", + CPU_POWERPC_MPC834x, POWERPC_SVR_8347P, e300), /* MPC8347A */ POWERPC_DEF_SVR("MPC8347A", - CPU_POWERPC_MPC8347A, POWERPC_SVR_8347A, e300), + CPU_POWERPC_MPC834x, POWERPC_SVR_8347A, e300), /* MPC8347AT */ POWERPC_DEF_SVR("MPC8347AT", - CPU_POWERPC_MPC8347AT, POWERPC_SVR_8347AT, e300), + CPU_POWERPC_MPC834x, POWERPC_SVR_8347AT, e300), /* MPC8347AP */ POWERPC_DEF_SVR("MPC8347AP", - CPU_POWERPC_MPC8347AP, POWERPC_SVR_8347AP, e300), + CPU_POWERPC_MPC834x, POWERPC_SVR_8347AP, e300), + /* MPC8347E */ + POWERPC_DEF_SVR("MPC8347E", + CPU_POWERPC_MPC834x, POWERPC_SVR_8347E, e300), + /* MPC8347ET */ + POWERPC_DEF_SVR("MPC8347ET", + CPU_POWERPC_MPC834x, POWERPC_SVR_8347ET, e300), + /* MPC8343EP */ + POWERPC_DEF_SVR("MPC8347EP", + CPU_POWERPC_MPC834x, POWERPC_SVR_8347EP, e300), /* MPC8347EA */ POWERPC_DEF_SVR("MPC8347EA", - CPU_POWERPC_MPC8347EA, POWERPC_SVR_8347EA, e300), + CPU_POWERPC_MPC834x, POWERPC_SVR_8347EA, e300), /* MPC8347EAT */ POWERPC_DEF_SVR("MPC8347EAT", - CPU_POWERPC_MPC8347EAT, POWERPC_SVR_8347EAT, e300), + CPU_POWERPC_MPC834x, POWERPC_SVR_8347EAT, e300), /* MPC8343EAP */ POWERPC_DEF_SVR("MPC8347EAP", - CPU_POWERPC_MPC8347EAP, POWERPC_SVR_8347EAP, e300), + CPU_POWERPC_MPC834x, POWERPC_SVR_8347EAP, e300), /* MPC8349 */ POWERPC_DEF_SVR("MPC8349", - CPU_POWERPC_MPC8349, POWERPC_SVR_8349, e300), + CPU_POWERPC_MPC834x, POWERPC_SVR_8349, e300), /* MPC8349A */ POWERPC_DEF_SVR("MPC8349A", - CPU_POWERPC_MPC8349A, POWERPC_SVR_8349A, e300), + CPU_POWERPC_MPC834x, POWERPC_SVR_8349A, e300), /* MPC8349E */ POWERPC_DEF_SVR("MPC8349E", - CPU_POWERPC_MPC8349E, POWERPC_SVR_8349E, e300), + CPU_POWERPC_MPC834x, POWERPC_SVR_8349E, e300), /* MPC8349EA */ POWERPC_DEF_SVR("MPC8349EA", - CPU_POWERPC_MPC8349EA, POWERPC_SVR_8349EA, e300), + CPU_POWERPC_MPC834x, POWERPC_SVR_8349EA, e300), #if defined (TODO) /* MPC8358E */ POWERPC_DEF_SVR("MPC8358E", - CPU_POWERPC_MPC8358E, POWERPC_SVR_8358E, e300), + CPU_POWERPC_MPC835x, POWERPC_SVR_8358E, e300), #endif #if defined (TODO) /* MPC8360E */ POWERPC_DEF_SVR("MPC8360E", - CPU_POWERPC_MPC8360E, POWERPC_SVR_8360E, e300), + CPU_POWERPC_MPC836x, POWERPC_SVR_8360E, e300), #endif /* MPC8377 */ POWERPC_DEF_SVR("MPC8377", - CPU_POWERPC_MPC8377, POWERPC_SVR_8377, e300), + CPU_POWERPC_MPC837x, POWERPC_SVR_8377, e300), /* MPC8377E */ POWERPC_DEF_SVR("MPC8377E", - CPU_POWERPC_MPC8377E, POWERPC_SVR_8377E, e300), + CPU_POWERPC_MPC837x, POWERPC_SVR_8377E, e300), /* MPC8378 */ POWERPC_DEF_SVR("MPC8378", - CPU_POWERPC_MPC8378, POWERPC_SVR_8378, e300), + CPU_POWERPC_MPC837x, POWERPC_SVR_8378, e300), /* MPC8378E */ POWERPC_DEF_SVR("MPC8378E", - CPU_POWERPC_MPC8378E, POWERPC_SVR_8378E, e300), + CPU_POWERPC_MPC837x, POWERPC_SVR_8378E, e300), /* MPC8379 */ POWERPC_DEF_SVR("MPC8379", - CPU_POWERPC_MPC8379, POWERPC_SVR_8379, e300), + CPU_POWERPC_MPC837x, POWERPC_SVR_8379, e300), /* MPC8379E */ POWERPC_DEF_SVR("MPC8379E", - CPU_POWERPC_MPC8379E, POWERPC_SVR_8379E, e300), + CPU_POWERPC_MPC837x, POWERPC_SVR_8379E, e300), /* e500 family */ /* PowerPC e500 core */ POWERPC_DEF("e500", CPU_POWERPC_e500v2_v22, e500v2), |