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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-11-20 06:41:29 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-11-20 06:41:29 +0000
commit12d961385b0216e4dec3a3d9fe9d6441c7832995 (patch)
tree7fe5f31fe3e23245561ad0e849653d94cb023d67 /target-sh4
parenttarget-sh4: map FP registers as TCG variables (diff)
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target-sh4: fix fldi0/fldi1
fldi0/fldi1 should be executed as a nop if FPSCR.FR is set instead of generating an exception. Reported by Laurent Desnogues. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5759 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sh4')
-rw-r--r--target-sh4/translate.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index f8371e2e0..84a3f4094 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -1670,15 +1670,13 @@ static void _decode_opc(DisasContext * ctx)
case 0xf08d: /* fldi0 FRn - FPSCR: R[PR] */
if (!(ctx->fpscr & FPSCR_PR)) {
tcg_gen_movi_i32(cpu_fregs[FREG(B11_8)], 0);
- return;
}
- break;
+ return;
case 0xf09d: /* fldi1 FRn - FPSCR: R[PR] */
if (!(ctx->fpscr & FPSCR_PR)) {
tcg_gen_movi_i32(cpu_fregs[FREG(B11_8)], 0x3f800000);
- return;
}
- break;
+ return;
case 0xf0ad: /* fcnvsd FPUL,DRn */
{
TCGv_i64 fp = tcg_temp_new_i64();