proj/qemu-kvm.git - qemu-kvm patches pulled in for Gentoo qemu packages

	Commit message (Expand)	Author	Age	Files	Lines
*	Kill broken host register definitions, thanks to Paul Brook and Herve	ths	2007-04-29	2	-13/+4
*	Revert last checkin.	ths	2007-04-29	1	-1/+1
*	Hopefully the final fix for LUI sign extensions.	ths	2007-04-29	1	-1/+1
*	Update TODO.	ths	2007-04-28	1	-0/+9
*	Next attempt to get the lui sign extension right.	ths	2007-04-25	2	-3/+2
*	Fix lui sign extension.	ths	2007-04-25	1	-1/+1
*	Update comment. We can't easily adhere to the architecture spec because	ths	2007-04-19	1	-3/+3
*	Choose number of TLBs at runtime, by Herve Poussineau.	ths	2007-04-17	6	-26/+25
*	Simplify branch likely handling.	ths	2007-04-16	1	-6/+8
*	Don't use T2 for INS, it conflicts with branch delay slot handling.	ths	2007-04-15	2	-6/+6
*	Fix qemu SIGFPE caused by division-by-zero due to underflow.	ths	2007-04-15	3	-13/+28
*	Small code generation optimization.	ths	2007-04-15	1	-3/+6
*	Delete unused define.	ths	2007-04-15	1	-2/+0
*	Restart interrupts after an exception.	ths	2007-04-14	2	-9/+33
*	Nicer Log formatting.	ths	2007-04-13	1	-1/+1
*	Another fix for CP0 Cause register handling.	ths	2007-04-13	2	-2/+2
*	Make SYNCI_Step and CCRes CPU-specific.	ths	2007-04-11	2	-3/+16
*	Throw RI for invalid MFMC0-class instructions. Introduce optional	ths	2007-04-11	2	-3/+18
*	Code formatting fix.	ths	2007-04-11	1	-935/+938
*	More Context/Xcontext fixes. Ifdef some 64bit-only ops, they may	ths	2007-04-11	2	-10/+10
*	Fix CP0_IntCtl handling.	ths	2007-04-09	2	-2/+6
*	Proper handling of reserved bits in the context register.	ths	2007-04-09	1	-1/+1
*	Mark watchpoint features as unimplemented.	ths	2007-04-09	2	-3/+9
*	Catch unaligned sc/scd.	ths	2007-04-09	2	-0/+10
*	Fix exception handling cornercase for rdhwr.	ths	2007-04-09	2	-37/+9
*	Remove bogus mtc0 handling.	ths	2007-04-09	1	-10/+0
*	Unify IRQ handling.	pbrook	2007-04-07	1	-0/+2
*	cpu_get_phys_page_debug should return target_phys_addr_t	j_mayer	2007-04-07	1	-2/+2
*	Implement prefx.	ths	2007-04-07	1	-1/+41
*	Set proper BadVAddress value for unaligned instruction fetch.	ths	2007-04-07	1	-1/+2
*	Actually skip over delay slot for a non-taken branch likely.	ths	2007-04-07	1	-2/+2
*	Fix ins/ext cornercase.	ths	2007-04-07	1	-4/+4
*	Fix handling of ADES exceptions.	ths	2007-04-06	1	-1/+3
*	Save state for all CP0 instructions, they may throw a CPU exception.	ths	2007-04-06	3	-16/+45
*	fix branch delay slot cornercases.	ths	2007-04-05	2	-3/+6
*	Fix rotr immediate ops, mask shift/rotate arguments to their allowed	ths	2007-04-05	3	-48/+103
*	Handle EBase properly.	ths	2007-04-05	1	-1/+1
*	Fix RDHWR handling. Code formatting. Don't use *_direct versions to raise	ths	2007-04-05	2	-92/+131
*	64bit MIPS FPUs have 32 registers.	ths	2007-04-05	1	-2/+1
*	Fix code formatting.	ths	2007-04-04	1	-66/+66
*	MIPS32R2 needs RDPGPR/WRPGPR instructions even when no shadow registers	ths	2007-04-02	1	-2/+9
*	Build fix for 64bit machines. (This is still not correct mul/div handling.)	ths	2007-04-02	1	-6/+12
*	Actually enable 64bit configuration.	ths	2007-04-01	8	-38/+35
*	MIPS64 configurations.	ths	2007-04-01	1	-2/+0
*	Malta CBUS UART support.	ths	2007-03-31	1	-1/+1
*	Update mips TODO.	ths	2007-03-30	1	-5/+1
*	Fix typo, suggested by Ben Taylor.	ths	2007-03-30	1	-1/+1
*	Squash logic bugs while they are fresh...	ths	2007-03-30	1	-1/+0
*	Sanitize mips exception handling.	ths	2007-03-30	5	-73/+55
*	One more bit of mips CPU configuration, and support for early 4KEc	ths	2007-03-24	1	-1/+23