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* Fix tb->size mishandling, by Daniel Jacobowitz.ths2007-09-111-1/+0
* Fix Sparc32 interrupt handlingblueswir12007-08-041-1/+3
* More alignment checksblueswir12007-07-112-4/+102
* Fix retry and done ops, trap handlingblueswir12007-07-082-11/+20
* Save state in Sparc64 return opblueswir12007-07-081-0/+1
* Report normalised CWP values to userland and GDB, not internal representationblueswir12007-07-073-7/+13
* Use unsigned 32-bit load for ld/lduwblueswir12007-07-072-1/+14
* Fix wrong number of clean/saveable windows, match Linux startup register valuesblueswir12007-07-072-2/+5
* Fix Sparc64 page sizeblueswir12007-07-071-1/+1
* Fix Sparc64 movrblueswir12007-07-041-2/+2
* Drop unused parametersblueswir12007-06-251-12/+15
* Fix Sparc64 prefetcha opblueswir12007-06-101-3/+3
* Move target-specific defines to the target directories.ths2007-06-031-0/+6
* Clean up of some target specifics in exec.c/cpu-exec.c.ths2007-06-031-0/+10
* Enable 36-bit physical address space also on 32-bit hostsblueswir12007-06-011-0/+2
* Sparc64 linux-user build fixblueswir12007-06-011-0/+8
* Separate fault for code access to unassigned memoryblueswir12007-05-272-2/+10
* Implement Sparc64 CPU timers using ptimersblueswir12007-05-254-7/+58
* Use full 36-bit physical address space on SS10blueswir12007-05-193-25/+82
* Enable faults for unassigned memory accesses and unimplemented ASIsblueswir12007-05-173-17/+118
* Enable unaligned access faultsblueswir12007-05-071-4/+5
* Fix pc/npc for unaligned load/stores, maybe other exceptionsblueswir12007-05-071-0/+1
* Report unassigned memory access to CPU (not enabled yet)blueswir12007-05-061-1/+4
* Handle division by zero case in Sparc64 udivx and sdivx opsblueswir12007-05-021-0/+6
* More Sparc32 CPUsblueswir12007-04-291-3/+20
* Fix CPU type zapped by system_resetblueswir12007-04-291-2/+2
* Sparc64 update: more VIS opsblueswir12007-04-223-36/+884
* Constificationblueswir12007-04-221-7/+7
* Fix Sparc64 wrfprs, move VIS ops where they belong, more VIS opsblueswir12007-04-132-38/+111
* Alignment check mechanism (not fully enabled yet) (Aurelien Jarno)blueswir12007-04-134-2/+18
* cpu_get_phys_page_debug should return target_phys_addr_tj_mayer2007-04-071-2/+2
* Full implementation of IEEE exceptions (Aurelien Jarno)blueswir12007-04-064-14/+154
* Enforce even float register pair for double register ops (Aurelien Jarno)blueswir12007-04-061-1/+1
* Fix stdfq op (Aurelien Jarno)blueswir12007-04-052-2/+16
* Fix co-processor branch and store ops (Aurelien Jarno)blueswir12007-04-051-9/+13
* Fix off-by-one errorblueswir12007-04-011-2/+2
* Add SparcStation-10 machineblueswir12007-04-011-0/+7
* Fix Sparc shift ops (Aurelien Jarno)blueswir12007-04-012-9/+17
* Fix Sparc lda/ldda/sta/stda asi handling, fault on misaligned register ldd/st...blueswir12007-04-013-2/+40
* Fix Sparc co-processor ops (Aurelien Jarno)blueswir12007-04-012-1/+27
* Fix Sparc ASR handling (Aurelien Jarno)blueswir12007-04-011-4/+24
* Sparc32/64 CPU selectionblueswir12007-03-252-9/+75
* Upgrade Sparc FPU version (based on patch by Aurelien Jarno)blueswir12007-03-242-2/+3
* Sparc tagged operations (Aurelien Jarno)blueswir12007-03-233-2/+194
* Fix Sparc branches, original patch by Aurelien Jarnoblueswir12007-03-211-12/+12
* Fix qemu crash due to sparc division-by-zero, by Aurelien Jarno.ths2007-03-191-0/+10
* SPARC host fixes, by Ben Taylor.ths2007-03-191-18/+1
* Fix floating point to integer conversion, by Aurelien Jarno.ths2007-02-101-4/+4
* Sparc arm/mips/sparc register patch, by Martin Bochnig.ths2007-02-021-0/+22
* siginfo fix for Darwin/Mac OS X, by Pierre d'Herbemont.ths2007-01-311-2/+1