From 4ad6779b132efeff0a68a650393ac2ef1fa601b2 Mon Sep 17 00:00:00 2001 From: Christopher Li Date: Wed, 16 Sep 2009 14:25:13 -0700 Subject: Simplify Makefile using static pattern rules I find a way to get rid of the macro and $$ in linking executable program. Signed-off-by: Christopher Li --- Makefile | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/Makefile b/Makefile index 571673e..80fce74 100644 --- a/Makefile +++ b/Makefile @@ -115,14 +115,9 @@ sparse.pc: sparse.pc.in compile_EXTRA_DEPS = compile-i386.o -PROG_LINK_CMD = $(QUIET_LINK)$(CC) $(LDFLAGS) -o $@ $^ $($@_EXTRA_OBJS) - -define BUILD_PROGRAM -$(prog): $(prog).o $$($(prog)_EXTRA_DEPS) $$(LIBS) - $$(PROG_LINK_CMD) -endef - -$(foreach prog,$(PROGRAMS),$(eval $(BUILD_PROGRAM))) +$(foreach p,$(PROGRAMS),$(eval $(p): $($(p)_EXTRA_DEPS) $(LIBS))) +$(PROGRAMS): % : %.o + $(QUIET_LINK)$(CC) $(LDFLAGS) -o $@ $^ $($@_EXTRA_OBJS) $(LIB_FILE): $(LIB_OBJS) $(QUIET_AR)$(AR) rcs $@ $(LIB_OBJS) -- cgit v1.2.3-65-gdbad