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* RISC-V: Gate opcode tables by enum rather than string.Jim Wilson2019-09-171-7/+20
* RISC-V: Improve li expansion for better code density.Kito Cheng2019-08-251-5/+33
* RISC-V: Fix lui argument parsing.Jim Wilson2019-05-301-5/+4
* RISC-V: Compress 3-operand beq/bne against x0.Jim Wilson2019-02-081-0/+6
* RISC-V: Support ELF attribute for gas and readelf.Jim Wilson2019-01-161-0/+127
* Update year range in copyright notice of binutils filesAlan Modra2019-01-011-1/+1
* RISC-V: Don't segfault for two regs in auipc or lui.Jim Wilson2018-12-101-1/+8
* RISC-V: Fix 4-arg add parsing.Jim Wilson2018-12-071-3/+12
* RISC-V: Accept version, supervisor ext and more than one NSE for -march.Jim Wilson2018-12-031-140/+23
* RISC-V: Add .insn CA support.Jim Wilson2018-11-271-0/+31
* Move struc-symbol.h to symbols.cAlan Modra2018-10-291-6/+4
* RISC-V: Allow instruction require more than one extensionJim Wilson2018-08-301-11/+21
* RISC-V: Reject empty rouding mode and fence operand.Jim Wilson2018-08-231-0/+3
* RISC-V: Add gas support for "fp" register.Jim Wilson2018-06-291-0/+3
* RISC-V: Accept constant operands in la and llaSebastian Huber2018-06-201-0/+11
* RISC-V: Fix .align handling when .option norelax.Jim Wilson2018-05-241-9/+21
* RISC-V: Add RV32E support.Jim Wilson2018-05-181-10/+56
* RISC-V: Add new option -mrelax/-mno-relax.Jim Wilson2018-04-201-0/+14
* RISC-V: Emit better warning for unknown CSR.Jim Wilson2018-03-161-6/+11
* RISC-V: Add .insn support.Jim Wilson2018-03-141-27/+413
* RISC-V/GAS: Correct an `expr' global shadowing error for pre-4.8 GCCMaciej W. Rozycki2018-02-051-3/+3
* RISC-V: Fix bug in prior addi/c.nop patch.Jim Wilson2018-01-171-0/+10
* Update year range in copyright notice of binutils filesAlan Modra2018-01-031-1/+1
* RISC-V: Add compressed instruction hints, and a few misc cleanups.Jim Wilson2017-12-201-0/+3
* Fix riscv malloc error on small alignment after norvc.Jim Wilson2017-11-291-2/+10
* Compress loads/stores with implicit 0 offset.Jim Wilson2017-11-271-6/+32
* RISC-V: Fix riscv g++ testsuite EH failures.Jim Wilson2017-11-071-0/+15
* RISC-V: Add satp as an alias for sptbrPalmer Dabbelt2017-11-071-0/+1
* RISC-V: Don't emit 2-byte NOPs if the C extension is disabledPalmer Dabbelt2017-10-231-1/+1
* RISC-V: Relax RISCV_PCREL_* to RISCV_GPREL_*Palmer Dabbelt2017-10-191-1/+4
* RISC-V: Avoid emitting invalid instructions in mixed RVC/no-RVC codePalmer Dabbelt2017-09-071-17/+8
* Fix problems parsing RISCV architecture extenstions in the assembler.Andrew Waterman2017-07-281-11/+7
* RISC-V: Use pc-relative relocation for FDE initial locationKuan-Lin Chen2017-06-261-1/+19
* RISC-V: Error, don't warn, for shfit amounts/CSRsAndrew Waterman2017-06-231-8/+8
* RISC-V: Avoid a const warningPalmer Dabbelt2017-04-031-1/+1
* RISC-V: Allow ISA subsets to be disabledPalmer Dabbelt2017-03-311-0/+15
* Sanitize RISC-V GAS help text, documentationPalmer Dabbelt2017-03-221-7/+2
* RISC-V: Fix assembler for c.li, c.andi and c.addiwKito Cheng2017-03-151-0/+8
* Fix building riscv targets with gcc v6.3.1Nick Clifton2017-03-151-1/+1
* RISC-V: Fix DW_CFA_advance_loc relocation.Kuan-Lin Chen2017-03-141-0/+2
* RISC-V: Fix the offset of CFA relocation.Kuan-Lin Chen2017-03-141-10/+10
* RISC-V/GAS: Support more relocs against constant addressesAndrew Waterman2017-01-091-3/+2
* RISC-V/GAS: Improve handling of invalid relocsAndrew Waterman2017-01-091-1/+9
* RISC-V/GAS: Correct branch relaxation for weak symbols.Andrew Waterman2017-01-091-0/+1
* Add support for the Q extension to the RISCV ISA.Kito Cheng2017-01-031-2/+12
* Update year range in copyright notice of all files.Alan Modra2017-01-021-1/+1
* Support aligning text section from odd addressesAndrew Waterman2016-12-221-6/+16
* Fix a const-safety issue on GCC-4.9 and aboveTim Newsome2016-12-221-1/+1
* Don't define RISC-V .p2alignAndrew Waterman2016-12-201-40/+56
* Re-work RISC-V gas flags: now we just support -mabi and -marchAndrew Waterman2016-12-201-104/+93