GitWeb
Get Gentoo!
gentoo.org sites
gentoo.org
Wiki
Bugs
Forums
Packages
Planet
Archives
Sources
Infra Status
Home
Gentoo Repository
Repositories
Projects
Developer Overlays
User Overlays
Data
Websites
index
:
fork/binutils-gdb.git
gentoo/binutils-2.29.1
gentoo/binutils-2.30
gentoo/binutils-2.31
gentoo/binutils-2.31.1
gentoo/binutils-2.32
gentoo/binutils-2.33.1
gentoo/binutils-2.34
gentoo/binutils-2.35
gentoo/binutils-2.35.1
gentoo/binutils-2.35.2
gentoo/binutils-2.36
gentoo/binutils-2.36.1
gentoo/binutils-2.37
gentoo/binutils-2.38
gentoo/binutils-2.39
gentoo/binutils-2.40
gentoo/binutils-2.41
gentoo/binutils-2.42
gentoo/binutils-2.43
gentoo/dilfridge/test-libctf
master
Gentoo vendor branches of the binutils / gdb code
Gentoo toolchain team <toolchain@gentoo.org>
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
opcodes
Commit message (
Expand
)
Author
Age
Files
Lines
*
Andes Technology has good news for you, we plan to update the nds32 port of b...
Nick Clifton
2018-09-20
5
-300
/
+944
*
RISC-V: bge[u] should get higher priority than ble[u].
Jim Wilson
2018-09-17
2
-2
/
+6
*
x86: Set EVex=2 on EVEX.128 only vmovd and vmovq
H.J. Lu
2018-09-17
5
-13
/
+94
*
x86: Set Vex=1 on VEX.128 only vmovd and vmovq
H.J. Lu
2018-09-17
4
-18
/
+24
*
x86: Update disassembler for VexWIG
H.J. Lu
2018-09-17
2
-1563
/
+619
*
x86: Replace VexW=3 with VexWIG
H.J. Lu
2018-09-17
2
-468
/
+475
*
x86: Set VexW=3 on AVX vrsqrtss
H.J. Lu
2018-09-15
3
-2
/
+7
*
x86: Set Vex=1 on VEX.128 only vmovq
H.J. Lu
2018-09-15
4
-6
/
+12
*
x86: Support VEX/EVEX WIG encoding
H.J. Lu
2018-09-14
4
-932
/
+941
*
x86: Handle unsupported static rounding in vcvt[u]si2sd in 32-bit mode
H.J. Lu
2018-09-14
3
-2
/
+22
*
x86: Properly decode EVEX.W in vcvt[u]si2s[sd] in 32-bit mode
H.J. Lu
2018-09-14
3
-4
/
+23
*
i386: Reformat OP_E_memory
H.J. Lu
2018-09-14
2
-2
/
+6
*
x86: fold CRC32 templates
Jan Beulich
2018-09-14
3
-45
/
+12
*
x86: Remove VexW=1 from WIG VEX movq and vmovq
H.J. Lu
2018-09-13
2
-8
/
+8
*
i386: Update VexW field for VEX instructions
H.J. Lu
2018-09-13
3
-36
/
+44
*
x86: drop bogus IgnoreSize from a few further insns
Jan Beulich
2018-09-13
3
-52
/
+61
*
x86: drop bogus IgnoreSize from AVX512_4* insns
Jan Beulich
2018-09-13
3
-12
/
+18
*
x86: drop bogus IgnoreSize from AVX512DQ insns
Jan Beulich
2018-09-13
3
-96
/
+102
*
x86: drop bogus IgnoreSize from AVX512BW insns
Jan Beulich
2018-09-13
3
-78
/
+84
*
x86: drop bogus IgnoreSize from AVX512VL insns
Jan Beulich
2018-09-13
3
-26
/
+32
*
x86: drop bogus IgnoreSize from AVX512ER insns
Jan Beulich
2018-09-13
3
-32
/
+38
*
x86: drop bogus IgnoreSize from AVX512F insns
Jan Beulich
2018-09-13
3
-742
/
+748
*
x86: drop bogus IgnoreSize from SHA insns
Jan Beulich
2018-09-13
3
-16
/
+21
*
x86: drop bogus IgnoreSize from XOP and SSE4a insns
Jan Beulich
2018-09-13
3
-266
/
+271
*
x86: drop bogus IgnoreSize from AVX2 insns
Jan Beulich
2018-09-13
3
-238
/
+244
*
x86: drop bogus IgnoreSize from AVX insns
Jan Beulich
2018-09-13
3
-256
/
+262
*
x86: drop bogus IgnoreSize from GNFI insns
Jan Beulich
2018-09-13
3
-12
/
+17
*
x86: drop bogus IgnoreSize from PCLMUL/VPCLMUL insns
Jan Beulich
2018-09-13
3
-32
/
+37
*
x86: drop bogus IgnoreSize from AES/VAES insns
Jan Beulich
2018-09-13
3
-44
/
+49
*
x86: drop bogus IgnoreSize from SSE4.2 insns
Jan Beulich
2018-09-13
3
-20
/
+26
*
x86: drop bogus IgnoreSize from SSE4.1 insns
Jan Beulich
2018-09-13
3
-126
/
+132
*
x86: drop bogus IgnoreSize from SSSE3 insns
Jan Beulich
2018-09-13
3
-64
/
+70
*
x86: drop bogus IgnoreSize from SSE3 insns
Jan Beulich
2018-09-13
3
-36
/
+41
*
x86: drop bogus IgnoreSize from SSE2 insns
Jan Beulich
2018-09-13
3
-416
/
+421
*
x86: drop bogus IgnoreSize from SSE insns
Jan Beulich
2018-09-13
3
-118
/
+123
*
x86: drop unnecessary {,No}Rex64
Jan Beulich
2018-09-13
3
-10
/
+16
*
x86: also allow D on 3-operand insns
Jan Beulich
2018-09-13
3
-96
/
+18
*
x86: use D attribute also for SIMD templates
Jan Beulich
2018-09-13
4
-1277
/
+165
*
x86-64: bndmk, bndldx, and bndstx don't allow RIP-relative addressing
Jan Beulich
2018-09-13
2
-3
/
+21
*
S12Z: Make disassebler work for --enable-targets=all config.
John Darrington
2018-09-08
2
-0
/
+5
*
RISC-V: Correct the requirement of compressed floating point instructions
Jim Wilson
2018-08-31
2
-16
/
+21
*
RISC-V: Allow instruction require more than one extension
Jim Wilson
2018-08-30
3
-630
/
+636
*
sparc/leon: add support for partial write psr instruction
Martin Aberg
2018-08-29
2
-0
/
+13
*
[MIPS] Add Loongson 2K1000 proccessor support.
Chenghua Xu
2018-08-29
2
-0
/
+9
*
[MIPS] Add Loongson 3A2000/3A3000 proccessor support.
Chenghua Xu
2018-08-29
2
-0
/
+9
*
[MIPS] Add Loongson 3A1000 proccessor support.
Chenghua Xu
2018-08-29
3
-2
/
+14
*
[MIPS/GAS] Add Loongson EXT2 Instructions support.
Chenghua Xu
2018-08-29
3
-0
/
+26
*
[MIPS/GAS] Split Loongson EXT Instructions from loongson3a.
Chenghua Xu
2018-08-29
3
-65
/
+88
*
[MIPS/GAS] Split Loongson CAM Instructions from loongson3a
Chenghua Xu
2018-08-29
3
-6
/
+30
*
Use operand->extract to provide defaults for optional PowerPC operands
Alan Modra
2018-08-21
3
-48
/
+82
[next]