cleanup/simplification

replace the _ensure_value_is_boxed indirection to handle boxing of constants on
ARM with make_sure_var_in_reg calls. Boxing of constants is done by overriding
return_constant in a platform specific way.

4 files changed, 105 insertions, 114 deletions

diff --git a/pypy/jit/backend/arm/assembler.py b/pypy/jit/backend/arm/assembler.py
index e2316ac259..6363d7b724 100644
--- a/pypy/jit/backend/arm/assembler.py
+++ b/pypy/jit/backend/arm/assembler.py
@@ -8,7 +8,7 @@ from pypy.jit.backend.arm.arch import WORD, DOUBLE_WORD, FUNC_ALIGN, \
 from pypy.jit.backend.arm.codebuilder import ARMv7Builder, OverwritingBuilder
 from pypy.jit.backend.arm.locations import get_fp_offset
 from pypy.jit.backend.arm.regalloc import (Regalloc, ARMFrameManager,
-                    ARMv7RegisterManager, check_imm_arg,
+                    CoreRegisterManager, check_imm_arg,
                     operations as regalloc_operations,
                     operations_with_guard as regalloc_operations_with_guard)
 from pypy.jit.backend.llsupport.asmmemmgr import MachineDataBlockWrapper
@@ -492,10 +492,10 @@ class AssemblerARM(ResOpAssembler):
             # are stored in r0 and r1.
             mc.SUB_rr(r.r0.value, r.r1.value, r.r0.value)
             addr = self.cpu.gc_ll_descr.get_malloc_slowpath_addr()
-            for reg, ofs in ARMv7RegisterManager.REGLOC_TO_COPY_AREA_OFS.items():
+            for reg, ofs in CoreRegisterManager.REGLOC_TO_COPY_AREA_OFS.items():
                 mc.STR_ri(reg.value, r.fp.value, imm=ofs)
             mc.BL(addr)
-            for reg, ofs in ARMv7RegisterManager.REGLOC_TO_COPY_AREA_OFS.items():
+            for reg, ofs in CoreRegisterManager.REGLOC_TO_COPY_AREA_OFS.items():
                 mc.LDR_ri(reg.value, r.fp.value, imm=ofs)
 
         mc.CMP_ri(r.r0.value, 0)
diff --git a/pypy/jit/backend/arm/helper/regalloc.py b/pypy/jit/backend/arm/helper/regalloc.py
index 47cd743db0..c81355f475 100644
--- a/pypy/jit/backend/arm/helper/regalloc.py
+++ b/pypy/jit/backend/arm/helper/regalloc.py
@@ -32,14 +32,14 @@ def prepare_op_ri(name=None, imm_size=0xFF, commutative=True, allow_zero=True):
         imm_a0 = check_imm_box(a0, imm_size, allow_zero=allow_zero)
         imm_a1 = check_imm_box(a1, imm_size, allow_zero=allow_zero)
         if not imm_a0 and imm_a1:
-            l0 = self._ensure_value_is_boxed(a0)
+            l0 = self.make_sure_var_in_reg(a0)
             l1 = self.convert_to_imm(a1)
         elif commutative and imm_a0 and not imm_a1:
             l1 = self.convert_to_imm(a0)
-            l0 = self._ensure_value_is_boxed(a1, boxes)
+            l0 = self.make_sure_var_in_reg(a1, boxes)
         else:
-            l0 = self._ensure_value_is_boxed(a0, boxes)
-            l1 = self._ensure_value_is_boxed(a1, boxes)
+            l0 = self.make_sure_var_in_reg(a0, boxes)
+            l1 = self.make_sure_var_in_reg(a1, boxes)
         self.possibly_free_vars_for_op(op)
         self.free_temp_vars()
         res = self.force_allocate_reg(op.result, boxes)
@@ -52,10 +52,10 @@ def prepare_float_op(name=None, base=True, float_result=True, guard=False):
     if guard:
         def f(self, op, guard_op, fcond):
             locs = []
-            loc1 = self._ensure_value_is_boxed(op.getarg(0))
+            loc1 = self.make_sure_var_in_reg(op.getarg(0))
             locs.append(loc1)
             if base:
-                loc2 = self._ensure_value_is_boxed(op.getarg(1))
+                loc2 = self.make_sure_var_in_reg(op.getarg(1))
                 locs.append(loc2)
             self.possibly_free_vars_for_op(op)
             self.free_temp_vars()
@@ -70,10 +70,10 @@ def prepare_float_op(name=None, base=True, float_result=True, guard=False):
     else:
         def f(self, op, fcond):
             locs = []
-            loc1 = self._ensure_value_is_boxed(op.getarg(0))
+            loc1 = self.make_sure_var_in_reg(op.getarg(0))
             locs.append(loc1)
             if base:
-                loc2 = self._ensure_value_is_boxed(op.getarg(1))
+                loc2 = self.make_sure_var_in_reg(op.getarg(1))
                 locs.append(loc2)
             self.possibly_free_vars_for_op(op)
             self.free_temp_vars()
@@ -111,11 +111,11 @@ def prepare_cmp_op(name=None):
         arg0, arg1 = boxes
         imm_a1 = check_imm_box(arg1)
 
-        l0 = self._ensure_value_is_boxed(arg0, forbidden_vars=boxes)
+        l0 = self.make_sure_var_in_reg(arg0, forbidden_vars=boxes)
         if imm_a1:
             l1 = self.convert_to_imm(arg1)
         else:
-            l1 = self._ensure_value_is_boxed(arg1, forbidden_vars=boxes)
+            l1 = self.make_sure_var_in_reg(arg1, forbidden_vars=boxes)
 
         self.possibly_free_vars_for_op(op)
         self.free_temp_vars()
@@ -134,7 +134,7 @@ def prepare_op_unary_cmp(name=None):
         assert fcond is not None
         a0 = op.getarg(0)
         assert isinstance(a0, Box)
-        reg = self._ensure_value_is_boxed(a0)
+        reg = self.make_sure_var_in_reg(a0)
         self.possibly_free_vars_for_op(op)
         if guard_op is None:
             res = self.force_allocate_reg(op.result, [a0])
diff --git a/pypy/jit/backend/arm/opassembler.py b/pypy/jit/backend/arm/opassembler.py
index bbebdeedb3..505140c241 100644
--- a/pypy/jit/backend/arm/opassembler.py
+++ b/pypy/jit/backend/arm/opassembler.py
@@ -988,8 +988,8 @@ class ResOpAssembler(object):
     def _emit_copystrcontent(self, op, regalloc, fcond, is_unicode):
         # compute the source address
         args = op.getarglist()
-        base_loc = regalloc._ensure_value_is_boxed(args[0], args)
-        ofs_loc = regalloc._ensure_value_is_boxed(args[2], args)
+        base_loc = regalloc.make_sure_var_in_reg(args[0], args)
+        ofs_loc = regalloc.make_sure_var_in_reg(args[2], args)
         assert args[0] is not args[1]    # forbidden case of aliasing
         regalloc.possibly_free_var(args[0])
         regalloc.free_temp_vars()
@@ -1009,8 +1009,8 @@ class ResOpAssembler(object):
         dstaddr_loc = regalloc.force_allocate_reg(dstaddr_box,
                                                         selected_reg=r.r0)
         forbidden_vars.append(dstaddr_box)
-        base_loc = regalloc._ensure_value_is_boxed(args[1], forbidden_vars)
-        ofs_loc = regalloc._ensure_value_is_boxed(args[3], forbidden_vars)
+        base_loc = regalloc.make_sure_var_in_reg(args[1], forbidden_vars)
+        ofs_loc = regalloc.make_sure_var_in_reg(args[3], forbidden_vars)
         assert base_loc.is_reg()
         assert ofs_loc.is_reg()
         regalloc.possibly_free_var(args[1])
@@ -1026,7 +1026,7 @@ class ResOpAssembler(object):
         # need the box here
         if isinstance(args[4], Box):
             length_box = args[4]
-            length_loc = regalloc._ensure_value_is_boxed(args[4],
+            length_loc = regalloc.make_sure_var_in_reg(args[4],
                                                         forbidden_vars)
         else:
             length_box = TempInt()
diff --git a/pypy/jit/backend/arm/regalloc.py b/pypy/jit/backend/arm/regalloc.py
index 56ba75a3c2..c1c54c636f 100644
--- a/pypy/jit/backend/arm/regalloc.py
+++ b/pypy/jit/backend/arm/regalloc.py
@@ -84,8 +84,28 @@ class ARMFrameManager(FrameManager):
 def void(self, op, fcond):
     return []
 
+class ARMRegisterManager(RegisterManager):
+    def return_constant(self, v, forbidden_vars=[], selected_reg=None):
+        self._check_type(v)
+        if isinstance(v, Const):
+            if isinstance(v, ConstPtr):
+                tp = REF
+            elif isinstance(v, ConstFloat):
+                tp = FLOAT
+            else:
+                tp = INT
+            loc = self.get_scratch_reg(tp,
+                    self.temp_boxes + forbidden_vars,
+                    selected_reg=selected_reg)
+            immvalue = self.convert_to_imm(v)
+            self.assembler.load(loc, immvalue)
+            return loc
+        else:
+            return RegisterManager.return_constant(self, v,
+                                    forbidden_vars, selected_reg)
 
-class VFPRegisterManager(RegisterManager):
+
+class VFPRegisterManager(ARMRegisterManager):
     all_regs = r.all_vfp_regs
     box_types = [FLOAT]
     save_around_call_regs = r.all_vfp_regs
@@ -107,18 +127,6 @@ class VFPRegisterManager(RegisterManager):
         reg = self.force_allocate_reg(v, selected_reg=r.d0)
         return reg
 
-    def ensure_value_is_boxed(self, thing, forbidden_vars=[]):
-        loc = None
-        if isinstance(thing, Const):
-            assert isinstance(thing, ConstFloat)
-            loc = self.get_scratch_reg(FLOAT, self.temp_boxes + forbidden_vars)
-            immvalue = self.convert_to_imm(thing)
-            self.assembler.load(loc, immvalue)
-        else:
-            loc = self.make_sure_var_in_reg(thing,
-                            forbidden_vars=self.temp_boxes + forbidden_vars)
-        return loc
-
     def get_scratch_reg(self, type=FLOAT, forbidden_vars=[], selected_reg=None):
         assert type == FLOAT  # for now
         box = TempFloat()
@@ -128,7 +136,7 @@ class VFPRegisterManager(RegisterManager):
         return reg
 
 
-class ARMv7RegisterManager(RegisterManager):
+class CoreRegisterManager(ARMRegisterManager):
     all_regs = r.all_regs
     box_types = None       # or a list of acceptable types
     no_lower_byte_regs = all_regs
@@ -161,22 +169,6 @@ class ARMv7RegisterManager(RegisterManager):
             return locations.ImmLocation(rffi.cast(lltype.Signed, c.value))
         assert 0
 
-    def ensure_value_is_boxed(self, thing, forbidden_vars=None):
-        loc = None
-        if isinstance(thing, Const):
-            if isinstance(thing, ConstPtr):
-                tp = REF
-            else:
-                tp = INT
-            loc = self.get_scratch_reg(tp, forbidden_vars=self.temp_boxes
-                                                            + forbidden_vars)
-            immvalue = self.convert_to_imm(thing)
-            self.assembler.load(loc, immvalue)
-        else:
-            loc = self.make_sure_var_in_reg(thing,
-                            forbidden_vars=self.temp_boxes + forbidden_vars)
-        return loc
-
     def get_scratch_reg(self, type=INT, forbidden_vars=[], selected_reg=None):
         assert type == INT or type == REF
         box = TempBox()
@@ -276,7 +268,12 @@ class Regalloc(object):
 
     def make_sure_var_in_reg(self, var, forbidden_vars=[],
                          selected_reg=None, need_lower_byte=False):
-        assert 0, 'should not be called directly'
+        if var.type == FLOAT:
+            return self.vfprm.make_sure_var_in_reg(var, forbidden_vars,
+                                        selected_reg, need_lower_byte)
+        else:
+            return self.rm.make_sure_var_in_reg(var, forbidden_vars,
+                                        selected_reg, need_lower_byte)
 
     def convert_to_imm(self, value):
         if isinstance(value, ConstInt):
@@ -293,7 +290,7 @@ class Regalloc(object):
         fm = self.frame_manager
         asm = self.assembler
         self.vfprm = VFPRegisterManager(longevity, fm, asm)
-        self.rm = ARMv7RegisterManager(longevity, fm, asm)
+        self.rm = CoreRegisterManager(longevity, fm, asm)
 
     def prepare_loop(self, inputargs, operations):
         self._prepare(inputargs, operations)
@@ -425,12 +422,6 @@ class Regalloc(object):
         self.rm.before_call(force_store, save_all_regs)
         self.vfprm.before_call(force_store, save_all_regs)
 
-    def _ensure_value_is_boxed(self, thing, forbidden_vars=[]):
-        if thing.type == FLOAT:
-            return self.vfprm.ensure_value_is_boxed(thing, forbidden_vars)
-        else:
-            return self.rm.ensure_value_is_boxed(thing, forbidden_vars)
-
     def _sync_var(self, v):
         if v.type == FLOAT:
             self.vfprm._sync_var(v)
@@ -443,14 +434,14 @@ class Regalloc(object):
         imm_a0 = check_imm_box(a0)
         imm_a1 = check_imm_box(a1)
         if not imm_a0 and imm_a1:
-            l0 = self._ensure_value_is_boxed(a0, boxes)
+            l0 = self.make_sure_var_in_reg(a0, boxes)
             l1 = self.convert_to_imm(a1)
         elif imm_a0 and not imm_a1:
             l0 = self.convert_to_imm(a0)
-            l1 = self._ensure_value_is_boxed(a1, boxes)
+            l1 = self.make_sure_var_in_reg(a1, boxes)
         else:
-            l0 = self._ensure_value_is_boxed(a0, boxes)
-            l1 = self._ensure_value_is_boxed(a1, boxes)
+            l0 = self.make_sure_var_in_reg(a0, boxes)
+            l1 = self.make_sure_var_in_reg(a1, boxes)
         return [l0, l1]
 
     def prepare_op_int_add(self, op, fcond):
@@ -465,14 +456,14 @@ class Regalloc(object):
         imm_a0 = check_imm_box(a0)
         imm_a1 = check_imm_box(a1)
         if not imm_a0 and imm_a1:
-            l0 = self._ensure_value_is_boxed(a0, boxes)
+            l0 = self.make_sure_var_in_reg(a0, boxes)
             l1 = self.convert_to_imm(a1)
         elif imm_a0 and not imm_a1:
             l0 = self.convert_to_imm(a0)
-            l1 = self._ensure_value_is_boxed(a1, boxes)
+            l1 = self.make_sure_var_in_reg(a1, boxes)
         else:
-            l0 = self._ensure_value_is_boxed(a0, boxes)
-            l1 = self._ensure_value_is_boxed(a1, boxes)
+            l0 = self.make_sure_var_in_reg(a0, boxes)
+            l1 = self.make_sure_var_in_reg(a1, boxes)
         return [l0, l1]
 
     def prepare_op_int_sub(self, op, fcond):
@@ -486,8 +477,8 @@ class Regalloc(object):
         boxes = op.getarglist()
         a0, a1 = boxes
 
-        reg1 = self._ensure_value_is_boxed(a0, forbidden_vars=boxes)
-        reg2 = self._ensure_value_is_boxed(a1, forbidden_vars=boxes)
+        reg1 = self.make_sure_var_in_reg(a0, forbidden_vars=boxes)
+        reg2 = self.make_sure_var_in_reg(a1, forbidden_vars=boxes)
 
         self.possibly_free_vars(boxes)
         self.possibly_free_vars_for_op(op)
@@ -496,14 +487,14 @@ class Regalloc(object):
         return [reg1, reg2, res]
     
     def prepare_op_int_force_ge_zero(self, op, fcond):
-        argloc = self._ensure_value_is_boxed(op.getarg(0))
+        argloc = self.make_sure_var_in_reg(op.getarg(0))
         resloc = self.force_allocate_reg(op.result, [op.getarg(0)])
         return [argloc, resloc]
 
     def prepare_guard_int_mul_ovf(self, op, guard, fcond):
         boxes = op.getarglist()
-        reg1 = self._ensure_value_is_boxed(boxes[0], forbidden_vars=boxes)
-        reg2 = self._ensure_value_is_boxed(boxes[1], forbidden_vars=boxes)
+        reg1 = self.make_sure_var_in_reg(boxes[0], forbidden_vars=boxes)
+        reg2 = self.make_sure_var_in_reg(boxes[1], forbidden_vars=boxes)
         res = self.force_allocate_reg(op.result)
         return self._prepare_guard(guard, [reg1, reg2, res])
 
@@ -575,7 +566,7 @@ class Regalloc(object):
     prepare_guard_int_is_zero = prepare_op_unary_cmp('int_is_zero')
 
     def prepare_op_int_neg(self, op, fcond):
-        l0 = self._ensure_value_is_boxed(op.getarg(0))
+        l0 = self.make_sure_var_in_reg(op.getarg(0))
         self.possibly_free_vars_for_op(op)
         self.free_temp_vars()
         resloc = self.force_allocate_reg(op.result)
@@ -628,15 +619,15 @@ class Regalloc(object):
 
     def _prepare_llong_binop_xx(self, op, fcond):
         # arg 0 is the address of the function
-        loc0 = self._ensure_value_is_boxed(op.getarg(1))
-        loc1 = self._ensure_value_is_boxed(op.getarg(2))
+        loc0 = self.make_sure_var_in_reg(op.getarg(1))
+        loc1 = self.make_sure_var_in_reg(op.getarg(2))
         self.possibly_free_vars_for_op(op)
         self.free_temp_vars()
         res = self.vfprm.force_allocate_reg(op.result)
         return [loc0, loc1, res]
 
     def _prepare_llong_to_int(self, op, fcond):
-        loc0 = self._ensure_value_is_boxed(op.getarg(1))
+        loc0 = self.make_sure_var_in_reg(op.getarg(1))
         res = self.force_allocate_reg(op.result)
         return [loc0, res]
 
@@ -664,7 +655,7 @@ class Regalloc(object):
         return args
 
     def prepare_op_guard_true(self, op, fcond):
-        l0 = self._ensure_value_is_boxed(op.getarg(0))
+        l0 = self.make_sure_var_in_reg(op.getarg(0))
         args = self._prepare_guard(op, [l0])
         return args
 
@@ -676,9 +667,9 @@ class Regalloc(object):
         boxes = op.getarglist()
         a0, a1 = boxes
         imm_a1 = check_imm_box(a1)
-        l0 = self._ensure_value_is_boxed(a0, boxes)
+        l0 = self.make_sure_var_in_reg(a0, boxes)
         if not imm_a1:
-            l1 = self._ensure_value_is_boxed(a1, boxes)
+            l1 = self.make_sure_var_in_reg(a1, boxes)
         else:
             l1 = self.convert_to_imm(a1)
         assert op.result is None
@@ -698,7 +689,7 @@ class Regalloc(object):
     def prepare_op_guard_exception(self, op, fcond):
         boxes = op.getarglist()
         arg0 = ConstInt(rffi.cast(lltype.Signed, op.getarg(0).getint()))
-        loc = self._ensure_value_is_boxed(arg0)
+        loc = self.make_sure_var_in_reg(arg0)
         loc1 = self.get_scratch_reg(INT, boxes)
         if op.result in self.longevity:
             resloc = self.force_allocate_reg(op.result, boxes)
@@ -712,7 +703,7 @@ class Regalloc(object):
         return arglocs
 
     def prepare_op_guard_no_exception(self, op, fcond):
-        loc = self._ensure_value_is_boxed(
+        loc = self.make_sure_var_in_reg(
                     ConstInt(self.cpu.pos_exception()))
         arglocs = self._prepare_guard(op, [loc])
         return arglocs
@@ -726,7 +717,7 @@ class Regalloc(object):
         assert isinstance(op.getarg(0), Box)
         boxes = op.getarglist()
 
-        x = self._ensure_value_is_boxed(boxes[0], boxes)
+        x = self.make_sure_var_in_reg(boxes[0], boxes)
         y_val = rffi.cast(lltype.Signed, op.getarg(1).getint())
 
         arglocs = [x, None, None]
@@ -836,8 +827,8 @@ class Regalloc(object):
         boxes = op.getarglist()
         a0, a1 = boxes
         ofs, size, sign = unpack_fielddescr(op.getdescr())
-        base_loc = self._ensure_value_is_boxed(a0, boxes)
-        value_loc = self._ensure_value_is_boxed(a1, boxes)
+        base_loc = self.make_sure_var_in_reg(a0, boxes)
+        value_loc = self.make_sure_var_in_reg(a1, boxes)
         if check_imm_arg(ofs):
             ofs_loc = imm(ofs)
         else:
@@ -850,7 +841,7 @@ class Regalloc(object):
     def prepare_op_getfield_gc(self, op, fcond):
         a0 = op.getarg(0)
         ofs, size, sign = unpack_fielddescr(op.getdescr())
-        base_loc = self._ensure_value_is_boxed(a0)
+        base_loc = self.make_sure_var_in_reg(a0)
         immofs = imm(ofs)
         if check_imm_arg(ofs):
             ofs_loc = immofs
@@ -870,8 +861,8 @@ class Regalloc(object):
         t = unpack_interiorfielddescr(op.getdescr())
         ofs, itemsize, fieldsize, sign = t
         args = op.getarglist()
-        base_loc = self._ensure_value_is_boxed(op.getarg(0), args)
-        index_loc = self._ensure_value_is_boxed(op.getarg(1), args)
+        base_loc = self.make_sure_var_in_reg(op.getarg(0), args)
+        index_loc = self.make_sure_var_in_reg(op.getarg(1), args)
         immofs = imm(ofs)
         if check_imm_arg(ofs):
             ofs_loc = immofs
@@ -888,9 +879,9 @@ class Regalloc(object):
         t = unpack_interiorfielddescr(op.getdescr())
         ofs, itemsize, fieldsize, sign = t
         args = op.getarglist()
-        base_loc = self._ensure_value_is_boxed(op.getarg(0), args)
-        index_loc = self._ensure_value_is_boxed(op.getarg(1), args)
-        value_loc = self._ensure_value_is_boxed(op.getarg(2), args)
+        base_loc = self.make_sure_var_in_reg(op.getarg(0), args)
+        index_loc = self.make_sure_var_in_reg(op.getarg(1), args)
+        value_loc = self.make_sure_var_in_reg(op.getarg(2), args)
         immofs = imm(ofs)
         if check_imm_arg(ofs):
             ofs_loc = immofs
@@ -906,7 +897,7 @@ class Regalloc(object):
         assert isinstance(arraydescr, ArrayDescr)
         ofs = arraydescr.lendescr.offset
         arg = op.getarg(0)
-        base_loc = self._ensure_value_is_boxed(arg)
+        base_loc = self.make_sure_var_in_reg(arg)
         self.possibly_free_vars_for_op(op)
         self.free_temp_vars()
         res = self.force_allocate_reg(op.result)
@@ -916,9 +907,9 @@ class Regalloc(object):
         size, ofs, _ = unpack_arraydescr(op.getdescr())
         scale = get_scale(size)
         args = op.getarglist()
-        base_loc = self._ensure_value_is_boxed(args[0], args)
-        ofs_loc = self._ensure_value_is_boxed(args[1], args)
-        value_loc = self._ensure_value_is_boxed(args[2], args)
+        base_loc = self.make_sure_var_in_reg(args[0], args)
+        ofs_loc = self.make_sure_var_in_reg(args[1], args)
+        value_loc = self.make_sure_var_in_reg(args[2], args)
         assert check_imm_arg(ofs)
         return [value_loc, base_loc, ofs_loc, imm(scale), imm(ofs)]
     prepare_op_setarrayitem_raw = prepare_op_setarrayitem_gc
@@ -928,8 +919,8 @@ class Regalloc(object):
         boxes = op.getarglist()
         size, ofs, _ = unpack_arraydescr(op.getdescr())
         scale = get_scale(size)
-        base_loc = self._ensure_value_is_boxed(boxes[0], boxes)
-        ofs_loc = self._ensure_value_is_boxed(boxes[1], boxes)
+        base_loc = self.make_sure_var_in_reg(boxes[0], boxes)
+        ofs_loc = self.make_sure_var_in_reg(boxes[1], boxes)
         self.possibly_free_vars_for_op(op)
         self.free_temp_vars()
         res = self.force_allocate_reg(op.result)
@@ -943,7 +934,7 @@ class Regalloc(object):
 
     def prepare_op_strlen(self, op, fcond):
         args = op.getarglist()
-        l0 = self._ensure_value_is_boxed(op.getarg(0))
+        l0 = self.make_sure_var_in_reg(op.getarg(0))
         basesize, itemsize, ofs_length = symbolic.get_array_token(rstr.STR,
                                          self.cpu.translate_support_code)
         immofs = imm(ofs_length)
@@ -962,14 +953,14 @@ class Regalloc(object):
 
     def prepare_op_strgetitem(self, op, fcond):
         boxes = op.getarglist()
-        base_loc = self._ensure_value_is_boxed(boxes[0])
+        base_loc = self.make_sure_var_in_reg(boxes[0])
 
         a1 = boxes[1]
         imm_a1 = check_imm_box(a1)
         if imm_a1:
             ofs_loc = self.convert_to_imm(a1)
         else:
-            ofs_loc = self._ensure_value_is_boxed(a1, boxes)
+            ofs_loc = self.make_sure_var_in_reg(a1, boxes)
 
         self.possibly_free_vars_for_op(op)
         self.free_temp_vars()
@@ -982,9 +973,9 @@ class Regalloc(object):
 
     def prepare_op_strsetitem(self, op, fcond):
         boxes = op.getarglist()
-        base_loc = self._ensure_value_is_boxed(boxes[0], boxes)
-        ofs_loc = self._ensure_value_is_boxed(boxes[1], boxes)
-        value_loc = self._ensure_value_is_boxed(boxes[2], boxes)
+        base_loc = self.make_sure_var_in_reg(boxes[0], boxes)
+        ofs_loc = self.make_sure_var_in_reg(boxes[1], boxes)
+        value_loc = self.make_sure_var_in_reg(boxes[2], boxes)
         basesize, itemsize, ofs_length = symbolic.get_array_token(rstr.STR,
                                          self.cpu.translate_support_code)
         assert itemsize == 1
@@ -994,7 +985,7 @@ class Regalloc(object):
     prepare_op_copyunicodecontent = void
 
     def prepare_op_unicodelen(self, op, fcond):
-        l0 = self._ensure_value_is_boxed(op.getarg(0))
+        l0 = self.make_sure_var_in_reg(op.getarg(0))
         basesize, itemsize, ofs_length = symbolic.get_array_token(rstr.UNICODE,
                                          self.cpu.translate_support_code)
         immofs = imm(ofs_length)
@@ -1011,8 +1002,8 @@ class Regalloc(object):
 
     def prepare_op_unicodegetitem(self, op, fcond):
         boxes = op.getarglist()
-        base_loc = self._ensure_value_is_boxed(boxes[0], boxes)
-        ofs_loc = self._ensure_value_is_boxed(boxes[1], boxes)
+        base_loc = self.make_sure_var_in_reg(boxes[0], boxes)
+        ofs_loc = self.make_sure_var_in_reg(boxes[1], boxes)
 
         self.possibly_free_vars_for_op(op)
         self.free_temp_vars()
@@ -1026,9 +1017,9 @@ class Regalloc(object):
 
     def prepare_op_unicodesetitem(self, op, fcond):
         boxes = op.getarglist()
-        base_loc = self._ensure_value_is_boxed(boxes[0], boxes)
-        ofs_loc = self._ensure_value_is_boxed(boxes[1], boxes)
-        value_loc = self._ensure_value_is_boxed(boxes[2], boxes)
+        base_loc = self.make_sure_var_in_reg(boxes[0], boxes)
+        ofs_loc = self.make_sure_var_in_reg(boxes[1], boxes)
+        value_loc = self.make_sure_var_in_reg(boxes[2], boxes)
         basesize, itemsize, ofs_length = symbolic.get_array_token(rstr.UNICODE,
                                          self.cpu.translate_support_code)
         scale = itemsize / 2
@@ -1041,7 +1032,7 @@ class Regalloc(object):
         if imm_arg:
             argloc = self.convert_to_imm(arg)
         else:
-            argloc = self._ensure_value_is_boxed(arg)
+            argloc = self.make_sure_var_in_reg(arg)
         self.possibly_free_vars_for_op(op)
         self.free_temp_vars()
         resloc = self.force_allocate_reg(op.result)
@@ -1092,7 +1083,7 @@ class Regalloc(object):
         # twice from the memory.
         N = op.numargs()
         args = op.getarglist()
-        arglocs = [self._ensure_value_is_boxed(op.getarg(i), args)
+        arglocs = [self.make_sure_var_in_reg(op.getarg(i), args)
                                                               for i in range(N)]
         tmp = self.get_scratch_reg(INT, args)
         assert tmp not in arglocs
@@ -1214,7 +1205,7 @@ class Regalloc(object):
                             float_result=False, name='prepare_guard_float_ge')
 
     def prepare_op_math_sqrt(self, op, fcond):
-        loc = self._ensure_value_is_boxed(op.getarg(1))
+        loc = self.make_sure_var_in_reg(op.getarg(1))
         self.possibly_free_vars_for_op(op)
         self.free_temp_vars()
         res = self.vfprm.force_allocate_reg(op.result)
@@ -1222,12 +1213,12 @@ class Regalloc(object):
         return [loc, res]
 
     def prepare_op_cast_float_to_int(self, op, fcond):
-        loc1 = self._ensure_value_is_boxed(op.getarg(0))
+        loc1 = self.make_sure_var_in_reg(op.getarg(0))
         res = self.rm.force_allocate_reg(op.result)
         return [loc1, res]
 
     def prepare_op_cast_int_to_float(self, op, fcond):
-        loc1 = self._ensure_value_is_boxed(op.getarg(0))
+        loc1 = self.make_sure_var_in_reg(op.getarg(0))
         res = self.vfprm.force_allocate_reg(op.result)
         return [loc1, res]
 
@@ -1246,12 +1237,12 @@ class Regalloc(object):
         return [loc, res]
 
     def prepare_op_cast_float_to_singlefloat(self, op, fcond):
-        loc1 = self._ensure_value_is_boxed(op.getarg(0))
+        loc1 = self.make_sure_var_in_reg(op.getarg(0))
         res = self.force_allocate_reg(op.result)
         return [loc1, res]
-    
+
     def prepare_op_cast_singlefloat_to_float(self, op, fcond):
-        loc1 = self._ensure_value_is_boxed(op.getarg(0))
+        loc1 = self.make_sure_var_in_reg(op.getarg(0))
         res = self.force_allocate_reg(op.result)
         return [loc1, res]