Initial 4.7.0 patchset based on the latest 4.6.3 patchset.

26 files changed, 14440 insertions, 0 deletions

diff --git a/4.7.0/gentoo/03_all_java-nomulti.patch b/4.7.0/gentoo/03_all_java-nomulti.patch
new file mode 100644
index 0000000..5fce8b2
--- /dev/null
+++ b/4.7.0/gentoo/03_all_java-nomulti.patch
@@ -0,0 +1,44 @@
+--- a/libjava/configure
++++ b/libjava/configure
+@@ -1618,6 +1618,8 @@ Optional Features:
+                           default=yes
+   --enable-java-maintainer-mode
+                           allow rebuilding of .class and .h files
++  --enable-libjava-multilib
++                          build libjava as multilib
+   --disable-dependency-tracking  speeds up one-time build
+   --enable-dependency-tracking   do not reject slow dependency extractors
+   --enable-maintainer-mode  enable make rules and dependencies not useful
+@@ -3361,6 +3363,16 @@ else
+ fi
+ 
+ 
++# Check whether --enable-libjava-multilib was given.
++if test "${enable_libjava_multilib+set}" = set; then
++  enableval=$enable_libjava_multilib;
++fi
++
++if test "$enable_libjava_multilib" = no; then
++  multilib=no
++  ac_configure_args="$ac_configure_args --disable-multilib"
++fi
++
+ # It may not be safe to run linking tests in AC_PROG_CC/AC_PROG_CXX.
+ 
+ 
+--- a/libjava/configure.ac
++++ b/libjava/configure.ac
+@@ -139,6 +139,13 @@ AC_ARG_ENABLE(java-maintainer-mode,
+ 	[allow rebuilding of .class and .h files]))
+ AM_CONDITIONAL(JAVA_MAINTAINER_MODE, test "$enable_java_maintainer_mode" = yes)
+ 
++AC_ARG_ENABLE(libjava-multilib,
++	AS_HELP_STRING([--enable-libjava-multilib], [build libjava as multilib]))
++if test "$enable_libjava_multilib" = no; then
++  multilib=no
++  ac_configure_args="$ac_configure_args --disable-multilib"
++fi
++
+ # It may not be safe to run linking tests in AC_PROG_CC/AC_PROG_CXX.
+ GCC_NO_EXECUTABLES
+ 
diff --git a/4.7.0/gentoo/08_all_cross-compile.patch.exclude b/4.7.0/gentoo/08_all_cross-compile.patch.exclude
new file mode 100644
index 0000000..4203e3a
--- /dev/null
+++ b/4.7.0/gentoo/08_all_cross-compile.patch.exclude
@@ -0,0 +1,40 @@
+Some notes on the 'bootstrap with or without libc headers' debate:
+http://linuxfromscratch.org/pipermail/lfs-dev/2005-July/052409.html
+http://gcc.gnu.org/ml/gcc/2005-07/msg01195.html
+
+--- a/gcc/configure
++++ b/gcc/configure
+@@ -11354,7 +11354,7 @@ then
+ 		*)
+ 			;;
+ 	esac
+-elif test "x$TARGET_SYSTEM_ROOT" != x; then
++elif test "x$TARGET_SYSTEM_ROOT" != x -o $build != $host; then
+         SYSTEM_HEADER_DIR=$build_system_header_dir
+ fi
+ 
+--- a/gcc/configure.ac
++++ b/gcc/configure.ac
+@@ -1759,7 +1759,7 @@ then
+ 		*)
+ 			;;
+ 	esac
+-elif test "x$TARGET_SYSTEM_ROOT" != x; then
++elif test "x$TARGET_SYSTEM_ROOT" != x -o $build != $host; then
+         SYSTEM_HEADER_DIR=$build_system_header_dir 
+ fi
+ 
+--- a/gcc/unwind-dw2.c
++++ b/gcc/unwind-dw2.c
+@@ -329,9 +329,11 @@ _Unwind_GetTextRelBase (struct _Unwind_Context *context)
+ }
+ #endif
+ 
++#ifndef inhibit_libc
+ #ifdef MD_UNWIND_SUPPORT
+ #include MD_UNWIND_SUPPORT
+ #endif
++#endif
+ 
+ /* Extract any interesting information from the CIE for the translation
+    unit F belongs to.  Return a pointer to the byte after the augmentation,
diff --git a/4.7.0/gentoo/10_all_default-fortify-source.patch b/4.7.0/gentoo/10_all_default-fortify-source.patch
new file mode 100644
index 0000000..f0b3a03
--- /dev/null
+++ b/4.7.0/gentoo/10_all_default-fortify-source.patch
@@ -0,0 +1,28 @@
+Enable -D_FORTIFY_SOURCE=2 by default
+
+--- a/gcc/doc/invoke.texi
++++ b/gcc/doc/invoke.texi
+@@ -5973,6 +5973,11 @@ also turns on the following optimization flags:
+ Please note the warning under @option{-fgcse} about
+ invoking @option{-O2} on programs that use computed gotos.
+ 
++NOTE: In Gentoo, @option{-D_FORTIFY_SOURCE=2} is set by default, and is
++activated when @option{-O} is set to 2 or higher.  This enables additional
++compile-time and run-time checks for several libc functions.  To disable,
++specify either @option{-U_FORTIFY_SOURCE} or @option{-D_FORTIFY_SOURCE=0}.
++
+ @item -O3
+ @opindex O3
+ Optimize yet more.  @option{-O3} turns on all optimizations specified
+--- a/gcc/c-family/c-cppbuiltin.c
++++ b/gcc/c-family/c-cppbuiltin.c
+@@ -731,6 +731,9 @@ c_cpp_builtins (cpp_reader *pfile)
+   builtin_define_with_value ("__REGISTER_PREFIX__", REGISTER_PREFIX, 0);
+   builtin_define_with_value ("__USER_LABEL_PREFIX__", user_label_prefix, 0);
+ 
++  /* Fortify Source enabled by default */
++  builtin_define_with_int_value ("_FORTIFY_SOURCE", 2);
++
+   /* Misc.  */
+   if (flag_gnu89_inline)
+     cpp_define (pfile, "__GNUC_GNU_INLINE__");
diff --git a/4.7.0/gentoo/11_all_default-warn-format-security.patch b/4.7.0/gentoo/11_all_default-warn-format-security.patch
new file mode 100644
index 0000000..5dbab43
--- /dev/null
+++ b/4.7.0/gentoo/11_all_default-warn-format-security.patch
@@ -0,0 +1,49 @@
+Enable -Wformat and -Wformat-security by default.
+
+
+--- a/gcc/c-family/c-common.c
++++ b/gcc/c-family/c-common.c
+@@ -201,7 +201,7 @@ int warn_unknown_pragmas; /* Tri state variable.  */
+ /* Warn about format/argument anomalies in calls to formatted I/O functions
+    (*printf, *scanf, strftime, strfmon, etc.).  */
+ 
+-int warn_format;
++int warn_format = 1;
+ 
+ /* C/ObjC language option variables.  */
+ 
+--- a/gcc/c-family/c.opt
++++ b/gcc/c-family/c.opt
+@@ -384,7 +384,7 @@ C ObjC C++ ObjC++ Var(warn_format_contains_nul) Warning
+ Warn about format strings that contain NUL bytes
+ 
+ Wformat-security
+-C ObjC C++ ObjC++ Var(warn_format_security) Warning
++C ObjC C++ ObjC++ Var(warn_format_security) Init(1) Warning
+ Warn about possible security problems with format functions
+ 
+ Wformat-y2k
+--- a/gcc/doc/invoke.texi
++++ b/gcc/doc/invoke.texi
+@@ -3111,6 +3111,9 @@ aspects of format checking, the options @option{-Wformat-y2k},
+ @option{-Wformat-nonliteral}, @option{-Wformat-security}, and
+ @option{-Wformat=2} are available, but are not included in @option{-Wall}.
+ 
++In Gentoo this option is enabled by default for C, C++, ObjC, ObjC++.
++To disable, use @option{-Wformat=0}.
++
+ @item -Wformat-y2k
+ @opindex Wformat-y2k
+ @opindex Wno-format-y2k
+@@ -3164,6 +3167,11 @@ currently a subset of what @option{-Wformat-nonliteral} warns about, but
+ in future warnings may be added to @option{-Wformat-security} that are not
+ included in @option{-Wformat-nonliteral}.)
+ 
++In Gentoo this option is enabled by default for C, C++, ObjC, ObjC++.
++To disable, use @option{-Wno-format-security}, or disable all format warnings
++with @option{-Wformat=0}.  To make format security warnings fatal, specify
++@option{-Werror=format-security}.
++
+ @item -Wformat=2
+ @opindex Wformat=2
+ @opindex Wno-format=2
diff --git a/4.7.0/gentoo/12_all_default-warn-trampolines.patch b/4.7.0/gentoo/12_all_default-warn-trampolines.patch
new file mode 100644
index 0000000..4b26aec
--- /dev/null
+++ b/4.7.0/gentoo/12_all_default-warn-trampolines.patch
@@ -0,0 +1,24 @@
+Enable -Wtrampolines by default.
+
+--- a/gcc/common.opt
++++ b/gcc/common.opt
+@@ -639,7 +639,7 @@ Common Var(warn_system_headers) Warning
+ Do not suppress warnings from system headers
+ 
+ Wtrampolines
+-Common Var(warn_trampolines) Warning
++Common Var(warn_trampolines) Init(1) Warning
+ Warn whenever a trampoline is generated
+ 
+ Wtype-limits
+--- a/gcc/doc/invoke.texi
++++ b/gcc/doc/invoke.texi
+@@ -3878,6 +3878,8 @@ headers---for that, @option{-Wunknown-pragmas} must also be used.
+  for most targets, it is made up of code and thus requires the stack
+  to be made executable in order for the program to work properly.
+ 
++ This warning is enabled by default in Gentoo.
++
+ @item -Wfloat-equal
+ @opindex Wfloat-equal
+ @opindex Wno-float-equal
diff --git a/4.7.0/gentoo/15_all_libgomp-Werror.patch b/4.7.0/gentoo/15_all_libgomp-Werror.patch
new file mode 100644
index 0000000..3456e8a
--- /dev/null
+++ b/4.7.0/gentoo/15_all_libgomp-Werror.patch
@@ -0,0 +1,16 @@
+libgomp does not respect --disable-werror
+
+https://bugs.gentoo.org/229059
+http://gcc.gnu.org/PR38436
+
+--- a/libgomp/configure
++++ b/libgomp/configure
+@@ -4284,7 +4284,7 @@ save_CFLAGS="$CFLAGS"
+ 
+ # Add -Wall -Werror if we are using GCC.
+ if test "x$GCC" = "xyes"; then
+-  XCFLAGS="$XCFLAGS -Wall -Werror"
++  XCFLAGS="$XCFLAGS -Wall"
+ fi
+ 
+ # Find other programs we need.
diff --git a/4.7.0/gentoo/25_all_alpha-mieee-default.patch b/4.7.0/gentoo/25_all_alpha-mieee-default.patch
new file mode 100644
index 0000000..9f99434
--- /dev/null
+++ b/4.7.0/gentoo/25_all_alpha-mieee-default.patch
@@ -0,0 +1,31 @@
+Set the default behavior on alpha to use -mieee since the large majority of
+time we want this (bad/weird things can happen with packages built without
+it).
+
+To satisfy those people who may not want -mieee forced on them all the time,
+we also provide -mno-ieee.
+
+Patch by Mike Frysinger <vapier@gentoo.org>
+
+--- a/gcc/config/alpha/alpha.h
++++ b/gcc/config/alpha/alpha.h
+@@ -96,6 +96,8 @@ along with GCC; see the file COPYING3.  If not see
+   while (0)
+ #endif
+ 
++#define CPP_SPEC "%{!no-ieee:-mieee}"
++
+ /* Run-time compilation parameters selecting different hardware subsets.  */
+ 
+ /* Which processor to schedule for. The cpu attribute defines a list that
+--- a/gcc/config/alpha/alpha.opt
++++ b/gcc/config/alpha/alpha.opt
+@@ -39,7 +39,7 @@ Target RejectNegative Mask(IEEE_CONFORMANT)
+ Request IEEE-conformant math library routines (OSF/1)
+ 
+ mieee
+-Target Report RejectNegative Mask(IEEE)
++Target Report Mask(IEEE)
+ Emit IEEE-conformant code, without inexact exceptions
+ 
+ mieee-with-inexact
diff --git a/4.7.0/gentoo/26_all_alpha-asm-mcpu.patch b/4.7.0/gentoo/26_all_alpha-asm-mcpu.patch
new file mode 100644
index 0000000..593431c
--- /dev/null
+++ b/4.7.0/gentoo/26_all_alpha-asm-mcpu.patch
@@ -0,0 +1,16 @@
+https://bugs.gentoo.org/170146
+http://gcc.gnu.org/ml/gcc-patches/2009-11/msg00403.html
+
+alpha: turn -mcpu=<cpu> into -m<cpu> for assembler all the time
+
+--- a/gcc/config/alpha/elf.h
++++ b/gcc/config/alpha/elf.h
+@@ -46,7 +46,7 @@ along with GCC; see the file COPYING3.  If not see
+ #define CC1_SPEC  "%{G*}"
+ 
+ #undef  ASM_SPEC
+-#define ASM_SPEC  "%{G*} %{relax:-relax} %{!gstabs*:-no-mdebug}%{gstabs*:-mdebug}"
++#define ASM_SPEC  "%{G*} %{relax:-relax} %{!gstabs*:-no-mdebug}%{gstabs*:-mdebug} %{mcpu=*:-m%*}"
+ 
+ #undef  IDENT_ASM_OP
+ #define IDENT_ASM_OP "\t.ident\t"
diff --git a/4.7.0/gentoo/29_all_arm_armv4t-default.patch b/4.7.0/gentoo/29_all_arm_armv4t-default.patch
new file mode 100644
index 0000000..4616cf9
--- /dev/null
+++ b/4.7.0/gentoo/29_all_arm_armv4t-default.patch
@@ -0,0 +1,16 @@
+gcc defaults to armv5t for all targets even armv4t
+
+http://sourceware.org/ml/crossgcc/2008-05/msg00009.html
+
+
+--- a/gcc/config/arm/linux-eabi.h
++++ b/gcc/config/arm/linux-eabi.h
+@@ -45,7 +45,7 @@
+    The ARM10TDMI core is the default for armv5t, so set
+    SUBTARGET_CPU_DEFAULT to achieve this.  */
+ #undef  SUBTARGET_CPU_DEFAULT
+-#define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm10tdmi
++#define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm9tdmi
+ 
+ /* TARGET_BIG_ENDIAN_DEFAULT is set in
+    config.gcc for big endian configurations.  */
diff --git a/4.7.0/gentoo/33_all_armhf.patch b/4.7.0/gentoo/33_all_armhf.patch
new file mode 100644
index 0000000..492d689
--- /dev/null
+++ b/4.7.0/gentoo/33_all_armhf.patch
@@ -0,0 +1,43 @@
+use new common path to the arm hard float linker
+
+change taken from upstream gcc
+
+--- a/gcc/config/arm/linux-eabi.h
++++ b/gcc/config/arm/linux-eabi.h
+@@ -32,7 +32,8 @@
+   while (false)
+ 
+ /* We default to a soft-float ABI so that binaries can run on all
+-   target hardware.  */
++   target hardware.  If you override this to use the hard-float ABI then
++   change the setting of GLIBC_DYNAMIC_LINKER_DEFAULT as well.  */
+ #undef  TARGET_DEFAULT_FLOAT_ABI
+ #define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_SOFT
+ 
+@@ -59,10 +60,23 @@
+ #undef  SUBTARGET_EXTRA_LINK_SPEC
+ #define SUBTARGET_EXTRA_LINK_SPEC " -m " TARGET_LINKER_EMULATION
+ 
+-/* Use ld-linux.so.3 so that it will be possible to run "classic"
+-   GNU/Linux binaries on an EABI system.  */
++/* GNU/Linux on ARM currently supports three dynamic linkers:
++   - ld-linux.so.2 - for the legacy ABI
++   - ld-linux.so.3 - for the EABI-derived soft-float ABI
++   - ld-linux-armhf.so.3 - for the EABI-derived hard-float ABI.
++   All the dynamic linkers live in /lib.
++   We default to soft-float, but this can be overridden by changing both
++   GLIBC_DYNAMIC_LINKER_DEFAULT and TARGET_DEFAULT_FLOAT_ABI.  */
++
+ #undef  GLIBC_DYNAMIC_LINKER
+-#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.3"
++#define GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "/lib/ld-linux.so.3"
++#define GLIBC_DYNAMIC_LINKER_HARD_FLOAT "/lib/ld-linux-armhf.so.3"
++#define GLIBC_DYNAMIC_LINKER_DEFAULT GLIBC_DYNAMIC_LINKER_SOFT_FLOAT
++
++#define GLIBC_DYNAMIC_LINKER \
++   "%{mfloat-abi=hard:" GLIBC_DYNAMIC_LINKER_HARD_FLOAT "} \
++    %{mfloat-abi=soft*:" GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "} \
++    %{!mfloat-abi=*:" GLIBC_DYNAMIC_LINKER_DEFAULT "}"
+ 
+ /* At this point, bpabi.h will have clobbered LINK_SPEC.  We want to
+    use the GNU/Linux version, not the generic BPABI version.  */
diff --git a/4.7.0/gentoo/34_all_ia64_note.GNU-stack.patch b/4.7.0/gentoo/34_all_ia64_note.GNU-stack.patch
new file mode 100644
index 0000000..219fe9f
--- /dev/null
+++ b/4.7.0/gentoo/34_all_ia64_note.GNU-stack.patch
@@ -0,0 +1,92 @@
+http://gcc.gnu.org/PR21098
+
+
+2004-09-20  Jakub Jelinek  <jakub@redhat.com>
+
+        * config/rs6000/ppc-asm.h: Add .note.GNU-stack section also
+        on ppc64-linux.
+
+        * config/ia64/lib1funcs.asm: Add .note.GNU-stack section on
+        ia64-linux.
+        * config/ia64/crtbegin.asm: Likewise.
+        * config/ia64/crtend.asm: Likewise.
+        * config/ia64/crti.asm: Likewise.
+        * config/ia64/crtn.asm: Likewise.
+
+2004-05-14  Jakub Jelinek  <jakub@redhat.com>
+
+        * config/ia64/linux.h (TARGET_ASM_FILE_END): Define.
+
+
+--- a/gcc/config/ia64/linux.h
++++ b/gcc/config/ia64/linux.h
+@@ -24,6 +24,8 @@ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ <http://www.gnu.org/licenses/>.  */
+ 
++#define TARGET_ASM_FILE_END file_end_indicate_exec_stack
++
+ /* This is for -profile to use -lc_p instead of -lc.  */
+ #undef CC1_SPEC
+ #define CC1_SPEC "%{profile:-p} %{G*}"
+--- a/gcc/config/rs6000/ppc-asm.h
++++ b/gcc/config/rs6000/ppc-asm.h
+@@ -352,7 +352,7 @@ GLUE(.L,name): \
+ #endif
+ #endif
+ 
+-#if defined __linux__ && !defined __powerpc64__
++#if defined __linux__
+ 	.section .note.GNU-stack
+ 	.previous
+ #endif
+--- a/libgcc/config/ia64/crtbegin.S
++++ b/libgcc/config/ia64/crtbegin.S
+@@ -252,3 +252,7 @@ __do_jv_register_classes:
+ .weak __cxa_finalize
+ #endif
+ .weak _Jv_RegisterClasses
++
++#ifdef __linux__
++.section .note.GNU-stack; .previous
++#endif
+--- a/libgcc/config/ia64/crtend.S
++++ b/libgcc/config/ia64/crtend.S
+@@ -119,3 +119,6 @@ __do_global_ctors_aux:
+ 
+ 	br.ret.sptk.many rp
+ 	.endp __do_global_ctors_aux
++#ifdef __linux__
++.section .note.GNU-stack; .previous
++#endif
+--- a/libgcc/config/ia64/crti.S
++++ b/libgcc/config/ia64/crti.S
+@@ -49,5 +49,8 @@ _fini:
+ 	.save rp, r33
+ 	mov	r33 = b0
+ 	.body
++#ifdef __linux__
++.section .note.GNU-stack; .previous
++#endif
+ 
+ # end of crti.S
+--- a/libgcc/config/ia64/crtn.S
++++ b/libgcc/config/ia64/crtn.S
+@@ -39,5 +39,8 @@
+ 	.restore sp
+ 	mov	r12 = r35
+ 	br.ret.sptk.many b0
++#ifdef __linux__
++.section .note.GNU-stack; .previous
++#endif
+ 
+ # end of crtn.S
+--- a/libgcc/config/ia64/lib1funcs.S
++++ b/libgcc/config/ia64/lib1funcs.S
+@@ -793,3 +793,6 @@ __floattitf:
+ 	.endp __floattitf
+ #endif
+ #endif
++#ifdef __linux__
++.section .note.GNU-stack; .previous
++#endif
diff --git a/4.7.0/gentoo/38_all_sh_pr24836_all-archs.patch b/4.7.0/gentoo/38_all_sh_pr24836_all-archs.patch
new file mode 100644
index 0000000..06fd90a
--- /dev/null
+++ b/4.7.0/gentoo/38_all_sh_pr24836_all-archs.patch
@@ -0,0 +1,27 @@
+gcc/configure doesn't handle all possible SH architectures
+
+http://gcc.gnu.org/PR24836
+
+
+--- a/gcc/configure
++++ b/gcc/configure
+@@ -22753,7 +22753,7 @@ foo:	.long	25
+ 	tls_first_minor=14
+ 	tls_as_opt="-m64 -Aesame --fatal-warnings"
+ 	;;
+-  sh-*-* | sh[34]-*-*)
++  sh-*-* | sh[34]*-*-*)
+     conftest_s='
+ 	.section ".tdata","awT",@progbits
+ foo:	.long	25
+--- a/gcc/configure.ac
++++ b/gcc/configure.ac
+@@ -2924,7 +2924,7 @@ foo:	.long	25
+ 	tls_first_minor=14
+ 	tls_as_opt="-m64 -Aesame --fatal-warnings"
+ 	;;
+-  sh-*-* | sh[34]-*-*)
++  sh-*-* | sh[34]*-*-*)
+     conftest_s='
+ 	.section ".tdata","awT",@progbits
+ foo:	.long	25
diff --git a/4.7.0/gentoo/42_all_superh_default-multilib.patch b/4.7.0/gentoo/42_all_superh_default-multilib.patch
new file mode 100644
index 0000000..8b638d9
--- /dev/null
+++ b/4.7.0/gentoo/42_all_superh_default-multilib.patch
@@ -0,0 +1,24 @@
+The gcc-3.x toolchains would contain all the targets by default.  With gcc-4,
+you have to actually list out the multilibs you want or you will end up with
+just one when using targets like 'sh4-linux-gnu'.
+
+The resulting toolchain can't even build a kernel as the kernel needs to build
+with the nofpu flag to be sure that no fpu ops are generated.
+
+Here we restore the gcc-3.x behavior; the additional overhead of building all
+of these multilibs by default is negligible.
+
+https://bugs.gentoo.org/140205
+https://bugs.gentoo.org/320251
+
+--- a/gcc/config.gcc
++++ b/gcc/config.gcc
+@@ -2455,7 +2455,7 @@ sh-*-symbianelf* | sh[12346l]*-*-symbianelf* | \
+ 	if test "$sh_multilibs" = "default" ; then
+ 		case ${target} in
+ 		sh64-superh-linux* | \
+-		sh[1234]*)	sh_multilibs=${sh_cpu_target} ;;
++		sh[1234]*)	sh_multilibs=$(echo $(sed -n '/^[[:space:]]*case ${sh_multilib} in/,/)/{s:case ${sh_multilib} in::;s: | *:,:g;s:[\\)]::g;p}' ${srcdir}/config.gcc) | sed 's: ::g') ;;
+ 		sh64* | sh5*)	sh_multilibs=m5-32media,m5-32media-nofpu,m5-compact,m5-compact-nofpu,m5-64media,m5-64media-nofpu ;;
+ 		sh-superh-*)	sh_multilibs=m4,m4-single,m4-single-only,m4-nofpu ;;
+ 		sh*-*-linux*)	sh_multilibs=m1,m3e,m4 ;;
diff --git a/4.7.0/gentoo/50_all_libiberty-asprintf.patch b/4.7.0/gentoo/50_all_libiberty-asprintf.patch
new file mode 100644
index 0000000..9ad4a92
--- /dev/null
+++ b/4.7.0/gentoo/50_all_libiberty-asprintf.patch
@@ -0,0 +1,18 @@
+2008-07-25  Magnus Granberg  <zorry@ume.nu>
+
+    * include/libiberty.h (asprintf): Don't declare if defined as a macro
+
+--- a/include/libiberty.h
++++ b/include/libiberty.h
+@@ -609,8 +609,11 @@ extern int pwait (int, int *, int);
+ /* Like sprintf but provides a pointer to malloc'd storage, which must
+    be freed by the caller.  */
+ 
++/* asprintf may be declared as a macro by glibc with __USE_FORTIFY_LEVEL.  */
++#ifndef asprintf
+ extern int asprintf (char **, const char *, ...) ATTRIBUTE_PRINTF_2;
+ #endif
++#endif
+ 
+ #if !HAVE_DECL_VASPRINTF
+ /* Like vsprintf but provides a pointer to malloc'd storage, which
diff --git a/4.7.0/gentoo/51_all_libiberty-pic.patch b/4.7.0/gentoo/51_all_libiberty-pic.patch
new file mode 100644
index 0000000..b6160a7
--- /dev/null
+++ b/4.7.0/gentoo/51_all_libiberty-pic.patch
@@ -0,0 +1,10 @@
+--- a/libiberty/Makefile.in
++++ b/libiberty/Makefile.in
+@@ -246,6 +246,7 @@ $(TARGETLIB): $(REQUIRED_OFILES) $(EXTRA_OFILES) $(LIBOBJS)
+ 	  $(AR) $(AR_FLAGS) $(TARGETLIB) \
+ 	    $(REQUIRED_OFILES) $(EXTRA_OFILES) $(LIBOBJS); \
+ 	  $(RANLIB) $(TARGETLIB); \
++	  cp $(TARGETLIB) ../ ; \
+ 	  cd ..; \
+ 	else true; fi
+ 
diff --git a/4.7.0/gentoo/52_all_netbsd-Bsymbolic.patch b/4.7.0/gentoo/52_all_netbsd-Bsymbolic.patch
new file mode 100644
index 0000000..4db281e
--- /dev/null
+++ b/4.7.0/gentoo/52_all_netbsd-Bsymbolic.patch
@@ -0,0 +1,12 @@
+https://bugs.gentoo.org/122698
+
+--- a/gcc/config/netbsd-elf.h
++++ b/gcc/config/netbsd-elf.h
+@@ -70,6 +70,7 @@ along with GCC; see the file COPYING3.  If not see
+ #define NETBSD_LINK_SPEC_ELF \
+   "%{assert*} %{R*} %{rpath*} \
+    %{shared:-shared} \
++   %{symbolic:-Bsymbolic} \
+    %{!shared: \
+      -dc -dp \
+      %{!nostdlib: \
diff --git a/4.7.0/gentoo/64_all_gcc-hppa-64bit-pr52408.patch b/4.7.0/gentoo/64_all_gcc-hppa-64bit-pr52408.patch
new file mode 100644
index 0000000..01493ff
--- /dev/null
+++ b/4.7.0/gentoo/64_all_gcc-hppa-64bit-pr52408.patch
@@ -0,0 +1,118 @@
+http://gcc.gnu.org/PR52408
+https://bugs.gentoo.org/382075
+
+From 1cd2ad1b2da194ce96e432085dd8892735160daa Mon Sep 17 00:00:00 2001
+From: danglin <danglin@138bc75d-0d04-0410-961f-82ee72b054a4>
+Date: Sun, 4 Mar 2012 16:23:26 +0000
+Subject: [PATCH] 	Backport from mainline 	2012-03-01  John David
+ Anglin  <dave.anglin@nrc-cnrc.gc.ca>
+
+	PR target/52408
+	* config/pa/pa.md (zvdep_imm32): Change type of variable x from int to
+	unsigned HOST_WIDE_INT.
+	(zvdep_imm64): Likewise.
+	(vdepi_ior): Change type of variable x from int to HOST_WIDE_INT.
+	(vdepi_and): Likewise.
+	Likewise for unamed 64-bit patterns.
+	* config/pa/predicates.md (lhs_lshift_cint_operand): Update comment.
+
+
+
+git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_6-branch@184888 138bc75d-0d04-0410-961f-82ee72b054a4
+---
+ gcc/ChangeLog               |   14 ++++++++++++++
+ gcc/config/pa/pa.md         |   12 ++++++------
+ gcc/config/pa/predicates.md |    6 +++---
+ 3 files changed, 23 insertions(+), 9 deletions(-)
+
+2012-03-04  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
+
+	Backport from mainline
+	2012-03-01  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
+
+	PR target/52408
+	* config/pa/pa.md (zvdep_imm32): Change type of variable x from int to
+	unsigned HOST_WIDE_INT.
+	(zvdep_imm64): Likewise.
+	(vdepi_ior): Change type of variable x from int to HOST_WIDE_INT.
+	(vdepi_and): Likewise.
+	Likewise for unamed 64-bit patterns.
+	* config/pa/predicates.md (lhs_lshift_cint_operand): Update comment.
+
+diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md
+index 1bd9f0b..c91e057 100644
+--- a/gcc/config/pa/pa.md
++++ b/gcc/config/pa/pa.md
+@@ -6348,7 +6348,7 @@
+   ""
+   "*
+ {
+-  int x = INTVAL (operands[1]);
++  unsigned HOST_WIDE_INT x = UINTVAL (operands[1]);
+   operands[2] = GEN_INT (4 + exact_log2 ((x >> 4) + 1));
+   operands[1] = GEN_INT ((x & 0xf) - 0x10);
+   return \"{zvdepi %1,%2,%0|depwi,z %1,%%sar,%2,%0}\";
+@@ -6366,7 +6366,7 @@
+   "exact_log2 (INTVAL (operands[1]) + 1) > 0"
+   "*
+ {
+-  int x = INTVAL (operands[1]);
++  HOST_WIDE_INT x = INTVAL (operands[1]);
+   operands[2] = GEN_INT (exact_log2 (x + 1));
+   return \"{vdepi -1,%2,%0|depwi -1,%%sar,%2,%0}\";
+ }"
+@@ -6383,7 +6383,7 @@
+   "INTVAL (operands[1]) == -2"
+   "*
+ {
+-  int x = INTVAL (operands[1]);
++  HOST_WIDE_INT x = INTVAL (operands[1]);
+   operands[2] = GEN_INT (exact_log2 ((~x) + 1));
+   return \"{vdepi 0,%2,%0|depwi 0,%%sar,%2,%0}\";
+ }"
+@@ -6447,7 +6447,7 @@
+   "TARGET_64BIT"
+   "*
+ {
+-  int x = INTVAL (operands[1]);
++  unsigned HOST_WIDE_INT x = UINTVAL (operands[1]);
+   operands[2] = GEN_INT (4 + exact_log2 ((x >> 4) + 1));
+   operands[1] = GEN_INT ((x & 0x1f) - 0x20);
+   return \"depdi,z %1,%%sar,%2,%0\";
+@@ -6465,7 +6465,7 @@
+   "TARGET_64BIT && exact_log2 (INTVAL (operands[1]) + 1) > 0"
+   "*
+ {
+-  int x = INTVAL (operands[1]);
++  HOST_WIDE_INT x = INTVAL (operands[1]);
+   operands[2] = GEN_INT (exact_log2 (x + 1));
+   return \"depdi -1,%%sar,%2,%0\";
+ }"
+@@ -6482,7 +6482,7 @@
+   "TARGET_64BIT && INTVAL (operands[1]) == -2"
+   "*
+ {
+-  int x = INTVAL (operands[1]);
++  HOST_WIDE_INT x = INTVAL (operands[1]);
+   operands[2] = GEN_INT (exact_log2 ((~x) + 1));
+   return \"depdi 0,%%sar,%2,%0\";
+ }"
+diff --git a/gcc/config/pa/predicates.md b/gcc/config/pa/predicates.md
+index ea41169..ff5dc17 100644
+--- a/gcc/config/pa/predicates.md
++++ b/gcc/config/pa/predicates.md
+@@ -421,9 +421,9 @@
+   (ior (match_operand 0 "register_operand")
+        (match_operand 0 "cint_ior_operand")))
+ 
+-;; True iff OP is a CONST_INT of the forms 0...0xxxx or
+-;; 0...01...1xxxx. Such values can be the left hand side x in (x <<
+-;; r), using the zvdepi instruction.
++;; True iff OP is a CONST_INT of the forms 0...0xxxx, 0...01...1xxxx,
++;; or 1...1xxxx. Such values can be the left hand side x in (x << r),
++;; using the zvdepi instruction.
+ 
+ (define_predicate "lhs_lshift_cint_operand"
+   (match_code "const_int")
+-- 
+1.7.9.7
diff --git a/4.7.0/gentoo/74_all_gcc46_cloog-dl.patch b/4.7.0/gentoo/74_all_gcc46_cloog-dl.patch
new file mode 100644
index 0000000..36c40df
--- /dev/null
+++ b/4.7.0/gentoo/74_all_gcc46_cloog-dl.patch
@@ -0,0 +1,520 @@
+When graphite support is enabled several extra libraries (libppl, libcloog,
+libgmpxx, libstdc++-v3) get linked into cc1.  When these libs bump their soname we get
+a completely broken compiler.
+
+Instead, dlopen libcloog as necessary.  This patch originated in Fedora and
+was modified to work on FreeBSD (http://bugs.gentoo.org/317211).
+
+2011-01-04  Jakub Jelinek  <jakub@redhat.com>
+
+         * Makefile.in (BACKENDLIBS): Link against -ldl instead of
+         -lcloog -lppl.
+         (graphite.o, graphite%.o): Force -O, remove -fkeep-inline-functions.
+         (GRAPHITE_CLOOG_UTIL_H, GRAPHITE_POLY_H): New.
+         (graphite*.o): Adjust dependencies.
+         * graphite-cloog-compat.h: Include <dlfcn.h>.  Reference libcloog and
+         libppl symbols through pointers in cloog_pointers__ variable.
+         * graphite.c (init_cloog_pointers): New function.
+         (graphite_transform_loops): Call init_cloog_pointers.
+         * graphite-clast-to-gimple.c (gcc_type_for_iv_of_clast_loop): Rename
+         stmt_for argument to stmt_fora.
+         * graphite-poly.h: Include graphite-cloog-util.h.
+
+2011-04-02  Ryan Hill  <dirtyepic@gentoo.org>
+
+        * configure.ac (DL_LIB): Check how to dlopen.
+        * configure: Regenerate.
+        * Makefile.in (BACKENDLIBS): Use DL_LIB.
+        * graphite-cloog-compat.h: Add missing symbols.
+
+
+--- a/gcc/Makefile.in
++++ b/gcc/Makefile.in
+@@ -984,6 +984,8 @@ GCC_PLUGIN_H = gcc-plugin.h highlev-plugin-common.h $(CONFIG_H) $(SYSTEM_H) \
+ PLUGIN_H = plugin.h $(GCC_PLUGIN_H)
+ PLUGIN_VERSION_H = plugin-version.h configargs.h
+ LIBFUNCS_H = libfuncs.h $(HASHTAB_H)
++GRAPHITE_CLOOG_UTIL_H = graphite-cloog-util.h graphite-cloog-compat.h
++GRAPHITE_POLY_H = graphite-poly.h $(GRAPHITE_CLOOG_UTIL_H)
+ 
+ #
+ # Now figure out from those variables how to compile and link.
+@@ -1037,7 +1039,7 @@ BUILD_LIBDEPS= $(BUILD_LIBIBERTY)
+ # and the system's installed libraries.
+ LIBS = @LIBS@ $(CPPLIB) $(LIBINTL) $(LIBICONV) $(LIBIBERTY) $(LIBDECNUMBER) \
+ 	$(HOST_LIBS)
+-BACKENDLIBS = $(CLOOGLIBS) $(PPLLIBS) $(GMPLIBS) $(PLUGINLIBS) $(HOST_LIBS) \
++BACKENDLIBS = $(GMPLIBS) $(if $(CLOOGLIBS),@DL_LIB@) $(PLUGINLIBS) $(HOST_LIBS) \
+ 	$(ZLIB)
+ # Any system libraries needed just for GNAT.
+ SYSLIBS = @GNAT_LIBEXC@
+@@ -2668,40 +2670,40 @@ sese.o : sese.c sese.h $(CONFIG_H) $(SYSTEM_H) coretypes.h tree-pretty-print.h \
+    $(TREE_FLOW_H) $(CFGLOOP_H) $(TREE_DATA_REF_H) tree-pass.h value-prof.h
+ graphite.o : graphite.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(DIAGNOSTIC_CORE_H) \
+    $(TREE_FLOW_H) $(TREE_DUMP_H) $(CFGLOOP_H) $(TREE_DATA_REF_H) sese.h \
+-   $(DBGCNT_H) graphite-ppl.h graphite-poly.h graphite-scop-detection.h \
++   $(DBGCNT_H) graphite-ppl.h $(GRAPHITE_POLY_H) graphite-scop-detection.h \
+    graphite-clast-to-gimple.h graphite-sese-to-poly.h
+ graphite-blocking.o : graphite-blocking.c $(CONFIG_H) $(SYSTEM_H) \
+    coretypes.h $(TREE_FLOW_H) $(TREE_DUMP_H) $(CFGLOOP_H) $(TREE_DATA_REF_H) \
+-   sese.h graphite-ppl.h graphite-poly.h
++   sese.h graphite-ppl.h $(GRAPHITE_POLY_H)
+ graphite-clast-to-gimple.o : graphite-clast-to-gimple.c $(CONFIG_H) \
+    $(SYSTEM_H) coretypes.h $(DIAGNOSTIC_CORE_H) $(TREE_FLOW_H) $(TREE_DUMP_H) \
+-   $(CFGLOOP_H) $(TREE_DATA_REF_H) sese.h graphite-cloog-util.h \
+-   graphite-ppl.h graphite-poly.h graphite-clast-to-gimple.h \
++   $(CFGLOOP_H) $(TREE_DATA_REF_H) sese.h $(GRAPHITE_CLOOG_UTIL_H) \
++   graphite-ppl.h $(GRAPHITE_POLY_H) graphite-clast-to-gimple.h \
+    graphite-dependences.h graphite-cloog-compat.h
+ graphite-cloog-util.o : graphite-cloog-util.c $(CONFIG_H) $(SYSTEM_H) \
+-   coretypes.h graphite-cloog-util.h graphite-cloog-compat.h
++   coretypes.h $(GRAPHITE_CLOOG_UTIL_H) graphite-cloog-compat.h
+ graphite-dependences.o : graphite-dependences.c $(CONFIG_H) $(SYSTEM_H) \
+    coretypes.h $(TREE_FLOW_H) $(TREE_DUMP_H) $(CFGLOOP_H) $(TREE_DATA_REF_H) \
+-   sese.h graphite-ppl.h graphite-poly.h graphite-dependences.h \
+-   graphite-cloog-util.h
++   sese.h graphite-ppl.h $(GRAPHITE_POLY_H) graphite-dependences.h \
++   $(GRAPHITE_CLOOG_UTIL_H)
+ graphite-flattening.o : graphite-flattening.c $(CONFIG_H) $(SYSTEM_H)	\
+    coretypes.h $(TREE_FLOW_H) $(TREE_DUMP_H) $(CFGLOOP_H) $(TREE_DATA_REF_H) \
+-   sese.h graphite-ppl.h graphite-poly.h
++   sese.h graphite-ppl.h $(GRAPHITE_POLY_H)
+ graphite-interchange.o : graphite-interchange.c $(CONFIG_H) $(SYSTEM_H) \
+    coretypes.h $(TREE_FLOW_H) $(TREE_DUMP_H) $(CFGLOOP_H) $(TREE_DATA_REF_H) \
+-   sese.h graphite-ppl.h graphite-poly.h
++   sese.h graphite-ppl.h $(GRAPHITE_POLY_H)
+ graphite-poly.o : graphite-poly.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \
+    $(DIAGNOSTIC_CORE_H) $(TREE_FLOW_H) $(TREE_DUMP_H) gimple-pretty-print.h \
+-   $(CFGLOOP_H) $(TREE_DATA_REF_H) sese.h graphite-ppl.h graphite-poly.h \
+-   graphite-dependences.h graphite-cloog-util.h
++   $(CFGLOOP_H) $(TREE_DATA_REF_H) sese.h graphite-ppl.h $(GRAPHITE_POLY_H) \
++   graphite-dependences.h $(GRAPHITE_CLOOG_UTIL_H)
+ graphite-ppl.o : graphite-ppl.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \
+-   graphite-cloog-util.h graphite-ppl.h
++   $(GRAPHITE_CLOOG_UTIL_H) graphite-ppl.h
+ graphite-scop-detection.o : graphite-scop-detection.c $(CONFIG_H) $(SYSTEM_H) \
+    coretypes.h $(TREE_FLOW_H) $(CFGLOOP_H) $(TREE_DATA_REF_H) $(TREE_PASS_H) \
+-   sese.h graphite-ppl.h graphite-poly.h graphite-scop-detection.h
++   sese.h graphite-ppl.h $(GRAPHITE_POLY_H) graphite-scop-detection.h
+ graphite-sese-to-poly.o : graphite-sese-to-poly.c $(CONFIG_H) \
+    $(SYSTEM_H) coretypes.h $(TREE_FLOW_H) $(TREE_DUMP_H) $(CFGLOOP_H) \
+-   $(TREE_DATA_REF_H) domwalk.h sese.h graphite-ppl.h graphite-poly.h \
++   $(TREE_DATA_REF_H) domwalk.h sese.h graphite-ppl.h $(GRAPHITE_POLY_H) \
+    graphite-sese-to-poly.h
+ tree-vect-loop.o: tree-vect-loop.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \
+    $(TM_H) $(GGC_H) $(TREE_H) $(BASIC_BLOCK_H) $(DIAGNOSTIC_H) $(TREE_FLOW_H) \
+@@ -3483,6 +3485,11 @@ $(out_object_file): $(out_file) $(CONFIG_H) coretypes.h $(TM_H) $(TREE_H) \
+ 	$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) \
+ 		$(out_file) $(OUTPUT_OPTION)
+ 
++graphite%.o : \
++  ALL_CFLAGS := -O $(filter-out -fkeep-inline-functions, $(ALL_CFLAGS))
++graphite.o : \
++  ALL_CFLAGS := -O $(filter-out -fkeep-inline-functions, $(ALL_CFLAGS))
++
+ # Build auxiliary files that support ecoff format.
+ mips-tfile: mips-tfile.o version.o $(LIBDEPS)
+ 	$(LINKER) $(LINKERFLAGS) $(LDFLAGS) -o $@ \
+--- a/gcc/configure
++++ b/gcc/configure
+@@ -602,6 +602,7 @@ ac_subst_vars='LTLIBOBJS
+ LIBOBJS
+ enable_plugin
+ pluginlibs
++DL_LIB
+ CLOOGINC
+ CLOOGLIBS
+ PPLINC
+@@ -4842,7 +4843,7 @@ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $acx_cv_cc_gcc_supports_ada" >&5
+ $as_echo "$acx_cv_cc_gcc_supports_ada" >&6; }
+ 
+-if test x$GNATBIND != xno && test x$GNATMAKE != xno && test x$acx_cv_cc_gcc_supports_ada != xno; then
++if test "x$GNATBIND" != xno && test "x$GNATMAKE" != xno && test x$acx_cv_cc_gcc_supports_ada != xno; then
+   have_gnat=yes
+ else
+   have_gnat=no
+@@ -26282,6 +26283,7 @@ $as_echo "unable to check" >&6; }
+   fi
+ 
+   # Check -ldl
++  DL_LIB=
+   saved_LIBS="$LIBS"
+   { $as_echo "$as_me:${as_lineno-$LINENO}: checking for library containing dlopen" >&5
+ $as_echo_n "checking for library containing dlopen... " >&6; }
+@@ -26341,7 +26343,9 @@ fi
+ 
+   if test x"$ac_cv_search_dlopen" = x"-ldl"; then
+     pluginlibs="$pluginlibs -ldl"
++	DL_LIB=$ac_cv_search_dlopen
+   fi
++
+   LIBS="$saved_LIBS"
+ 
+   # Check that we can build shared objects with -fPIC -shared
+--- a/gcc/configure.ac
++++ b/gcc/configure.ac
+@@ -4839,11 +4839,14 @@ if test x"$enable_plugin" = x"yes"; then
+   fi
+ 
+   # Check -ldl
++  DL_LIB=
+   saved_LIBS="$LIBS"
+   AC_SEARCH_LIBS([dlopen], [dl])
+   if test x"$ac_cv_search_dlopen" = x"-ldl"; then
+     pluginlibs="$pluginlibs -ldl"
++	DL_LIB=$ac_cv_search_dlopen
+   fi
++  AC_SUBST(DL_LIB)
+   LIBS="$saved_LIBS"
+ 
+   # Check that we can build shared objects with -fPIC -shared
+--- a/gcc/graphite-clast-to-gimple.c
++++ b/gcc/graphite-clast-to-gimple.c
+@@ -738,10 +738,10 @@ clast_get_body_of_loop (struct clast_stmt *stmt)
+    from STMT_FOR.  */
+ 
+ static tree
+-gcc_type_for_iv_of_clast_loop (struct clast_for *stmt_for, int level,
++gcc_type_for_iv_of_clast_loop (struct clast_for *stmt_fora, int level,
+ 			       tree lb_type, tree ub_type)
+ {
+-  struct clast_stmt *stmt = (struct clast_stmt *) stmt_for;
++  struct clast_stmt *stmt = (struct clast_stmt *) stmt_fora;
+   struct clast_user_stmt *body = clast_get_body_of_loop (stmt);
+   CloogStatement *cs = body->statement;
+   poly_bb_p pbb = (poly_bb_p) cloog_statement_usr (cs);
+--- a/gcc/graphite-cloog-compat.h
++++ b/gcc/graphite-cloog-compat.h
+@@ -272,4 +272,269 @@ static inline int cloog_matrix_nrows (CloogMatrix * m)
+    return m->NbRows;
+ }
+ #endif /* CLOOG_ORG  */
++
++#include <dlfcn.h>
++#define DYNSYMS \
++  DYNSYM (cloog_block_alloc); \
++  DYNSYM (cloog_block_list_free); \
++  DYNSYM (cloog_block_list_malloc); \
++  DYNSYM (cloog_clast_create); \
++  DYNSYM (cloog_clast_free); \
++  DYNSYM (cloog_domain_free); \
++  DYNSYM (cloog_domain_matrix2domain); \
++  DYNSYM (cloog_initialize); \
++  DYNSYM (cloog_loop_malloc); \
++  DYNSYM (cloog_matrix_alloc); \
++  DYNSYM (cloog_matrix_copy); \
++  DYNSYM (cloog_matrix_free); \
++  DYNSYM (cloog_matrix_print); \
++  DYNSYM (cloog_names_malloc); \
++  DYNSYM (cloog_names_scalarize); \
++  DYNSYM (cloog_options_free); \
++  DYNSYM (cloog_options_malloc); \
++  DYNSYM (cloog_program_dump_cloog); \
++  DYNSYM (cloog_program_extract_scalars); \
++  DYNSYM (cloog_program_free); \
++  DYNSYM (cloog_program_generate); \
++  DYNSYM (cloog_program_malloc); \
++  DYNSYM (cloog_program_print); \
++  DYNSYM (cloog_program_scatter); \
++  DYNSYM (cloog_statement_alloc); \
++  DYNSYM (cloog_domain_union); \
++  DYNSYM (cloog_matrix_read); \
++  DYNSYM (cloog_new_pol); \
++  DYNSYM (cloog_vector_gcd); \
++  DYNSYM (ppl_finalize); \
++  DYNSYM (ppl_assign_Coefficient_from_mpz_t); \
++  DYNSYM (ppl_assign_Linear_Expression_from_Linear_Expression); \
++  DYNSYM (ppl_Coefficient_to_mpz_t); \
++  DYNSYM (ppl_Constraint_coefficient); \
++  DYNSYM (ppl_Constraint_inhomogeneous_term); \
++  DYNSYM (ppl_Constraint_space_dimension); \
++  DYNSYM (ppl_Constraint_System_begin); \
++  DYNSYM (ppl_Constraint_System_const_iterator_dereference); \
++  DYNSYM (ppl_Constraint_System_const_iterator_equal_test); \
++  DYNSYM (ppl_Constraint_System_const_iterator_increment); \
++  DYNSYM (ppl_Constraint_System_end); \
++  DYNSYM (ppl_Constraint_System_insert_Constraint); \
++  DYNSYM (ppl_Constraint_System_space_dimension); \
++  DYNSYM (ppl_Constraint_type); \
++  DYNSYM (ppl_delete_Coefficient); \
++  DYNSYM (ppl_delete_Constraint); \
++  DYNSYM (ppl_delete_Constraint_System_const_iterator); \
++  DYNSYM (ppl_delete_Linear_Expression); \
++  DYNSYM (ppl_delete_Pointset_Powerset_C_Polyhedron); \
++  DYNSYM (ppl_delete_Pointset_Powerset_C_Polyhedron_iterator); \
++  DYNSYM (ppl_delete_Polyhedron); \
++  DYNSYM (ppl_Linear_Expression_add_to_coefficient); \
++  DYNSYM (ppl_Linear_Expression_add_to_inhomogeneous); \
++  DYNSYM (ppl_Linear_Expression_coefficient); \
++  DYNSYM (ppl_Linear_Expression_inhomogeneous_term); \
++  DYNSYM (ppl_Linear_Expression_space_dimension); \
++  DYNSYM (ppl_new_Coefficient); \
++  DYNSYM (ppl_new_Coefficient_from_mpz_t); \
++  DYNSYM (ppl_new_Constraint); \
++  DYNSYM (ppl_new_Constraint_System); \
++  DYNSYM (ppl_new_Constraint_System_const_iterator); \
++  DYNSYM (ppl_new_C_Polyhedron_from_C_Polyhedron); \
++  DYNSYM (ppl_new_C_Polyhedron_from_space_dimension); \
++  DYNSYM (ppl_new_C_Polyhedron_recycle_Constraint_System); \
++  DYNSYM (ppl_new_Linear_Expression); \
++  DYNSYM (ppl_new_Linear_Expression_from_Constraint); \
++  DYNSYM (ppl_new_Linear_Expression_from_Linear_Expression); \
++  DYNSYM (ppl_new_Linear_Expression_with_dimension); \
++  DYNSYM (ppl_new_Pointset_Powerset_C_Polyhedron_from_C_Polyhedron); \
++  DYNSYM (ppl_new_Pointset_Powerset_C_Polyhedron_from_Pointset_Powerset_C_Polyhedron); \
++  DYNSYM (ppl_new_Pointset_Powerset_C_Polyhedron_from_space_dimension); \
++  DYNSYM (ppl_new_Pointset_Powerset_C_Polyhedron_iterator); \
++  DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_add_constraint); \
++  DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_add_space_dimensions_and_embed); \
++  DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_difference_assign); \
++  DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_intersection_assign); \
++  DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_is_empty); \
++  DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_iterator_begin); \
++  DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_iterator_dereference); \
++  DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_iterator_end); \
++  DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_iterator_equal_test); \
++  DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_iterator_increment); \
++  DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_map_space_dimensions); \
++  DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_maximize); \
++  DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_minimize); \
++  DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_remove_space_dimensions); \
++  DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_size); \
++  DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_space_dimension); \
++  DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_upper_bound_assign); \
++  DYNSYM (ppl_Polyhedron_add_constraint); \
++  DYNSYM (ppl_Polyhedron_add_constraints); \
++  DYNSYM (ppl_Polyhedron_add_space_dimensions_and_embed); \
++  DYNSYM (ppl_Polyhedron_get_constraints); \
++  DYNSYM (ppl_Polyhedron_map_space_dimensions); \
++  DYNSYM (ppl_Polyhedron_remove_space_dimensions); \
++  DYNSYM (ppl_Polyhedron_space_dimension); \
++  DYNSYM (ppl_subtract_Linear_Expression_from_Linear_Expression); \
++  DYNSYM (pprint); \
++  DYNSYM (stmt_block); \
++  DYNSYM (stmt_for); \
++  DYNSYM (stmt_guard); \
++  DYNSYM (stmt_root); \
++  DYNSYM (stmt_user); \
++  DYNSYM (ppl_delete_Constraint_System); \
++  DYNSYM (ppl_initialize); \
++  DYNSYM (ppl_new_Constraint_System_from_Constraint); \
++  DYNSYM (ppl_new_C_Polyhedron_from_Constraint_System); \
++  DYNSYM (ppl_Polyhedron_affine_image); \
++  DYNSYM (ppl_io_fprint_Pointset_Powerset_C_Polyhedron); \
++  DYNSYM (ppl_new_PIP_Problem_from_constraints); \
++  DYNSYM (ppl_PIP_Problem_is_satisfiable); \
++  DYNSYM (ppl_delete_PIP_Problem);
++extern struct
++{
++  bool inited;
++  void *h;
++#define DYNSYM(x) __typeof (x) *p_##x
++  DYNSYMS
++#undef DYNSYM
++} cloog_pointers__;
++
++#define cloog_block_alloc (*cloog_pointers__.p_cloog_block_alloc)
++#define cloog_block_list_free (*cloog_pointers__.p_cloog_block_list_free)
++#define cloog_block_list_malloc (*cloog_pointers__.p_cloog_block_list_malloc)
++#define cloog_clast_create (*cloog_pointers__.p_cloog_clast_create)
++#define cloog_clast_free (*cloog_pointers__.p_cloog_clast_free)
++#define cloog_domain_free (*cloog_pointers__.p_cloog_domain_free)
++#define cloog_domain_matrix2domain (*cloog_pointers__.p_cloog_domain_matrix2domain)
++#define cloog_initialize (*cloog_pointers__.p_cloog_initialize)
++#ifndef CLOOG_ORG
++#undef cloog_loop_malloc
++#define cloog_loop_malloc(STATE) (*cloog_pointers__.p_cloog_loop_malloc) ()
++#else
++#define cloog_loop_malloc (*cloog_pointers__.p_cloog_loop_malloc)
++#endif
++#define cloog_matrix_alloc (*cloog_pointers__.p_cloog_matrix_alloc)
++#define cloog_matrix_copy (*cloog_pointers__.p_cloog_matrix_copy)
++#define cloog_matrix_free (*cloog_pointers__.p_cloog_matrix_free)
++#define cloog_matrix_print (*cloog_pointers__.p_cloog_matrix_print)
++#define cloog_names_malloc (*cloog_pointers__.p_cloog_names_malloc)
++#define cloog_names_scalarize (*cloog_pointers__.p_cloog_names_scalarize)
++#define cloog_options_free (*cloog_pointers__.p_cloog_options_free)
++#ifndef CLOOG_ORG
++#undef cloog_options_malloc
++#define cloog_options_malloc(STATE) (*cloog_pointers__.p_cloog_options_malloc) ()
++#undef cloog_program_dump_cloog
++#define cloog_program_dump_cloog(DUMPFILE, PROGRAM, SCATTERINGLIST) \
++  (*cloog_pointers__.p_cloog_program_dump_cloog) (DUMPFILE, PROGRAM)
++#undef cloog_program_extract_scalars
++#define cloog_program_extract_scalars(PROG, SCATT, OPT) \
++  (*cloog_pointers__.p_cloog_program_extract_scalars) (PROG, SCATT)
++#else
++#define cloog_options_malloc (*cloog_pointers__.p_cloog_options_malloc)
++#define cloog_program_dump_cloog (*cloog_pointers__.p_cloog_program_dump_cloog)
++#define cloog_program_extract_scalars (*cloog_pointers__.p_cloog_program_extract_scalars)
++#endif
++#define cloog_program_free (*cloog_pointers__.p_cloog_program_free)
++#define cloog_program_generate (*cloog_pointers__.p_cloog_program_generate)
++#define cloog_program_malloc (*cloog_pointers__.p_cloog_program_malloc)
++#define cloog_program_print (*cloog_pointers__.p_cloog_program_print)
++#ifndef CLOOG_ORG
++#undef cloog_program_scatter
++#define cloog_program_scatter(PROG, SCATT, OPT) \
++  (*cloog_pointers__.p_cloog_program_scatter) (PROG, SCATT)
++#undef cloog_statement_alloc
++#define cloog_statement_alloc(STATE, INDEX) \
++  (*cloog_pointers__.p_cloog_statement_alloc) (INDEX)
++#else
++#define cloog_program_scatter (*cloog_pointers__.p_cloog_program_scatter)
++#define cloog_statement_alloc (*cloog_pointers__.p_cloog_statement_alloc)
++#endif
++#define cloog_domain_union (*cloog_pointers__.p_cloog_domain_union)
++#define cloog_matrix_read (*cloog_pointers__.p_cloog_matrix_read)
++#define cloog_new_pol (*cloog_pointers__.p_cloog_new_pol)
++#define cloog_vector_gcd (*cloog_pointers__.p_cloog_vector_gcd)
++#define ppl_finalize (*cloog_pointers__.p_ppl_finalize)
++#define ppl_assign_Coefficient_from_mpz_t (*cloog_pointers__.p_ppl_assign_Coefficient_from_mpz_t)
++#define ppl_assign_Linear_Expression_from_Linear_Expression (*cloog_pointers__.p_ppl_assign_Linear_Expression_from_Linear_Expression)
++#define ppl_Coefficient_to_mpz_t (*cloog_pointers__.p_ppl_Coefficient_to_mpz_t)
++#define ppl_Constraint_coefficient (*cloog_pointers__.p_ppl_Constraint_coefficient)
++#define ppl_Constraint_inhomogeneous_term (*cloog_pointers__.p_ppl_Constraint_inhomogeneous_term)
++#define ppl_Constraint_space_dimension (*cloog_pointers__.p_ppl_Constraint_space_dimension)
++#define ppl_Constraint_System_begin (*cloog_pointers__.p_ppl_Constraint_System_begin)
++#define ppl_Constraint_System_const_iterator_dereference (*cloog_pointers__.p_ppl_Constraint_System_const_iterator_dereference)
++#define ppl_Constraint_System_const_iterator_equal_test (*cloog_pointers__.p_ppl_Constraint_System_const_iterator_equal_test)
++#define ppl_Constraint_System_const_iterator_increment (*cloog_pointers__.p_ppl_Constraint_System_const_iterator_increment)
++#define ppl_Constraint_System_end (*cloog_pointers__.p_ppl_Constraint_System_end)
++#define ppl_Constraint_System_insert_Constraint (*cloog_pointers__.p_ppl_Constraint_System_insert_Constraint)
++#define ppl_Constraint_System_space_dimension (*cloog_pointers__.p_ppl_Constraint_System_space_dimension)
++#define ppl_Constraint_type (*cloog_pointers__.p_ppl_Constraint_type)
++#define ppl_delete_Coefficient (*cloog_pointers__.p_ppl_delete_Coefficient)
++#define ppl_delete_Constraint (*cloog_pointers__.p_ppl_delete_Constraint)
++#define ppl_delete_Constraint_System_const_iterator (*cloog_pointers__.p_ppl_delete_Constraint_System_const_iterator)
++#define ppl_delete_Linear_Expression (*cloog_pointers__.p_ppl_delete_Linear_Expression)
++#define ppl_delete_Pointset_Powerset_C_Polyhedron (*cloog_pointers__.p_ppl_delete_Pointset_Powerset_C_Polyhedron)
++#define ppl_delete_Pointset_Powerset_C_Polyhedron_iterator (*cloog_pointers__.p_ppl_delete_Pointset_Powerset_C_Polyhedron_iterator)
++#define ppl_delete_Polyhedron (*cloog_pointers__.p_ppl_delete_Polyhedron)
++#define ppl_Linear_Expression_add_to_coefficient (*cloog_pointers__.p_ppl_Linear_Expression_add_to_coefficient)
++#define ppl_Linear_Expression_add_to_inhomogeneous (*cloog_pointers__.p_ppl_Linear_Expression_add_to_inhomogeneous)
++#define ppl_Linear_Expression_coefficient (*cloog_pointers__.p_ppl_Linear_Expression_coefficient)
++#define ppl_Linear_Expression_inhomogeneous_term (*cloog_pointers__.p_ppl_Linear_Expression_inhomogeneous_term)
++#define ppl_Linear_Expression_space_dimension (*cloog_pointers__.p_ppl_Linear_Expression_space_dimension)
++#define ppl_new_Coefficient (*cloog_pointers__.p_ppl_new_Coefficient)
++#define ppl_new_Coefficient_from_mpz_t (*cloog_pointers__.p_ppl_new_Coefficient_from_mpz_t)
++#define ppl_new_Constraint (*cloog_pointers__.p_ppl_new_Constraint)
++#define ppl_new_Constraint_System (*cloog_pointers__.p_ppl_new_Constraint_System)
++#define ppl_new_Constraint_System_const_iterator (*cloog_pointers__.p_ppl_new_Constraint_System_const_iterator)
++#define ppl_new_C_Polyhedron_from_C_Polyhedron (*cloog_pointers__.p_ppl_new_C_Polyhedron_from_C_Polyhedron)
++#define ppl_new_C_Polyhedron_from_space_dimension (*cloog_pointers__.p_ppl_new_C_Polyhedron_from_space_dimension)
++#define ppl_new_C_Polyhedron_recycle_Constraint_System (*cloog_pointers__.p_ppl_new_C_Polyhedron_recycle_Constraint_System)
++#define ppl_new_Linear_Expression (*cloog_pointers__.p_ppl_new_Linear_Expression)
++#define ppl_new_Linear_Expression_from_Constraint (*cloog_pointers__.p_ppl_new_Linear_Expression_from_Constraint)
++#define ppl_new_Linear_Expression_from_Linear_Expression (*cloog_pointers__.p_ppl_new_Linear_Expression_from_Linear_Expression)
++#define ppl_new_Linear_Expression_with_dimension (*cloog_pointers__.p_ppl_new_Linear_Expression_with_dimension)
++#define ppl_new_Pointset_Powerset_C_Polyhedron_from_C_Polyhedron (*cloog_pointers__.p_ppl_new_Pointset_Powerset_C_Polyhedron_from_C_Polyhedron)
++#define ppl_new_Pointset_Powerset_C_Polyhedron_from_Pointset_Powerset_C_Polyhedron (*cloog_pointers__.p_ppl_new_Pointset_Powerset_C_Polyhedron_from_Pointset_Powerset_C_Polyhedron)
++#define ppl_new_Pointset_Powerset_C_Polyhedron_from_space_dimension (*cloog_pointers__.p_ppl_new_Pointset_Powerset_C_Polyhedron_from_space_dimension)
++#define ppl_new_Pointset_Powerset_C_Polyhedron_iterator (*cloog_pointers__.p_ppl_new_Pointset_Powerset_C_Polyhedron_iterator)
++#define ppl_Pointset_Powerset_C_Polyhedron_add_constraint (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_add_constraint)
++#define ppl_Pointset_Powerset_C_Polyhedron_add_space_dimensions_and_embed (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_add_space_dimensions_and_embed)
++#define ppl_Pointset_Powerset_C_Polyhedron_difference_assign (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_difference_assign)
++#define ppl_Pointset_Powerset_C_Polyhedron_intersection_assign (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_intersection_assign)
++#define ppl_Pointset_Powerset_C_Polyhedron_is_empty (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_is_empty)
++#define ppl_Pointset_Powerset_C_Polyhedron_iterator_begin (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_iterator_begin)
++#define ppl_Pointset_Powerset_C_Polyhedron_iterator_dereference (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_iterator_dereference)
++#define ppl_Pointset_Powerset_C_Polyhedron_iterator_end (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_iterator_end)
++#define ppl_Pointset_Powerset_C_Polyhedron_iterator_equal_test (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_iterator_equal_test)
++#define ppl_Pointset_Powerset_C_Polyhedron_iterator_increment (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_iterator_increment)
++#define ppl_Pointset_Powerset_C_Polyhedron_map_space_dimensions (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_map_space_dimensions)
++#define ppl_Pointset_Powerset_C_Polyhedron_maximize (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_maximize)
++#define ppl_Pointset_Powerset_C_Polyhedron_minimize (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_minimize)
++#define ppl_Pointset_Powerset_C_Polyhedron_remove_space_dimensions (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_remove_space_dimensions)
++#define ppl_Pointset_Powerset_C_Polyhedron_size (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_size)
++#define ppl_Pointset_Powerset_C_Polyhedron_space_dimension (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_space_dimension)
++#define ppl_Pointset_Powerset_C_Polyhedron_upper_bound_assign (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_upper_bound_assign)
++#define ppl_Polyhedron_add_constraint (*cloog_pointers__.p_ppl_Polyhedron_add_constraint)
++#define ppl_Polyhedron_add_constraints (*cloog_pointers__.p_ppl_Polyhedron_add_constraints)
++#define ppl_Polyhedron_add_space_dimensions_and_embed (*cloog_pointers__.p_ppl_Polyhedron_add_space_dimensions_and_embed)
++#define ppl_Polyhedron_get_constraints (*cloog_pointers__.p_ppl_Polyhedron_get_constraints)
++#define ppl_Polyhedron_map_space_dimensions (*cloog_pointers__.p_ppl_Polyhedron_map_space_dimensions)
++#define ppl_Polyhedron_remove_space_dimensions (*cloog_pointers__.p_ppl_Polyhedron_remove_space_dimensions)
++#define ppl_Polyhedron_space_dimension (*cloog_pointers__.p_ppl_Polyhedron_space_dimension)
++#define ppl_subtract_Linear_Expression_from_Linear_Expression (*cloog_pointers__.p_ppl_subtract_Linear_Expression_from_Linear_Expression)
++#define pprint (*cloog_pointers__.p_pprint)
++#define stmt_block (*cloog_pointers__.p_stmt_block)
++#define stmt_for (*cloog_pointers__.p_stmt_for)
++#define stmt_guard (*cloog_pointers__.p_stmt_guard)
++#define stmt_root (*cloog_pointers__.p_stmt_root)
++#define stmt_user (*cloog_pointers__.p_stmt_user)
++#define ppl_delete_Constraint_System (*cloog_pointers__.p_ppl_delete_Constraint_System)
++#define ppl_initialize (*cloog_pointers__.p_ppl_initialize)
++#define ppl_new_Constraint_System_from_Constraint (*cloog_pointers__.p_ppl_new_Constraint_System_from_Constraint)
++#define ppl_new_C_Polyhedron_from_Constraint_System (*cloog_pointers__.p_ppl_new_C_Polyhedron_from_Constraint_System)
++#define ppl_Polyhedron_affine_image (*cloog_pointers__.p_ppl_Polyhedron_affine_image)
++#define ppl_io_fprint_Pointset_Powerset_C_Polyhedron (*cloog_pointers__.p_ppl_io_fprint_Pointset_Powerset_C_Polyhedron)
++#define ppl_new_PIP_Problem_from_constraints (*cloog_pointers__.p_ppl_new_PIP_Problem_from_constraints)
++#define ppl_PIP_Problem_is_satisfiable (*cloog_pointers__.p_ppl_PIP_Problem_is_satisfiable)
++#define ppl_delete_PIP_Problem (*cloog_pointers__.p_ppl_delete_PIP_Problem)
++
++#define cloog_finalize (*cloog_pointers__.p_ppl_finalize)
++
++
+ #endif /* GRAPHITE_CLOOG_COMPAT_H  */
+--- a/gcc/graphite-poly.h
++++ b/gcc/graphite-poly.h
+@@ -22,6 +22,8 @@ along with GCC; see the file COPYING3.  If not see
+ #ifndef GCC_GRAPHITE_POLY_H
+ #define GCC_GRAPHITE_POLY_H
+ 
++#include "graphite-cloog-util.h"
++
+ typedef struct poly_dr *poly_dr_p;
+ DEF_VEC_P(poly_dr_p);
+ DEF_VEC_ALLOC_P (poly_dr_p, heap);
+--- a/gcc/graphite.c
++++ b/gcc/graphite.c
+@@ -56,6 +56,35 @@ along with GCC; see the file COPYING3.  If not see
+ 
+ CloogState *cloog_state;
+ 
++__typeof (cloog_pointers__) cloog_pointers__;
++
++static bool
++init_cloog_pointers (void)
++{
++  void *h;
++
++  if (cloog_pointers__.inited)
++    return cloog_pointers__.h != NULL;
++  h = dlopen ("libcloog.so.0", RTLD_LAZY);
++  cloog_pointers__.h = h;
++  if (h == NULL)
++    return false;
++#define DYNSYM(x) \
++  do \
++    { \
++      union { __typeof (cloog_pointers__.p_##x) p; void *q; } u; \
++      u.q = dlsym (h, #x); \
++      if (u.q == NULL) \
++	return false; \
++      cloog_pointers__.p_##x = u.p; \
++    } \
++  while (0)
++  DYNSYMS
++#undef DYNSYM
++  return true;
++}
++
++
+ /* Print global statistics to FILE.  */
+ 
+ static void
+@@ -201,6 +230,12 @@ graphite_initialize (void)
+       return false;
+     }
+ 
++  if (!init_cloog_pointers ())
++    {
++      sorry ("Graphite loop optimizations cannot be used");
++      return false;
++    }
++
+   scev_reset ();
+   recompute_all_dominators ();
+   initialize_original_copy_tables ();
diff --git a/4.7.0/gentoo/76_all_4.7.0_c-family-headers.patch b/4.7.0/gentoo/76_all_4.7.0_c-family-headers.patch
new file mode 100644
index 0000000..9d559fe
--- /dev/null
+++ b/4.7.0/gentoo/76_all_4.7.0_c-family-headers.patch
@@ -0,0 +1,50 @@
+https://bugs.gentoo.org/396005
+
+
+2011-07-22  Romain Geissler  <romain.geissler@gmail.com>
+
+	PR plugins/45348
+	PR plugins/48425
+	PR plugins/46577
+	* Makefile.in: Do not flatten c-family directory when installing
+	plugin headers.
+
+
+2011-07-25  Romain Geissler  <romain.geissler@gmail.com>
+
+	* c-pretty-print.h: Search c-common.h in c-family.
+	
+
+--- gcc/c-family/c-pretty-print.h
++++ gcc/c-family/c-pretty-print.h
+@@ -23,7 +23,7 @@
+ #define GCC_C_PRETTY_PRINTER
+ 
+ #include "tree.h"
+-#include "c-common.h"
++#include "c-family/c-common.h"
+ #include "pretty-print.h"
+ 
+
+--- gcc/Makefile.in
++++ gcc/Makefile.in
+@@ -4602,8 +4602,8 @@
+ 
+ # Install the headers needed to build a plugin.
+ install-plugin: installdirs lang.install-plugin s-header-vars
+-# We keep the directory structure for files in config and .def files. All
+-# other files are flattened to a single directory.
++# We keep the directory structure for files in config or c-family and .def
++# files. All other files are flattened to a single directory.
+ 	$(mkinstalldirs) $(DESTDIR)$(plugin_includedir)
+ 	headers=`echo $(PLUGIN_HEADERS) | tr ' ' '\012' | sort -u`; \
+ 	srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*|]/\\\\&/g'`; \
+@@ -4615,7 +4615,7 @@
+ 	  else continue; \
+ 	  fi; \
+ 	  case $$path in \
+-	  "$(srcdir)"/config/* | "$(srcdir)"/*.def ) \
++	  "$(srcdir)"/config/* | "$(srcdir)"/c-family/* | "$(srcdir)"/*.def ) \
+ 	    base=`echo "$$path" | sed -e "s|$$srcdirstrip/||"`;; \
+ 	  *) base=`basename $$path` ;; \
+ 	  esac; \
diff --git a/4.7.0/gentoo/80_all_gcc-4.6-x32.patch b/4.7.0/gentoo/80_all_gcc-4.6-x32.patch
new file mode 100644
index 0000000..dfde53b
--- /dev/null
+++ b/4.7.0/gentoo/80_all_gcc-4.6-x32.patch
@@ -0,0 +1,13063 @@
+taken from:
+	git://gcc.gnu.org/git/gcc.git
+	branch: hjl/x32/gcc-4_6-branch+mx32
+
+git diff origin/gcc-4_6-branch...origin/hjl/x32/gcc-4_6-branch+mx32
+
+diff --git a/gcc/ChangeLog.mx32 b/gcc/ChangeLog.mx32
+new file mode 100644
+index 0000000..1b6ad28
+--- /dev/null
++++ b/gcc/ChangeLog.mx32
+@@ -0,0 +1,42 @@
++2011-12-07  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config/i386/biarch64.h (TARGET_64BIT_DEFAULT): Re-order.
++
++	* config/i386/biarchx32.h (TARGET_64BIT_DEFAULT): Replace
++	OPTION_MASK_ISA_X86_64 with OPTION_MASK_ISA_64BIT.
++
++	* config/i386/i386.c (ix86_option_override_internal): Properly
++	handle -m32, -m64 and -mx32.
++
++	* config/i386/i386.h (TARGET_LP64): Changed to TARGET_X86_64.
++
++	* config/i386/i386.opt (m32): Changed back to ISA_64BIT.
++	(m64): Replace ISA_64BIT with ISA_X86_64.
++	(mx86-64): Replace ISA_X86_64 with ISA_64BIT.
++
++2011-12-07  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config.gcc: Also support --with-abi={mx32|m64}.
++
++2011-12-07  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config.gcc: For --with-abi=x32 or --with-multilib-list=mx32,
++	use i386/biarchx32.h instead of i386/biarch64.h.
++	(supported_defaults): Add abi for i[34567]86-*-* and x86_64-*-*.
++
++	* config/i386/biarch64.h (TARGET_64BIT_DEFAULT): Add
++	OPTION_MASK_ISA_X86_64.
++
++	* config/i386/biarchx32.h: New.
++
++	* config/i386/i386.c (ix86_option_override_internal): Properly
++	set OPTION_MASK_ISA_64BIT and OPTION_MASK_ISA_X32.
++
++	* config/i386/i386.h (TARGET_X86_64): New.
++
++	* config/i386/i386.opt (m32): Replace ISA_64BIT with ISA_X86_64.
++	(mx86-64): New.
++
++	* config/i386/linux64.h (SPEC_64): Support TARGET_BI_ARCH == 2.
++	(SPEC_X32): Likewise.
++	(MULTILIB_DEFAULTS): Likewise.
+diff --git a/gcc/ChangeLog.x32 b/gcc/ChangeLog.x32
+new file mode 100644
+index 0000000..4e12dde
+--- /dev/null
++++ b/gcc/ChangeLog.x32
+@@ -0,0 +1,421 @@
++2011-11-15  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config/i386/i386.c (ix86_expand_movmem): Replace Pmode with
++	word_mode for loop.
++	(ix86_expand_setmem): Likewise.
++
++2011-11-15  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config/i386/i386.c (ix86_gen_pro_epilogue_adjust_stack): Removed.
++	(ix86_option_override_internal): Don't set
++	ix86_gen_pro_epilogue_adjust_stack.
++	(ix86_expand_prologue): Check Pmode == DImode.
++
++2011-11-11  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* unwind-dw2.c (_Unwind_SetGRValue): Update comments.
++
++2011-11-11  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config/i386/i386.md (*zero_extendsidi2_x32): New.
++	* config/i386/predicates.md (x86_64_symbolic_immediate_operand):
++	Likewise.
++
++2011-11-10  H.J. Lu  <hongjiu.lu@intel.com>
++
++	Backport from mainline
++	2011-07-26  Uros Bizjak  <ubizjak@gmail.com>
++
++	* config/i386/i386.md (add->lea splitter): Implement using SWI
++	mode iterator.  Change operand 2 predicate to <nonmemory_operand>.
++	(add->lea zext splitter): Change operand 2 predicate to
++	x86_64_nonmemory_operand.
++
++2011-11-10  H.J. Lu  <hongjiu.lu@intel.com>
++
++	Backport from mainline
++	2011-08-05  Uros Bizjak  <ubizjak@gmail.com>
++
++	* config/i386/i386.c (ix86_print_operand_address): Handle SUBREGs of
++	parts.base and parts.index.
++	* config/i386/predicates.md (aligned_operand): Ditto.
++	(cmpxchg8b_pic_memory_operand): Ditto.
++
++2011-11-10  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config/i386/i386.c (x86_this_parameter): Replace DImode with
++	Pmode.
++	(x86_output_mi_thunk): Likewise.
++
++2011-11-10  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config/i386/i386.c (function_value_64): Return pointers in
++	word_mode instead of Pmode.
++	(ix86_promote_function_mode): Likewise.
++
++2011-10-25  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config/i386/i386.md (lwp_slwpcb): Check Pmode instead
++	of TARGET_64BIT.
++
++2011-11-10  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config/i386/sse.md (*sse2_maskmovdqu_rex64): Replace :DI
++	with :P.
++
++2011-11-10  H.J. Lu  <hongjiu.lu@intel.com>
++
++	Backport from mainline
++	2011-07-29  Uros Bizjak  <ubizjak@gmail.com>
++
++	PR target/47715
++	* config/i386/i386.md (*load_tp_x32): New.
++	(*load_tp_x32_zext): Ditto.
++	(*add_tp_x32): Ditto.
++	(*add_tp_x32_zext): Ditto.
++	(*load_tp_<mode>): Disable for TARGET_X32 targets.
++	(*add_tp_<mode>): Ditto.
++
++2011-11-10  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* unwind-dw2.c (_Unwind_SetGRValue): Assert DWARF register size
++	<= saved reg size.
++
++2011-11-10  H.J. Lu  <hongjiu.lu@intel.com>
++
++	PR other/48007
++	* config.gcc (libgcc_tm_file): Add i386/value-unwind.h for
++	Linux/x86.
++
++	* unwind-dw2.c (ASSUME_EXTENDED_UNWIND_CONTEXT): New.
++	(_Unwind_Context_Reg_Val): Likewise.
++	(_Unwind_Get_Unwind_Word): Likewise.
++	(_Unwind_Get_Unwind_Context_Reg_Val): Likewise.
++	(_Unwind_Context): Use _Unwind_Context_Reg_Val on the reg field.
++	(_Unwind_IsExtendedContext): Check ASSUME_EXTENDED_UNWIND_CONTEXT
++	for EXTENDED_CONTEXT_BIT.
++	(__frame_state_for): Likewise.
++	(uw_init_context_1): Likewise.
++	(_Unwind_GetGR): Updated.
++	(_Unwind_SetGR): Likewise.
++	(_Unwind_GetGRPtr): Likewise.
++	(_Unwind_SetGRPtr): Likewise.
++	(_Unwind_SetGRValue): Likewise.
++	(_Unwind_GRByValue): Likewise.
++	(uw_install_context_1): Likewise.
++
++	* doc/tm.texi.in: Document REG_VALUE_IN_UNWIND_CONTEXT and
++	ASSUME_EXTENDED_UNWIND_CONTEXT.
++	* doc/tm.texi: Regenerated.
++
++2011-11-10  H.J. Lu  <hongjiu.lu@intel.com>
++
++	PR middle-end/47715
++	* calls.c (precompute_register_parameters): Promote the function
++	argument before checking non-legitimate constant.
++
++2011-11-10  H.J. Lu  <hongjiu.lu@intel.com>
++
++	PR rtl-optimization/47449
++	* fwprop.c (forward_propagate_subreg): Don't propagate hard
++	register nor zero/sign extended hard register.
++
++2011-11-10  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config/i386/i386.c (ix86_option_override_internal): Disallow
++	MS ABI in x32 mode.
++	(ix86_init_builtins): Call ix86_init_builtins_va_builtins_abi
++	only for TARGET_LP64.
++	(ix86_handle_abi_attribute): Check TARGET_LP64 instead of
++	TARGET_64BIT.
++
++2011-11-10  H.J. Lu  <hongjiu.lu@intel.com>
++
++	Backport from mainline
++	2011-07-21  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config/i386/i386.c (function_value_64): Always return pointers
++	in Pmode.
++	(ix86_promote_function_mode): New.
++	(TARGET_PROMOTE_FUNCTION_MODE): Likewise.
++
++2011-11-10  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config/i386/i386.md (*lea_3_zext): New.
++	(*lea_general_1_zext): Removed.
++	(*lea_general_2_zext): Likewise.
++	(*lea_general_3_zext): Likewise.
++
++2011-11-10  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config/i386/i386.md (*lea_general_2): Replace "i" with "n"
++	on const248_operand.
++	(*lea_general_3): Likewise.
++
++2011-11-10  H.J. Lu  <hongjiu.lu@intel.com>
++
++	Backport from mainline
++	2011-07-26  Uros Bizjak  <ubizjak@gmail.com>
++		    H.J. Lu  <hongjiu.lu@intel.com>
++
++	PR target/47381
++	PR target/49832
++	PR target/49833
++	* config/i386/i386.md (i): Change SImode attribute to "e".
++	(g): Change SImode attribute to "rme".
++	(di): Change SImode attribute to "nF".
++	(general_operand): Change SImode attribute to x86_64_general_operand.
++	(general_szext_operand): Change SImode attribute to
++	x86_64_szext_general_operand.
++	(immediate_operand): Change SImode attribute to
++	x86_64_immediate_operand.
++	(nonmemory_operand): Change SImode attribute to
++	x86_64_nonmemory_operand.
++	(*movdi_internal_rex64): Remove mode from pic_32bit_operand check.
++	(*movsi_internal): Ditto.  Use "e" constraint in alternative 2.
++	(testsi_ccno_1): Use x86_64_nonmemory_operand predicate for operand 2.
++	(*bt<mode>): Ditto.
++	(*add<mode>1): Use x86_64_general_operand predicate for operand 2.
++	Update operand constraints.
++	(addsi_1_zext): Ditto.
++	(*add<mode>2): Ditto.
++	(*addsi_3_zext): Ditto.
++	(*subsi_1_zext): Ditto.
++	(*subsi_2_zext): Ditto.
++	(*subsi_3_zext): Ditto.
++	(*addsi3_carry_zext): Ditto.
++	(*<plusminus_insn>si3_zext_cc_overflow): Ditto.
++	(*mulsi3_1_zext): Ditto.
++	(*andsi_1): Ditto.
++	(*andsi_1_zext): Ditto.
++	(*andsi_2_zext): Ditto.
++	(*<any_or:code>si_1_zext): Ditto.
++	(*<any_or:code>si_2_zext): Ditto.
++	(*test<mode>_1): Use <general_operand> predicate for operand 1.
++	(*and<mode>_2): Ditto.
++	(mov<mode>cc): Use  <general_operand> predicate for operands 1 and 2.
++
++2011-11-09  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config/i386/i386.c (legitimize_tls_address): Use
++	gen_tls_local_dynamic_x32 for TARGET_X32.
++
++	* config/i386/i386.md (*tls_local_dynamic_64): Renamed to ...
++	(*tls_local_dynamic_<x86_64_mode>): This.  Replace :DI with :P.
++	Support TARGET_X32.
++	(tls_local_dynamic_64): Renamed to ...
++	(tls_local_dynamic_<x86_64_mode>): This. 
++
++2011-11-09  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config/i386/i386.c (legitimize_tls_address): Use
++	gen_tls_global_dynamic_x32 for TARGET_X32.
++
++	* config/i386/i386.md (*tls_global_dynamic_64): Renamed to ...
++	(*tls_global_dynamic_<x86_64_mode>): This.  Replace :DI with :P.
++	Support TARGET_X32.
++	(tls_global_dynamic_64): Renamed to ...
++	(tls_global_dynamic_<x86_64_mode>): This. 
++
++2011-11-09  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config/i386/x86-64.h (SIZE_TYPE): Check TARGET_LP64 instead
++	of TARGET_64BIT.
++	(PTRDIFF_TYPE): Likewise.
++
++2011-11-09  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config/i386/i386.c (ix86_option_override_internal): Turn on
++	OPTION_MASK_ISA_64BIT for TARGET_X32.  Only allow small and
++	small PIC models for TARGET_X32.
++
++2011-11-09  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config/i386/i386.md (stack_protect_set): Check TARGET_LP64
++	instead of TARGET_64BIT.
++	(stack_protect_test): Likewise.
++
++2011-11-09  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config/i386/i386.c (ix86_trampoline_init): Use movl for 64bit
++	if ptr_mode == SImode.  Replace DImode with Pmode or ptr_mode.
++
++2011-11-09  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config/i386/i386.md (add->lea splitter): Add :DWI.  Extend
++	operands less than SImode wide to SImode.
++	(*lea_general_1): Check TARGET_LP64 instead of TARGET_64BIT.
++	(*lea_general_2): Likewise.
++	(*lea_general_3): Likewise.
++	(*lea_general_1_zext): Replace Pmode with DImode.
++	(*lea_general_2_zext): Likewise.
++	(*lea_general_3_zext): Likewise.
++	(ashift->lea splitter): Extend operands less than SImode wide to
++	SImode.
++	(lea peephole): Replace Pmode with word_mode.
++
++2011-11-09  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config/i386/i386.c (ix86_legitimate_address_p): Allow SImode
++	and DImode base and index registers.
++
++	* config/i386/i386.md (*lea_1): Renamed to ...
++	(lea<mode>_1): This.  Replace :P with :SWI48.
++
++2011-11-08  H.J. Lu  <hongjiu.lu@intel.com>
++
++	Backport from mainline
++	2011-07-20  H.J. Lu  <hongjiu.lu@intel.com>
++		    Uros Bizjak  <ubizjak@gmail.com>
++		    Richard Henderson  <rth@redhat.com>
++
++	* config/i386/constraints.md (w): New.
++
++	* config/i386/i386.c (ix86_output_addr_vec_elt): Check
++	TARGET_LP64 instead of TARGET_64BIT for ASM_QUAD.
++
++	* config/i386/i386.h (CASE_VECTOR_MODE): Check TARGET_LP64
++	instead of TARGET_64BIT.
++
++	* config/i386/i386.md (indirect_jump): Replace
++	nonimmediate_operand with indirect_branch_operand.
++	(*indirect_jump): Likewise.  Replace constraint "m" with "w".
++	(tablejump): Replace nonimmediate_operand with
++	indirect_branch_operand.
++	(*tablejump_1): Replace nonimmediate_operand with
++	indirect_branch_operand.  Replace constraint "m" with "w".
++	(*call_1_rex64_vzeroupper): Replace :DI with :P.  Replace
++	constraint "m" with "w".
++	(*call_1_rex64): Likewise.
++	(*sibcall_1_rex64_vzeroupper): Likewise.
++	(*sibcall_1_rex64): Likewise.
++	(*call_value_0_rex64_vzeroupper): Likewise.
++	(*call_value_0_rex64): Likewise.
++	(*call_value_1_rex64_vzeroupper): Likewise.
++	(*call_value_1_rex64): Likewise.
++	(set_got_offset_rex64): Check TARGET_LP64 instead of
++	TARGET_64BIT.
++
++	* config/i386/predicates.md (indirect_branch_operand): New.
++	(call_insn_operand): Support x32.
++
++2011-11-08  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config/i386/i386-protos.h (ix86_output_rex_prefix_p): New.
++	* config/i386/i386.c (ix86_output_rex_prefix_p): Likewise.
++
++	* config/i386/i386.md (*movsi_internal): Output REX prefix if
++	needed.
++	(*add<mode>_1): Likewise.
++
++2011-11-08  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config/i386/i386.c (ix86_gen_pro_epilogue_adjust_stack): New.
++	(ix86_option_override_internal): Check TARGET_LP64.  Set
++	ix86_gen_pro_epilogue_adjust_stack. Update ix86_gen_monitor.
++	(setup_incoming_varargs_64): Use word_mode with integer
++	parameters in registers.
++	(gen_push): Push register in word_mode instead of Pmode.
++	(ix86_emit_save_regs): Likewise.
++	(ix86_emit_save_regs_using_mov): Save integer registers in
++	word_mode.
++	(gen_pop): Pop register in word_mode instead of Pmode.
++	(ix86_emit_restore_regs_using_pop): Likewise.
++	(pro_epilogue_adjust_stack): Check TARGET_LP64.
++	(ix86_expand_prologue): Replace Pmode with word_mode for push
++	immediate.  Use ix86_gen_pro_epilogue_adjust_stack.  Save and
++	restore RAX and R10 in word_mode.
++	(ix86_emit_restore_regs_using_mov): Restore integer registers
++	in word_mode.
++	(ix86_expand_split_stack_prologue): Save R10_REG and restore in
++	word_mode.
++	(ix86_decompose_address): Disallow fs:(reg) if Pmode !=
++	word_mode. 
++	(legitimize_tls_address): Load TP into register for
++	TLS_MODEL_INITIAL_EXEC and TLS_MODEL_LOCAL_EXEC modes in x32.
++	(ix86_print_operand): Output register in DImode for 64bit
++	indirect branch.
++	(ix86_split_to_parts): Use word_mode with PUT_MODE for push.
++	(ix86_split_long_move): Likewise.
++	(ix86_zero_extend_to_Pmode): Handle Pmode != DImode.
++	(ix86_expand_movmem): Use word_mode for size needed for loop.
++
++	* config/i386/i386.md (W): New.
++	(x86_64_mode): Likewise.
++	(*push<mode>2_prologue): Replace :P with :W.
++	(*pop<mode>1): Likewise.
++	(*pop<mode>1_epilogue): Likewise.
++	(*rep_movdi_rex64): Replace :DI with :P.  Add addr32 if needed.
++	(*rep_stosdi_rex64): Likewise.
++	(*rep_movsi): Add addr32 if needed.
++	(*rep_movqi): Likewise.
++	(*rep_stossi): Likewise.
++	(*rep_stosqi): Likewise.
++	(*cmpstrnqi_nz_1): Likewise.
++	(*cmpstrnqi_1): Likewise.
++	(*strlenqi_1): Likewise.
++	(push/pop peephole2): Use word_mode scratch registers.
++
++	* config/i386/sse.md (sse3_monitor64): Renamed to ...
++	(sse3_monitor_<x86_64_mode>): This.
++
++2011-11-08  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* longlong.h (count_leading_zeros): Use long long builtin for
++	x86-64.
++	(count_trailing_zeros): Likewise.
++
++2011-11-04  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* dwarf2out.c (dwarf2out_frame_debug_expr): Check
++	HARD_FRAME_POINTER_REGNUM instead of hard_frame_pointer_rtx
++	in Rule 18.
++
++2011-11-04  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config/i386/mmx.md (*mmx_maskmovq): Replace :SI with :P and
++	remove "&& !TARGET_64BIT"
++	(*mmx_maskmovq_rex): Removed.
++
++2011-11-04  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config/i386/i386.h (Pmode): Replace TARGET_64BIT with
++	TARGET_LP64.
++
++2011-11-04  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config.gcc: Support --with-multilib-list for x86 Linux
++	targets.
++
++	* configure.ac: Mention x86-64 for --with-multilib-list.
++	* configure: Regenerated.
++
++	* config/i386/i386.h (TARGET_X32): New.
++	(TARGET_LP64): New.
++	(LONG_TYPE_SIZE): Likewise.
++	(POINTER_SIZE): Likewise.
++	(POINTERS_EXTEND_UNSIGNED): Likewise.
++	(OPT_ARCH64): Support x32.
++	(OPT_ARCH32): Likewise.
++
++	* config/i386/i386.opt (mx32): New.
++
++	* config/i386/linux64.h (GLIBC_DYNAMIC_LINKERX32): New.
++	(SPEC_X32): Likewise.
++	(SPEC_64): Support x32.
++	(SPEC_32): Likewise.
++	(ASM_SPEC): Likewise.
++	(LINK_SPEC): Likewise.
++	(TARGET_THREAD_SSP_OFFSET): Likewise.
++	(TARGET_THREAD_SPLIT_STACK_OFFSET): Likewise.
++
++	* config/linux.h (UCLIBC_DYNAMIC_LINKERX32): New.
++	(BIONIC_DYNAMIC_LINKERX32): Likewise.
++	(LINUX_DYNAMIC_LINKERX32): Likewise.
++
++	* config/i386/t-linux64: Support TM_MULTILIB_CONFIG.
++
++	* doc/install.texi: Document --with-multilib-list for
++	Linux/x86-64.
++
++	* doc/invoke.texi: Document -mx32.
+diff --git a/gcc/calls.c b/gcc/calls.c
+index 1c161bf..080cbec 100644
+--- a/gcc/calls.c
++++ b/gcc/calls.c
+@@ -683,12 +683,6 @@ precompute_register_parameters (int num_actuals, struct arg_data *args,
+ 	    pop_temp_slots ();
+ 	  }
+ 
+-	/* If the value is a non-legitimate constant, force it into a
+-	   pseudo now.  TLS symbols sometimes need a call to resolve.  */
+-	if (CONSTANT_P (args[i].value)
+-	    && !LEGITIMATE_CONSTANT_P (args[i].value))
+-	  args[i].value = force_reg (args[i].mode, args[i].value);
+-
+ 	/* If we are to promote the function arg to a wider mode,
+ 	   do it now.  */
+ 
+@@ -698,6 +692,12 @@ precompute_register_parameters (int num_actuals, struct arg_data *args,
+ 			     TYPE_MODE (TREE_TYPE (args[i].tree_value)),
+ 			     args[i].value, args[i].unsignedp);
+ 
++	/* If the value is a non-legitimate constant, force it into a
++	   pseudo now.  TLS symbols sometimes need a call to resolve.  */
++	if (CONSTANT_P (args[i].value)
++	    && !LEGITIMATE_CONSTANT_P (args[i].value))
++	  args[i].value = force_reg (args[i].mode, args[i].value);
++
+ 	/* If we're going to have to load the value by parts, pull the
+ 	   parts into pseudos.  The part extraction process can involve
+ 	   non-trivial computation.  */
+diff --git a/gcc/config.gcc b/gcc/config.gcc
+index 39d9a19..128ca12 100644
+--- a/gcc/config.gcc
++++ b/gcc/config.gcc
+@@ -450,6 +450,10 @@ fi
+ 
+ case ${target} in
+ i[34567]86-*-*)
++	if test "x$with_abi" != x; then
++		echo "This target does not support --with-abi."
++		exit 1
++	fi
+ 	if test "x$enable_cld" = xyes; then
+ 		tm_defines="${tm_defines} USE_IX86_CLD=1"
+ 	fi
+@@ -459,7 +463,24 @@ i[34567]86-*-*)
+ 	tm_file="vxworks-dummy.h ${tm_file}"
+ 	;;
+ x86_64-*-*)
+-	tm_file="i386/biarch64.h ${tm_file}"
++	case ${with_abi} in
++	"")
++		if test "x$with_multilib_list" = xmx32; then
++			tm_file="i386/biarchx32.h ${tm_file}"
++		else
++			tm_file="i386/biarch64.h ${tm_file}"
++		fi
++		;;
++	64 | m64)
++		tm_file="i386/biarch64.h ${tm_file}"
++		;;
++	x32 | mx32)
++		tm_file="i386/biarchx32.h ${tm_file}"
++		;;
++	*)
++		echo "Unknown ABI used in --with-abi=$with_abi"
++		exit 1
++	esac
+ 	if test "x$enable_cld" = xyes; then
+ 		tm_defines="${tm_defines} USE_IX86_CLD=1"
+ 	fi
+@@ -1262,6 +1283,22 @@ i[34567]86-*-linux* | i[34567]86-*-kfreebsd*-gnu | i[34567]86-*-knetbsd*-gnu | i
+ 			tm_file="${tm_file} i386/x86-64.h i386/linux64.h"
+ 			tm_defines="${tm_defines} TARGET_BI_ARCH=1"
+ 			tmake_file="${tmake_file} i386/t-linux64"
++			x86_multilibs="${with_multilib_list}"
++			if test "$x86_multilibs" = "default"; then
++				x86_multilibs="m64,m32"
++			fi
++			x86_multilibs=`echo $x86_multilibs | sed -e 's/,/ /g'`
++			for x86_multilib in ${x86_multilibs}; do
++				case ${x86_multilib} in
++				m32 | m64 | mx32)
++					TM_MULTILIB_CONFIG="${TM_MULTILIB_CONFIG},${x86_multilib}"
++					;;
++				*)
++					echo "--with-multilib-list=${x86_with_multilib} not supported."
++					exit 1
++				esac
++			done
++			TM_MULTILIB_CONFIG=`echo $TM_MULTILIB_CONFIG | sed 's/^,//'`
+ 			need_64bit_hwint=yes
+ 			need_64bit_isa=yes
+ 			case X"${with_cpu}" in
+@@ -1311,6 +1348,22 @@ x86_64-*-linux* | x86_64-*-kfreebsd*-gnu | x86_64-*-knetbsd*-gnu)
+ 		;;
+ 	esac
+ 	tmake_file="${tmake_file} i386/t-linux64 i386/t-crtstuff i386/t-crtpc i386/t-crtfm t-dfprules"
++	x86_multilibs="${with_multilib_list}"
++	if test "$x86_multilibs" = "default"; then
++		x86_multilibs="m64,m32"
++	fi
++	x86_multilibs=`echo $x86_multilibs | sed -e 's/,/ /g'`
++	for x86_multilib in ${x86_multilibs}; do
++		case ${x86_multilib} in
++		m32 | m64 | mx32)
++			TM_MULTILIB_CONFIG="${TM_MULTILIB_CONFIG},${x86_multilib}"
++			;;
++		*)
++			echo "--with-multilib-list=${x86_with_multilib} not supported."
++			exit 1
++		esac
++	done
++	TM_MULTILIB_CONFIG=`echo $TM_MULTILIB_CONFIG | sed 's/^,//'`
+ 	;;
+ i[34567]86-pc-msdosdjgpp*)
+ 	xm_file=i386/xm-djgpp.h
+@@ -2791,6 +2844,7 @@ esac
+ case ${target} in
+ i[34567]86-*-linux* | x86_64-*-linux*)
+ 	tmake_file="${tmake_file} i386/t-pmm_malloc i386/t-i386"
++	libgcc_tm_file="${libgcc_tm_file} i386/value-unwind.h"
+ 	;;
+ i[34567]86-*-* | x86_64-*-*)
+ 	tmake_file="${tmake_file} i386/t-gmm_malloc i386/t-i386"
+@@ -3356,7 +3410,7 @@ case "${target}" in
+ 		;;
+ 
+ 	i[34567]86-*-* | x86_64-*-*)
+-		supported_defaults="arch arch_32 arch_64 cpu cpu_32 cpu_64 tune tune_32 tune_64"
++		supported_defaults="abi arch arch_32 arch_64 cpu cpu_32 cpu_64 tune tune_32 tune_64"
+ 		for which in arch arch_32 arch_64 cpu cpu_32 cpu_64 tune tune_32 tune_64; do
+ 			eval "val=\$with_$which"
+ 			case ${val} in
+diff --git a/gcc/config/i386/biarch64.h b/gcc/config/i386/biarch64.h
+index 629ec98..3dc9889 100644
+--- a/gcc/config/i386/biarch64.h
++++ b/gcc/config/i386/biarch64.h
+@@ -25,5 +25,5 @@ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ <http://www.gnu.org/licenses/>.  */
+ 
+-#define TARGET_64BIT_DEFAULT OPTION_MASK_ISA_64BIT
++#define TARGET_64BIT_DEFAULT (OPTION_MASK_ISA_64BIT | OPTION_MASK_ISA_X86_64)
+ #define TARGET_BI_ARCH 1
+diff --git a/gcc/config/i386/biarchx32.h b/gcc/config/i386/biarchx32.h
+new file mode 100644
+index 0000000..963e390
+--- /dev/null
++++ b/gcc/config/i386/biarchx32.h
+@@ -0,0 +1,28 @@
++/* Make configure files to produce biarch compiler defaulting to x32 mode.
++   This file must be included very first, while the OS specific file later
++   to overwrite otherwise wrong defaults.
++   Copyright (C) 2012 Free Software Foundation, Inc.
++
++This file is part of GCC.
++
++GCC is free software; you can redistribute it and/or modify
++it under the terms of the GNU General Public License as published by
++the Free Software Foundation; either version 3, or (at your option)
++any later version.
++
++GCC is distributed in the hope that it will be useful,
++but WITHOUT ANY WARRANTY; without even the implied warranty of
++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++GNU General Public License for more details.
++
++Under Section 7 of GPL version 3, you are granted additional
++permissions described in the GCC Runtime Library Exception, version
++3.1, as published by the Free Software Foundation.
++
++You should have received a copy of the GNU General Public License and
++a copy of the GCC Runtime Library Exception along with this program;
++see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
++<http://www.gnu.org/licenses/>.  */
++
++#define TARGET_64BIT_DEFAULT (OPTION_MASK_ISA_64BIT | OPTION_MASK_ISA_X32)
++#define TARGET_BI_ARCH 2
+diff --git a/gcc/config/i386/constraints.md b/gcc/config/i386/constraints.md
+index 6233b79..2dced94 100644
+--- a/gcc/config/i386/constraints.md
++++ b/gcc/config/i386/constraints.md
+@@ -19,7 +19,7 @@
+ 
+ ;;; Unused letters:
+ ;;;     B     H           T  W
+-;;;           h jk          vw
++;;;           h jk          v
+ 
+ ;; Integer register constraints.
+ ;; It is not necessary to define 'r' here.
+@@ -109,6 +109,11 @@
+   "@internal Constant call address operand."
+   (match_operand 0 "constant_call_address_operand"))
+ 
++(define_constraint "w"
++  "@internal Call memory operand."
++  (and (match_test "!TARGET_X32")
++       (match_operand 0 "memory_operand")))
++
+ ;; Integer constant constraints.
+ (define_constraint "I"
+   "Integer constant in the range 0 @dots{} 31, for 32-bit shifts."
+diff --git a/gcc/config/i386/i386-protos.h b/gcc/config/i386/i386-protos.h
+index 4f90b50..085f74f 100644
+--- a/gcc/config/i386/i386-protos.h
++++ b/gcc/config/i386/i386-protos.h
+@@ -258,6 +258,8 @@ extern void x86_output_aligned_bss (FILE *, tree, const char *,
+ extern void x86_elf_aligned_common (FILE *, const char *,
+ 				    unsigned HOST_WIDE_INT, int);
+ 
++extern bool ix86_output_rex_prefix_p (rtx, rtx);
++
+ #ifdef RTX_CODE
+ extern void ix86_fp_comparison_codes (enum rtx_code code, enum rtx_code *,
+ 				      enum rtx_code *, enum rtx_code *);
+diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
+index 382fabf..3a2f0b7 100644
+--- a/gcc/config/i386/i386.c
++++ b/gcc/config/i386/i386.c
+@@ -3503,6 +3503,46 @@ ix86_option_override_internal (bool main_args_p)
+   SUBSUBTARGET_OVERRIDE_OPTIONS;
+ #endif
+ 
++  /* Turn off both OPTION_MASK_ISA_X86_64 and OPTION_MASK_ISA_X32 if
++     TARGET_64BIT is false.  */
++  if (!TARGET_64BIT)
++    ix86_isa_flags &= ~(OPTION_MASK_ISA_X86_64 | OPTION_MASK_ISA_X32);
++#ifdef TARGET_BI_ARCH
++  else
++    {
++#if TARGET_BI_ARCH == 1
++      /* When TARGET_BI_ARCH == 1, by default, OPTION_MASK_ISA_X86_64
++	 is on and OPTION_MASK_ISA_X32 is off.  We turn off
++	 OPTION_MASK_ISA_X86_64 if OPTION_MASK_ISA_X32 is turned on by
++	 -mx32.  */
++      if (TARGET_X32)
++	ix86_isa_flags &= ~OPTION_MASK_ISA_X86_64;
++#else
++      /* When TARGET_BI_ARCH == 2, by default, OPTION_MASK_ISA_X32 is
++	 on and OPTION_MASK_ISA_X86_64 is off.  We turn off
++	 OPTION_MASK_ISA_X32 if OPTION_MASK_ISA_X86_64 is turned on by
++	 -m64.  */
++      if (TARGET_X86_64)
++	ix86_isa_flags &= ~OPTION_MASK_ISA_X32;
++#endif
++    }
++#endif
++
++  if (TARGET_X32)
++    {
++      /* Always turn on OPTION_MASK_ISA_64BIT and turn off
++	 OPTION_MASK_ISA_X86_64 for TARGET_X32.  */
++      ix86_isa_flags |= OPTION_MASK_ISA_64BIT;
++      ix86_isa_flags &= ~OPTION_MASK_ISA_X86_64;
++    }
++  else if (TARGET_X86_64)
++    {
++      /* Always turn on OPTION_MASK_ISA_64BIT and turn off
++	 OPTION_MASK_ISA_X32 for TARGET_X86_64.  */
++      ix86_isa_flags |= OPTION_MASK_ISA_64BIT;
++      ix86_isa_flags &= ~OPTION_MASK_ISA_X32;
++    }
++
+   /* -fPIC is the default for x86_64.  */
+   if (TARGET_MACHO && TARGET_64BIT)
+     flag_pic = 2;
+@@ -3601,6 +3641,9 @@ ix86_option_override_internal (bool main_args_p)
+   else
+     ix86_abi = DEFAULT_ABI;
+ 
++  if (ix86_abi == MS_ABI && TARGET_X32)
++    error ("MS ABI not supported in x32 mode");
++
+   if (ix86_cmodel_string != 0)
+     {
+       if (!strcmp (ix86_cmodel_string, "small"))
+@@ -3618,6 +3661,20 @@ ix86_option_override_internal (bool main_args_p)
+       else
+ 	error ("bad value (%s) for %scmodel=%s %s",
+ 	       ix86_cmodel_string, prefix, suffix, sw);
++
++      switch (ix86_cmodel)
++	{
++	case CM_MEDIUM:
++	case CM_MEDIUM_PIC:
++	case CM_LARGE:
++	case CM_LARGE_PIC:
++	  if (TARGET_X32)
++	    error ("code model %qs not supported in x32 mode",
++		   ix86_cmodel_string);
++	  break;
++	default:
++	  break;
++	}
+     }
+   else
+     {
+@@ -4230,11 +4287,23 @@ ix86_option_override_internal (bool main_args_p)
+   if (TARGET_64BIT)
+     {
+       ix86_gen_leave = gen_leave_rex64;
++      if (TARGET_X32)
++	ix86_gen_monitor = gen_sse3_monitor_x32;
++      else
++	ix86_gen_monitor = gen_sse3_monitor_64;
++    }
++  else
++    {
++      ix86_gen_leave = gen_leave;
++      ix86_gen_monitor = gen_sse3_monitor;
++    }
++
++  if (TARGET_LP64)
++    {
+       ix86_gen_add3 = gen_adddi3;
+       ix86_gen_sub3 = gen_subdi3;
+       ix86_gen_sub3_carry = gen_subdi3_carry;
+       ix86_gen_one_cmpl2 = gen_one_cmpldi2;
+-      ix86_gen_monitor = gen_sse3_monitor64;
+       ix86_gen_andsp = gen_anddi3;
+       ix86_gen_allocate_stack_worker = gen_allocate_stack_worker_probe_di;
+       ix86_gen_adjust_stack_and_probe = gen_adjust_stack_and_probedi;
+@@ -4242,12 +4311,10 @@ ix86_option_override_internal (bool main_args_p)
+     }
+   else
+     {
+-      ix86_gen_leave = gen_leave;
+       ix86_gen_add3 = gen_addsi3;
+       ix86_gen_sub3 = gen_subsi3;
+       ix86_gen_sub3_carry = gen_subsi3_carry;
+       ix86_gen_one_cmpl2 = gen_one_cmplsi2;
+-      ix86_gen_monitor = gen_sse3_monitor;
+       ix86_gen_andsp = gen_andsi3;
+       ix86_gen_allocate_stack_worker = gen_allocate_stack_worker_probe_si;
+       ix86_gen_adjust_stack_and_probe = gen_adjust_stack_and_probesi;
+@@ -7565,6 +7632,11 @@ function_value_64 (enum machine_mode orig_mode, enum machine_mode mode,
+ 	  return gen_rtx_REG (mode, AX_REG);
+ 	}
+     }
++  else if (POINTER_TYPE_P (valtype))
++    {
++      /* Pointers are always returned in word_mode.  */
++      mode = word_mode;
++    }
+ 
+   ret = construct_container (mode, orig_mode, valtype, 1,
+ 			     X86_64_REGPARM_MAX, X86_64_SSE_REGPARM_MAX,
+@@ -7634,6 +7706,23 @@ ix86_function_value (const_tree valtype, const_tree fntype_or_decl,
+   return ix86_function_value_1 (valtype, fntype_or_decl, orig_mode, mode);
+ }
+ 
++/* Pointer function arguments and return values are promoted to
++   word_mode.  */
++
++static enum machine_mode
++ix86_promote_function_mode (const_tree type, enum machine_mode mode,
++			    int *punsignedp, const_tree fntype,
++			    int for_return)
++{
++  if (type != NULL_TREE && POINTER_TYPE_P (type))
++    {
++      *punsignedp = POINTERS_EXTEND_UNSIGNED;
++      return word_mode;
++    }
++  return default_promote_function_mode (type, mode, punsignedp, fntype,
++					for_return);
++}
++
+ rtx
+ ix86_libcall_value (enum machine_mode mode)
+ {
+@@ -7906,12 +7995,13 @@ setup_incoming_varargs_64 (CUMULATIVE_ARGS *cum)
+ 
+   for (i = cum->regno; i < max; i++)
+     {
+-      mem = gen_rtx_MEM (Pmode,
++      mem = gen_rtx_MEM (word_mode,
+ 			 plus_constant (save_area, i * UNITS_PER_WORD));
+       MEM_NOTRAP_P (mem) = 1;
+       set_mem_alias_set (mem, set);
+-      emit_move_insn (mem, gen_rtx_REG (Pmode,
+-					x86_64_int_parameter_registers[i]));
++      emit_move_insn (mem,
++		      gen_rtx_REG (word_mode,
++				   x86_64_int_parameter_registers[i]));
+     }
+ 
+   if (ix86_varargs_fpr_size)
+@@ -9014,8 +9104,11 @@ gen_push (rtx arg)
+     m->fs.cfa_offset += UNITS_PER_WORD;
+   m->fs.sp_offset += UNITS_PER_WORD;
+ 
++  if (REG_P (arg) && GET_MODE (arg) != word_mode)
++    arg = gen_rtx_REG (word_mode, REGNO (arg));
++
+   return gen_rtx_SET (VOIDmode,
+-		      gen_rtx_MEM (Pmode,
++		      gen_rtx_MEM (word_mode,
+ 				   gen_rtx_PRE_DEC (Pmode,
+ 						    stack_pointer_rtx)),
+ 		      arg);
+@@ -9026,9 +9119,12 @@ gen_push (rtx arg)
+ static rtx
+ gen_pop (rtx arg)
+ {
++  if (REG_P (arg) && GET_MODE (arg) != word_mode)
++    arg = gen_rtx_REG (word_mode, REGNO (arg));
++
+   return gen_rtx_SET (VOIDmode,
+ 		      arg,
+-		      gen_rtx_MEM (Pmode,
++		      gen_rtx_MEM (word_mode,
+ 				   gen_rtx_POST_INC (Pmode,
+ 						     stack_pointer_rtx)));
+ }
+@@ -9528,7 +9624,7 @@ ix86_emit_save_regs (void)
+   for (regno = FIRST_PSEUDO_REGISTER - 1; regno-- > 0; )
+     if (!SSE_REGNO_P (regno) && ix86_save_reg (regno, true))
+       {
+-	insn = emit_insn (gen_push (gen_rtx_REG (Pmode, regno)));
++	insn = emit_insn (gen_push (gen_rtx_REG (word_mode, regno)));
+ 	RTX_FRAME_RELATED_P (insn) = 1;
+       }
+ }
+@@ -9608,7 +9704,7 @@ ix86_emit_save_regs_using_mov (HOST_WIDE_INT cfa_offset)
+   for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
+     if (!SSE_REGNO_P (regno) && ix86_save_reg (regno, true))
+       {
+-        ix86_emit_save_reg_using_mov (Pmode, regno, cfa_offset);
++        ix86_emit_save_reg_using_mov (word_mode, regno, cfa_offset);
+ 	cfa_offset -= UNITS_PER_WORD;
+       }
+ }
+@@ -9682,7 +9778,7 @@ pro_epilogue_adjust_stack (rtx dest, rtx src, rtx offset,
+   rtx insn;
+   bool add_frame_related_expr = false;
+ 
+-  if (! TARGET_64BIT)
++  if (! TARGET_LP64)
+     insn = gen_pro_epilogue_adjust_stack_si_add (dest, src, offset);
+   else if (x86_64_immediate_operand (offset, DImode))
+     insn = gen_pro_epilogue_adjust_stack_di_add (dest, src, offset);
+@@ -10489,7 +10585,7 @@ ix86_expand_prologue (void)
+ 	 to implement macro RETURN_ADDR_RTX and intrinsic function
+ 	 expand_builtin_return_addr etc.  */
+       t = plus_constant (crtl->drap_reg, -UNITS_PER_WORD);
+-      t = gen_frame_mem (Pmode, t);
++      t = gen_frame_mem (word_mode, t);
+       insn = emit_insn (gen_push (t));
+       RTX_FRAME_RELATED_P (insn) = 1;
+ 
+@@ -10661,7 +10757,7 @@ ix86_expand_prologue (void)
+       emit_insn (ix86_gen_allocate_stack_worker (eax, eax));
+ 
+       /* Use the fact that AX still contains ALLOCATE.  */
+-      adjust_stack_insn = (TARGET_64BIT
++      adjust_stack_insn = (Pmode == DImode
+ 			   ? gen_pro_epilogue_adjust_stack_di_sub
+ 			   : gen_pro_epilogue_adjust_stack_si_sub);
+ 
+@@ -10686,14 +10782,18 @@ ix86_expand_prologue (void)
+       if (r10_live && eax_live)
+         {
+ 	  t = choose_baseaddr (m->fs.sp_offset - allocate);
+-	  emit_move_insn (r10, gen_frame_mem (Pmode, t));
++	  emit_move_insn (gen_rtx_REG (word_mode, R10_REG),
++			  gen_frame_mem (word_mode, t));
+ 	  t = choose_baseaddr (m->fs.sp_offset - allocate - UNITS_PER_WORD);
+-	  emit_move_insn (eax, gen_frame_mem (Pmode, t));
++	  emit_move_insn (gen_rtx_REG (word_mode, AX_REG),
++			  gen_frame_mem (word_mode, t));
+ 	}
+       else if (eax_live || r10_live)
+ 	{
+ 	  t = choose_baseaddr (m->fs.sp_offset - allocate);
+-	  emit_move_insn ((eax_live ? eax : r10), gen_frame_mem (Pmode, t));
++	  emit_move_insn (gen_rtx_REG (word_mode,
++				       (eax_live ? AX_REG : R10_REG)),
++			  gen_frame_mem (word_mode, t));
+ 	}
+     }
+   gcc_assert (m->fs.sp_offset == frame.stack_pointer_offset);
+@@ -10857,7 +10957,7 @@ ix86_emit_restore_regs_using_pop (void)
+ 
+   for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
+     if (!SSE_REGNO_P (regno) && ix86_save_reg (regno, false))
+-      ix86_emit_restore_reg_using_pop (gen_rtx_REG (Pmode, regno));
++      ix86_emit_restore_reg_using_pop (gen_rtx_REG (word_mode, regno));
+ }
+ 
+ /* Emit code and notes for the LEAVE instruction.  */
+@@ -10900,11 +11000,11 @@ ix86_emit_restore_regs_using_mov (HOST_WIDE_INT cfa_offset,
+   for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
+     if (!SSE_REGNO_P (regno) && ix86_save_reg (regno, maybe_eh_return))
+       {
+-	rtx reg = gen_rtx_REG (Pmode, regno);
++	rtx reg = gen_rtx_REG (word_mode, regno);
+ 	rtx insn, mem;
+ 	
+ 	mem = choose_baseaddr (cfa_offset);
+-	mem = gen_frame_mem (Pmode, mem);
++	mem = gen_frame_mem (word_mode, mem);
+ 	insn = emit_move_insn (reg, mem);
+ 
+         if (m->fs.cfa_reg == crtl->drap_reg && regno == REGNO (crtl->drap_reg))
+@@ -11486,8 +11586,8 @@ ix86_expand_split_stack_prologue (void)
+ 	{
+ 	  rtx rax;
+ 
+-	  rax = gen_rtx_REG (Pmode, AX_REG);
+-	  emit_move_insn (rax, reg10);
++	  rax = gen_rtx_REG (word_mode, AX_REG);
++	  emit_move_insn (rax, gen_rtx_REG (word_mode, R10_REG));
+ 	  use_reg (&call_fusage, rax);
+ 	}
+ 
+@@ -11566,8 +11666,8 @@ ix86_expand_split_stack_prologue (void)
+   /* If we are in 64-bit mode and this function uses a static chain,
+      we saved %r10 in %rax before calling _morestack.  */
+   if (TARGET_64BIT && DECL_STATIC_CHAIN (cfun->decl))
+-    emit_move_insn (gen_rtx_REG (Pmode, R10_REG),
+-		    gen_rtx_REG (Pmode, AX_REG));
++    emit_move_insn (gen_rtx_REG (word_mode, R10_REG),
++		    gen_rtx_REG (word_mode, AX_REG));
+ 
+   /* If this function calls va_start, we need to store a pointer to
+      the arguments on the old stack, because they may not have been
+@@ -11760,6 +11860,11 @@ ix86_decompose_address (rtx addr, struct ix86_address *out)
+   else
+     disp = addr;			/* displacement */
+ 
++  /* Since address override works only on the (reg) part in fs:(reg),
++     we can't use it as memory operand.  */
++  if (Pmode != word_mode && seg == SEG_FS && (base || index))
++    return 0;
++
+   /* Extract the integral value of scale.  */
+   if (scale_rtx)
+     {
+@@ -12214,8 +12319,7 @@ ix86_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
+ 	/* Base is not a register.  */
+ 	return false;
+ 
+-      if (GET_MODE (base) != Pmode)
+-	/* Base is not in Pmode.  */
++      if (GET_MODE (base) != SImode && GET_MODE (base) != DImode)
+ 	return false;
+ 
+       if ((strict && ! REG_OK_FOR_BASE_STRICT_P (reg))
+@@ -12243,8 +12347,7 @@ ix86_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
+ 	/* Index is not a register.  */
+ 	return false;
+ 
+-      if (GET_MODE (index) != Pmode)
+-	/* Index is not in Pmode.  */
++      if (GET_MODE (index) != SImode && GET_MODE (index) != DImode)
+ 	return false;
+ 
+       if ((strict && ! REG_OK_FOR_INDEX_STRICT_P (reg))
+@@ -12686,7 +12789,10 @@ legitimize_tls_address (rtx x, enum tls_model model, int for_mov)
+ 	  rtx rax = gen_rtx_REG (Pmode, AX_REG), insns;
+ 
+ 	  start_sequence ();
+-	  emit_call_insn (gen_tls_global_dynamic_64 (rax, x));
++	  if (TARGET_X32)
++	    emit_call_insn (gen_tls_global_dynamic_x32 (rax, x));
++	  else
++	    emit_call_insn (gen_tls_global_dynamic_64 (rax, x));
+ 	  insns = get_insns ();
+ 	  end_sequence ();
+ 
+@@ -12715,7 +12821,10 @@ legitimize_tls_address (rtx x, enum tls_model model, int for_mov)
+ 	  rtx rax = gen_rtx_REG (Pmode, AX_REG), insns, note;
+ 
+ 	  start_sequence ();
+-	  emit_call_insn (gen_tls_local_dynamic_base_64 (rax));
++	  if (TARGET_X32)
++	    emit_call_insn (gen_tls_local_dynamic_base_x32 (rax));
++	  else
++	    emit_call_insn (gen_tls_local_dynamic_base_64 (rax));
+ 	  insns = get_insns ();
+ 	  end_sequence ();
+ 
+@@ -12797,8 +12906,19 @@ legitimize_tls_address (rtx x, enum tls_model model, int for_mov)
+       if (TARGET_64BIT || TARGET_ANY_GNU_TLS)
+ 	{
+           base = get_thread_pointer (for_mov || !TARGET_TLS_DIRECT_SEG_REFS);
+-	  off = force_reg (Pmode, off);
+-	  return gen_rtx_PLUS (Pmode, base, off);
++	  if (Pmode != word_mode)
++	    {
++	      /* Since address override works only on the (reg) part in
++		 fs:(reg), we can't use it as memory operand.  */
++	      rtx reg = gen_reg_rtx (Pmode);
++	      emit_move_insn (reg, base);
++	      return gen_rtx_PLUS (Pmode, reg, off);
++	    }
++	  else
++	    {
++	      off = force_reg (Pmode, off);
++	      return gen_rtx_PLUS (Pmode, base, off);
++	    }
+ 	}
+       else
+ 	{
+@@ -12817,7 +12937,16 @@ legitimize_tls_address (rtx x, enum tls_model model, int for_mov)
+       if (TARGET_64BIT || TARGET_ANY_GNU_TLS)
+ 	{
+ 	  base = get_thread_pointer (for_mov || !TARGET_TLS_DIRECT_SEG_REFS);
+-	  return gen_rtx_PLUS (Pmode, base, off);
++	  if (Pmode != word_mode)
++	    {
++	      /* Since address override works only on the (reg) part in
++		 fs:(reg), we can't use it as memory operand.  */
++	      rtx reg = gen_reg_rtx (Pmode);
++	      emit_move_insn (reg, base);
++	      return gen_rtx_PLUS (Pmode, reg, off);
++	    }
++	  else
++	    return gen_rtx_PLUS (Pmode, base, off);
+ 	}
+       else
+ 	{
+@@ -13922,7 +14051,8 @@ ix86_print_operand (FILE *file, rtx x, int code)
+ 	      gcc_unreachable ();
+ 	    }
+ 
+-	  ix86_print_operand (file, x, 0);
++	  ix86_print_operand (file, x,
++			      TARGET_64BIT && REG_P (x) ? 'q' : 0);
+ 	  return;
+ 
+ 
+@@ -14515,6 +14645,20 @@ ix86_print_operand_address (FILE *file, rtx addr)
+ 
+   gcc_assert (ok);
+ 
++  if (parts.base && GET_CODE (parts.base) == SUBREG)
++    {
++      rtx tmp = SUBREG_REG (parts.base);
++      parts.base = simplify_subreg (GET_MODE (parts.base),
++				    tmp, GET_MODE (tmp), 0);
++    }
++
++  if (parts.index && GET_CODE (parts.index) == SUBREG)
++    {
++      rtx tmp = SUBREG_REG (parts.index);
++      parts.index = simplify_subreg (GET_MODE (parts.index),
++				     tmp, GET_MODE (tmp), 0);
++    }
++
+   base = parts.base;
+   index = parts.index;
+   disp = parts.disp;
+@@ -14719,6 +14863,29 @@ i386_asm_output_addr_const_extra (FILE *file, rtx x)
+ 
+   return true;
+ }
++
++/* Since x64-64 linker IE->LE transition requires a REX prefix, we
++   output a REX prefix if there isn't one.  */
++
++bool
++ix86_output_rex_prefix_p (rtx dest, rtx op)
++{
++  if (!TARGET_X32
++      || GET_MODE (dest) != SImode
++      || REX_INT_REG_P (dest)
++      || !MEM_P (op))
++    return false;
++
++  op = XEXP (op, 0);
++  if (GET_CODE (op) != CONST)
++    return false;
++
++  op = XEXP (op, 0);
++  if (GET_CODE (op) != UNSPEC)
++    return false;
++
++  return XINT (op, 1) == UNSPEC_GOTNTPOFF;
++}
+ 
+ /* Split one or more double-mode RTL references into pairs of half-mode
+    references.  The RTL can be REG, offsettable MEM, integer constant, or
+@@ -15343,7 +15510,7 @@ ix86_output_addr_vec_elt (FILE *file, int value)
+   const char *directive = ASM_LONG;
+ 
+ #ifdef ASM_QUAD
+-  if (TARGET_64BIT)
++  if (TARGET_LP64)
+     directive = ASM_QUAD;
+ #else
+   gcc_assert (!TARGET_64BIT);
+@@ -19329,7 +19496,7 @@ ix86_split_to_parts (rtx operand, rtx *parts, enum machine_mode mode)
+       gcc_assert (ok);
+ 
+       operand = copy_rtx (operand);
+-      PUT_MODE (operand, Pmode);
++      PUT_MODE (operand, word_mode);
+       parts[0] = parts[1] = parts[2] = parts[3] = operand;
+       return size;
+     }
+@@ -19482,7 +19649,7 @@ ix86_split_long_move (rtx operands[])
+       if (push_operand (operands[0], VOIDmode))
+ 	{
+ 	  operands[0] = copy_rtx (operands[0]);
+-	  PUT_MODE (operands[0], Pmode);
++	  PUT_MODE (operands[0], word_mode);
+ 	}
+       else
+         operands[0] = gen_lowpart (DImode, operands[0]);
+@@ -20043,7 +20210,11 @@ ix86_zero_extend_to_Pmode (rtx exp)
+   if (GET_MODE (exp) == Pmode)
+     return copy_to_mode_reg (Pmode, exp);
+   r = gen_reg_rtx (Pmode);
+-  emit_insn (gen_zero_extendsidi2 (r, exp));
++  if (Pmode == DImode)
++    emit_insn (gen_zero_extendsidi2 (r, exp));
++  else
++    emit_move_insn (r,
++		    simplify_gen_subreg (Pmode, exp, GET_MODE (exp), 0));
+   return r;
+ }
+ 
+@@ -21070,11 +21241,11 @@ ix86_expand_movmem (rtx dst, rtx src, rtx count_exp, rtx align_exp,
+       gcc_unreachable ();
+     case loop:
+       need_zero_guard = true;
+-      size_needed = GET_MODE_SIZE (Pmode);
++      size_needed = GET_MODE_SIZE (word_mode);
+       break;
+     case unrolled_loop:
+       need_zero_guard = true;
+-      size_needed = GET_MODE_SIZE (Pmode) * (TARGET_64BIT ? 4 : 2);
++      size_needed = GET_MODE_SIZE (word_mode) * (TARGET_64BIT ? 4 : 2);
+       break;
+     case rep_prefix_8_byte:
+       size_needed = 8;
+@@ -21240,13 +21411,13 @@ ix86_expand_movmem (rtx dst, rtx src, rtx count_exp, rtx align_exp,
+       break;
+     case loop:
+       expand_set_or_movmem_via_loop (dst, src, destreg, srcreg, NULL,
+-				     count_exp, Pmode, 1, expected_size);
++				     count_exp, word_mode, 1, expected_size);
+       break;
+     case unrolled_loop:
+       /* Unroll only by factor of 2 in 32bit mode, since we don't have enough
+ 	 registers for 4 temporaries anyway.  */
+       expand_set_or_movmem_via_loop (dst, src, destreg, srcreg, NULL,
+-				     count_exp, Pmode, TARGET_64BIT ? 4 : 2,
++				     count_exp, word_mode, TARGET_64BIT ? 4 : 2,
+ 				     expected_size);
+       break;
+     case rep_prefix_8_byte:
+@@ -21458,11 +21629,11 @@ ix86_expand_setmem (rtx dst, rtx count_exp, rtx val_exp, rtx align_exp,
+       gcc_unreachable ();
+     case loop:
+       need_zero_guard = true;
+-      size_needed = GET_MODE_SIZE (Pmode);
++      size_needed = GET_MODE_SIZE (word_mode);
+       break;
+     case unrolled_loop:
+       need_zero_guard = true;
+-      size_needed = GET_MODE_SIZE (Pmode) * 4;
++      size_needed = GET_MODE_SIZE (word_mode) * 4;
+       break;
+     case rep_prefix_8_byte:
+       size_needed = 8;
+@@ -21633,11 +21804,11 @@ ix86_expand_setmem (rtx dst, rtx count_exp, rtx val_exp, rtx align_exp,
+       break;
+     case loop:
+       expand_set_or_movmem_via_loop (dst, NULL, destreg, NULL, promoted_val,
+-				     count_exp, Pmode, 1, expected_size);
++				     count_exp, word_mode, 1, expected_size);
+       break;
+     case unrolled_loop:
+       expand_set_or_movmem_via_loop (dst, NULL, destreg, NULL, promoted_val,
+-				     count_exp, Pmode, 4, expected_size);
++				     count_exp, word_mode, 4, expected_size);
+       break;
+     case rep_prefix_8_byte:
+       expand_setmem_via_rep_stos (dst, destreg, promoted_val, count_exp,
+@@ -23381,14 +23552,18 @@ ix86_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
+   else
+     {
+       int offset = 0;
++      int opcode, size;
+ 
+       /* Load the function address to r11.  Try to load address using
+ 	 the shorter movl instead of movabs.  We may want to support
+ 	 movq for kernel mode, but kernel does not use trampolines at
+-	 the moment.  */
+-      if (x86_64_zext_immediate_operand (fnaddr, VOIDmode))
++	 the moment.  FNADDR is a 32bit address and may not be in
++	 DImode when ptr_mode == SImode.  Always use movl in this
++	 case.  */
++      if (ptr_mode == SImode
++	  || x86_64_zext_immediate_operand (fnaddr, VOIDmode))
+ 	{
+-	  fnaddr = copy_to_mode_reg (DImode, fnaddr);
++	  fnaddr = copy_to_mode_reg (Pmode, fnaddr);
+ 
+ 	  mem = adjust_address (m_tramp, HImode, offset);
+ 	  emit_move_insn (mem, gen_int_mode (0xbb41, HImode));
+@@ -23407,13 +23582,25 @@ ix86_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
+ 	  offset += 10;
+ 	}
+ 
+-      /* Load static chain using movabs to r10.  */
++      /* Load static chain using movabs to r10.  Use the shorter movl
++         instead of movabs when ptr_mode == SImode.  */
++      if (ptr_mode == SImode)
++	{
++	  opcode = 0xba41;
++	  size = 6;
++	}
++      else
++	{
++	  opcode = 0xba49;
++	  size = 10;
++	}
++
+       mem = adjust_address (m_tramp, HImode, offset);
+-      emit_move_insn (mem, gen_int_mode (0xba49, HImode));
++      emit_move_insn (mem, gen_int_mode (opcode, HImode));
+ 
+-      mem = adjust_address (m_tramp, DImode, offset + 2);
++      mem = adjust_address (m_tramp, ptr_mode, offset + 2);
+       emit_move_insn (mem, chain_value);
+-      offset += 10;
++      offset += size;
+ 
+       /* Jump to r11; the last (unused) byte is a nop, only there to
+ 	 pad the write out to a single 32-bit store.  */
+@@ -25953,7 +26140,7 @@ ix86_init_builtins (void)
+ 
+   ix86_init_mmx_sse_builtins ();
+ 
+-  if (TARGET_64BIT)
++  if (TARGET_LP64)
+     ix86_init_builtins_va_builtins_abi ();
+ 
+ #ifdef SUBTARGET_INIT_BUILTINS
+@@ -29607,7 +29794,7 @@ ix86_handle_abi_attribute (tree *node, tree name,
+       *no_add_attrs = true;
+       return NULL_TREE;
+     }
+-  if (!TARGET_64BIT)
++  if (!TARGET_LP64)
+     {
+       warning (OPT_Wattributes, "%qE attribute only available for 64-bit",
+ 	       name);
+@@ -29715,7 +29902,7 @@ x86_this_parameter (tree function)
+         parm_regs = x86_64_ms_abi_int_parameter_registers;
+       else
+         parm_regs = x86_64_int_parameter_registers;
+-      return gen_rtx_REG (DImode, parm_regs[aggr]);
++      return gen_rtx_REG (Pmode, parm_regs[aggr]);
+     }
+ 
+   nregs = ix86_function_regparm (type, function);
+@@ -29816,18 +30003,18 @@ x86_output_mi_thunk (FILE *file,
+       xops[1] = this_reg ? this_reg : this_param;
+       if (TARGET_64BIT)
+ 	{
+-	  if (!x86_64_general_operand (xops[0], DImode))
++	  if (!x86_64_general_operand (xops[0], Pmode))
+ 	    {
+-	      tmp = gen_rtx_REG (DImode, R10_REG);
++	      tmp = gen_rtx_REG (Pmode, R10_REG);
+ 	      xops[1] = tmp;
+-	      output_asm_insn ("mov{q}\t{%1, %0|%0, %1}", xops);
++	      output_asm_insn ("mov%z1\t{%1, %0|%0, %1}", xops);
+ 	      xops[0] = tmp;
+ 	      xops[1] = this_param;
+ 	    }
+-	  if (x86_maybe_negate_const_int (&xops[0], DImode))
+-	    output_asm_insn ("sub{q}\t{%0, %1|%1, %0}", xops);
++	  if (x86_maybe_negate_const_int (&xops[0], Pmode))
++	    output_asm_insn ("sub%z1\t{%0, %1|%1, %0}", xops);
+ 	  else
+-	    output_asm_insn ("add{q}\t{%0, %1|%1, %0}", xops);
++	    output_asm_insn ("add%z1\t{%0, %1|%1, %0}", xops);
+ 	}
+       else if (x86_maybe_negate_const_int (&xops[0], SImode))
+ 	output_asm_insn ("sub{l}\t{%0, %1|%1, %0}", xops);
+@@ -29839,7 +30026,7 @@ x86_output_mi_thunk (FILE *file,
+   if (vcall_offset)
+     {
+       if (TARGET_64BIT)
+-	tmp = gen_rtx_REG (DImode, R10_REG);
++	tmp = gen_rtx_REG (Pmode, R10_REG);
+       else
+ 	{
+ 	  int tmp_regno = CX_REG;
+@@ -29859,10 +30046,10 @@ x86_output_mi_thunk (FILE *file,
+       xops[0] = gen_rtx_MEM (Pmode, plus_constant (tmp, vcall_offset));
+       if (TARGET_64BIT && !memory_operand (xops[0], Pmode))
+ 	{
+-	  rtx tmp2 = gen_rtx_REG (DImode, R11_REG);
++	  rtx tmp2 = gen_rtx_REG (Pmode, R11_REG);
+ 	  xops[0] = GEN_INT (vcall_offset);
+ 	  xops[1] = tmp2;
+-	  output_asm_insn ("mov{q}\t{%0, %1|%1, %0}", xops);
++	  output_asm_insn ("mov%z1\t{%0, %1|%1, %0}", xops);
+ 	  xops[0] = gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, tmp, tmp2));
+ 	}
+       xops[1] = this_reg;
+@@ -35219,6 +35406,9 @@ ix86_autovectorize_vector_sizes (void)
+ #undef TARGET_FUNCTION_VALUE_REGNO_P
+ #define TARGET_FUNCTION_VALUE_REGNO_P ix86_function_value_regno_p
+ 
++#undef TARGET_PROMOTE_FUNCTION_MODE
++#define TARGET_PROMOTE_FUNCTION_MODE ix86_promote_function_mode
++
+ #undef TARGET_SECONDARY_RELOAD
+ #define TARGET_SECONDARY_RELOAD ix86_secondary_reload
+ 
+diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
+index dcb3f29..1edec62 100644
+--- a/gcc/config/i386/i386.h
++++ b/gcc/config/i386/i386.h
+@@ -41,7 +41,9 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ 
+ /* Redefines for option macros.  */
+ 
++#define TARGET_X86_64	OPTION_ISA_X86_64
+ #define TARGET_64BIT	OPTION_ISA_64BIT
++#define TARGET_X32	OPTION_ISA_X32
+ #define TARGET_MMX	OPTION_ISA_MMX
+ #define TARGET_3DNOW	OPTION_ISA_3DNOW
+ #define TARGET_3DNOW_A	OPTION_ISA_3DNOW_A
+@@ -72,6 +74,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ #define TARGET_RDRND	OPTION_ISA_RDRND
+ #define TARGET_F16C	OPTION_ISA_F16C
+ 
++#define TARGET_LP64	TARGET_X86_64
+ 
+ /* SSE4.1 defines round instructions */
+ #define	OPTION_MASK_ISA_ROUND	OPTION_MASK_ISA_SSE4_1
+@@ -535,8 +538,8 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
+ #define OPT_ARCH64 "!m32"
+ #define OPT_ARCH32 "m32"
+ #else
+-#define OPT_ARCH64 "m64"
+-#define OPT_ARCH32 "!m64"
++#define OPT_ARCH64 "m64|mx32"
++#define OPT_ARCH32 "m64|mx32:;"
+ #endif
+ 
+ /* Support for configure-time defaults of some command line options.
+@@ -656,6 +659,8 @@ enum target_cpu_default
+ 
+ #define SHORT_TYPE_SIZE 16
+ #define INT_TYPE_SIZE 32
++#define LONG_TYPE_SIZE (TARGET_X32 ? 32 : BITS_PER_WORD)
++#define POINTER_SIZE (TARGET_X32 ? 32 : BITS_PER_WORD)
+ #define LONG_LONG_TYPE_SIZE 64
+ #define FLOAT_TYPE_SIZE 32
+ #define DOUBLE_TYPE_SIZE 64
+@@ -1725,7 +1730,7 @@ typedef struct ix86_args {
+ /* Specify the machine mode that this machine uses
+    for the index in the tablejump instruction.  */
+ #define CASE_VECTOR_MODE \
+- (!TARGET_64BIT || (flag_pic && ix86_cmodel != CM_LARGE_PIC) ? SImode : DImode)
++ (!TARGET_LP64 || (flag_pic && ix86_cmodel != CM_LARGE_PIC) ? SImode : DImode)
+ 
+ /* Define this as 1 if `char' should by default be signed; else as 0.  */
+ #define DEFAULT_SIGNED_CHAR 1
+@@ -1783,7 +1788,14 @@ do {							\
+ /* Specify the machine mode that pointers have.
+    After generation of rtl, the compiler makes no further distinction
+    between pointers and any other objects of this machine mode.  */
+-#define Pmode (TARGET_64BIT ? DImode : SImode)
++#define Pmode (TARGET_LP64 ? DImode : SImode)
++
++/* A C expression whose value is zero if pointers that need to be extended
++   from being `POINTER_SIZE' bits wide to `Pmode' are sign-extended and
++   greater then zero if they are zero-extended and less then zero if the
++   ptr_extend instruction should be used.  */
++
++#define POINTERS_EXTEND_UNSIGNED 1
+ 
+ /* A function address in a call instruction
+    is a byte address (for indexing purposes)
+diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
+index f25a97b..2b188c9 100644
+--- a/gcc/config/i386/i386.md
++++ b/gcc/config/i386/i386.md
+@@ -839,13 +839,13 @@
+ (define_mode_attr r [(QI "q") (HI "r") (SI "r") (DI "r")])
+ 
+ ;; Immediate operand constraint for integer modes.
+-(define_mode_attr i [(QI "n") (HI "n") (SI "i") (DI "e")])
++(define_mode_attr i [(QI "n") (HI "n") (SI "e") (DI "e")])
+ 
+ ;; General operand constraint for word modes.
+-(define_mode_attr g [(QI "qmn") (HI "rmn") (SI "g") (DI "rme")])
++(define_mode_attr g [(QI "qmn") (HI "rmn") (SI "rme") (DI "rme")])
+ 
+ ;; Immediate operand constraint for double integer modes.
+-(define_mode_attr di [(SI "iF") (DI "e")])
++(define_mode_attr di [(SI "nF") (DI "e")])
+ 
+ ;; Immediate operand constraint for shifts.
+ (define_mode_attr S [(QI "I") (HI "I") (SI "I") (DI "J") (TI "O")])
+@@ -854,7 +854,7 @@
+ (define_mode_attr general_operand
+ 	[(QI "general_operand")
+ 	 (HI "general_operand")
+-	 (SI "general_operand")
++	 (SI "x86_64_general_operand")
+ 	 (DI "x86_64_general_operand")
+ 	 (TI "x86_64_general_operand")])
+ 
+@@ -862,21 +862,21 @@
+ (define_mode_attr general_szext_operand
+ 	[(QI "general_operand")
+ 	 (HI "general_operand")
+-	 (SI "general_operand")
++	 (SI "x86_64_szext_general_operand")
+ 	 (DI "x86_64_szext_general_operand")])
+ 
+ ;; Immediate operand predicate for integer modes.
+ (define_mode_attr immediate_operand
+ 	[(QI "immediate_operand")
+ 	 (HI "immediate_operand")
+-	 (SI "immediate_operand")
++	 (SI "x86_64_immediate_operand")
+ 	 (DI "x86_64_immediate_operand")])
+ 
+ ;; Nonmemory operand predicate for integer modes.
+ (define_mode_attr nonmemory_operand
+ 	[(QI "nonmemory_operand")
+ 	 (HI "nonmemory_operand")
+-	 (SI "nonmemory_operand")
++	 (SI "x86_64_nonmemory_operand")
+ 	 (DI "x86_64_nonmemory_operand")])
+ 
+ ;; Operand predicate for shifts.
+@@ -930,6 +930,14 @@
+ ;; This mode iterator allows :P to be used for patterns that operate on
+ ;; pointer-sized quantities.  Exactly one of the two alternatives will match.
+ (define_mode_iterator P [(SI "Pmode == SImode") (DI "Pmode == DImode")])
++
++;; This mode iterator allows :W to be used for patterns that operate on
++;; word_mode sized quantities.
++(define_mode_iterator W
++  [(SI "word_mode == SImode") (DI "word_mode == DImode")])
++
++;; Used in x84_64 pattern name to mark x32.
++(define_mode_attr x86_64_mode [(SI "x32") (DI "64")])
+ 
+ ;; Scheduling descriptions
+ 
+@@ -1730,8 +1738,8 @@
+    (set_attr "mode" "SI")])
+ 
+ (define_insn "*push<mode>2_prologue"
+-  [(set (match_operand:P 0 "push_operand" "=<")
+-	(match_operand:P 1 "general_no_elim_operand" "r<i>*m"))
++  [(set (match_operand:W 0 "push_operand" "=<")
++	(match_operand:W 1 "general_no_elim_operand" "r<i>*m"))
+    (clobber (mem:BLK (scratch)))]
+   ""
+   "push{<imodesuffix>}\t%1"
+@@ -1739,16 +1747,16 @@
+    (set_attr "mode" "<MODE>")])
+ 
+ (define_insn "*pop<mode>1"
+-  [(set (match_operand:P 0 "nonimmediate_operand" "=r*m")
+-	(match_operand:P 1 "pop_operand" ">"))]
++  [(set (match_operand:W 0 "nonimmediate_operand" "=r*m")
++	(match_operand:W 1 "pop_operand" ">"))]
+   ""
+   "pop{<imodesuffix>}\t%0"
+   [(set_attr "type" "pop")
+    (set_attr "mode" "<MODE>")])
+ 
+ (define_insn "*pop<mode>1_epilogue"
+-  [(set (match_operand:P 0 "nonimmediate_operand" "=r*m")
+-	(match_operand:P 1 "pop_operand" ">"))
++  [(set (match_operand:W 0 "nonimmediate_operand" "=r*m")
++	(match_operand:W 1 "pop_operand" ">"))
+    (clobber (mem:BLK (scratch)))]
+   ""
+   "pop{<imodesuffix>}\t%0"
+@@ -2022,7 +2030,7 @@
+ 	      (const_string "ssecvt")
+ 	    (eq_attr "alternative" "4")
+ 	      (const_string "multi")
+- 	    (match_operand:DI 1 "pic_32bit_operand" "")
++ 	    (match_operand 1 "pic_32bit_operand" "")
+ 	      (const_string "lea")
+ 	   ]
+ 	   (const_string "imov")))
+@@ -2119,7 +2127,7 @@
+   [(set (match_operand:SI 0 "nonimmediate_operand"
+ 			"=r,m ,*y,*y,?rm,?*y,*x,*x,?r ,m ,?*Yi,*x")
+ 	(match_operand:SI 1 "general_operand"
+-			"g ,ri,C ,*y,*y ,rm ,C ,*x,*Yi,*x,r   ,m "))]
++			"g ,re,C ,*y,*y ,rm ,C ,*x,*Yi,*x,r   ,m "))]
+   "!(MEM_P (operands[0]) && MEM_P (operands[1]))"
+ {
+   switch (get_attr_type (insn))
+@@ -2157,7 +2165,11 @@
+ 
+     default:
+       gcc_assert (!flag_pic || LEGITIMATE_PIC_OPERAND_P (operands[1]));
+-      return "mov{l}\t{%1, %0|%0, %1}";
++      /* Output REX prefix if needed.  */
++      if (ix86_output_rex_prefix_p (operands[0], operands[1]))
++	return "rex mov{l}\t{%1, %0|%0, %1}";
++      else
++	return "mov{l}\t{%1, %0|%0, %1}";
+     }
+ }
+   [(set (attr "type")
+@@ -2169,7 +2181,7 @@
+ 	      (const_string "sselog1")
+ 	    (eq_attr "alternative" "7,8,9,10,11")
+ 	      (const_string "ssemov")
+- 	    (match_operand:DI 1 "pic_32bit_operand" "")
++ 	    (match_operand 1 "pic_32bit_operand" "")
+ 	      (const_string "lea")
+ 	   ]
+ 	   (const_string "imov")))
+@@ -3658,6 +3670,17 @@
+    (set_attr "prefix_0f" "0,*,*,*,*,*")
+    (set_attr "mode" "SI,DI,DI,DI,TI,TI")])
+ 
++(define_insn "*zero_extendsidi2_x32"
++  [(set (match_operand:DI 0 "register_operand"  "=r")
++	(zero_extend:DI
++	  (match_operand:SI 1 "x86_64_symbolic_immediate_operand" "")))]
++  "TARGET_X32"
++  "mov\t{%1, %k0|%k0, %1}"
++  [(set_attr "type" "imovx")
++   (set_attr "prefix" "orig")
++   (set_attr "prefix_0f" "0")
++   (set_attr "mode" "SI")])
++
+ (define_split
+   [(set (match_operand:DI 0 "memory_operand" "")
+      	(zero_extend:DI (match_dup 0)))]
+@@ -5686,9 +5709,9 @@
+   [(set_attr "type" "alu")
+    (set_attr "mode" "QI")])
+ 
+-(define_insn "*lea_1"
+-  [(set (match_operand:P 0 "register_operand" "=r")
+-	(match_operand:P 1 "no_seg_address_operand" "p"))]
++(define_insn "*lea<mode>_1"
++  [(set (match_operand:SWI48 0 "register_operand" "=r")
++	(match_operand:SWI48 1 "no_seg_address_operand" "p"))]
+   ""
+   "lea{<imodesuffix>}\t{%a1, %0|%0, %a1}"
+   [(set_attr "type" "lea")
+@@ -5711,11 +5734,20 @@
+   [(set_attr "type" "lea")
+    (set_attr "mode" "SI")])
+ 
++(define_insn "*lea_3_zext"
++  [(set (match_operand:DI 0 "register_operand" "=r")
++	(zero_extend:DI
++	  (match_operand:SI 1 "no_seg_address_operand" "p")))]
++  "TARGET_64BIT"
++  "lea{l}\t{%a1, %k0|%k0, %a1}"
++  [(set_attr "type" "lea")
++   (set_attr "mode" "SI")])
++
+ (define_insn "*add<mode>_1"
+   [(set (match_operand:SWI48 0 "nonimmediate_operand" "=r,rm,r,r")
+ 	(plus:SWI48
+ 	  (match_operand:SWI48 1 "nonimmediate_operand" "%0,0,r,r")
+-	  (match_operand:SWI48 2 "<general_operand>" "<g>,r<i>,0,l<i>")))
++	  (match_operand:SWI48 2 "x86_64_general_operand" "rme,re,0,le")))
+    (clobber (reg:CC FLAGS_REG))]
+   "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)"
+ {
+@@ -5747,7 +5779,11 @@
+       if (x86_maybe_negate_const_int (&operands[2], <MODE>mode))
+         return "sub{<imodesuffix>}\t{%2, %0|%0, %2}";
+ 
+-      return "add{<imodesuffix>}\t{%2, %0|%0, %2}";
++      /* Output REX prefix if needed.  */
++      if (ix86_output_rex_prefix_p (operands[0], operands[2]))
++	return "rex add{<imodesuffix>}\t{%2, %0|%0, %2}";
++      else
++	return "add{<imodesuffix>}\t{%2, %0|%0, %2}";
+     }
+ }
+   [(set (attr "type")
+@@ -5774,7 +5810,7 @@
+   [(set (match_operand:DI 0 "register_operand" "=r,r,r")
+ 	(zero_extend:DI
+ 	  (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,r,r")
+-		   (match_operand:SI 2 "general_operand" "g,0,li"))))
++		   (match_operand:SI 2 "x86_64_general_operand" "rme,0,le"))))
+    (clobber (reg:CC FLAGS_REG))]
+   "TARGET_64BIT && ix86_binary_operator_ok (PLUS, SImode, operands)"
+ {
+@@ -6056,60 +6092,40 @@
+         (const_string "none")))
+    (set_attr "mode" "QI")])
+ 
+-;; Convert lea to the lea pattern to avoid flags dependency.
++;; Convert add to the lea pattern to avoid flags dependency.
+ (define_split
+-  [(set (match_operand 0 "register_operand" "")
+-	(plus (match_operand 1 "register_operand" "")
+-              (match_operand 2 "nonmemory_operand" "")))
++  [(set (match_operand:SWI 0 "register_operand" "")
++	(plus:SWI (match_operand:SWI 1 "register_operand" "")
++		  (match_operand:SWI 2 "<nonmemory_operand>" "")))
+    (clobber (reg:CC FLAGS_REG))]
+   "reload_completed && ix86_lea_for_add_ok (insn, operands)" 
+   [(const_int 0)]
+ {
+   rtx pat;
+-  enum machine_mode mode = GET_MODE (operands[0]);
++  enum machine_mode mode = <MODE>mode;
+ 
+-  /* In -fPIC mode the constructs like (const (unspec [symbol_ref]))
+-     may confuse gen_lowpart.  */
+-  if (mode != Pmode)
++  if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (SImode))
+     {
+-      operands[1] = gen_lowpart (Pmode, operands[1]);
+-      operands[2] = gen_lowpart (Pmode, operands[2]);
++      mode = SImode;
++      operands[0] = gen_lowpart (mode, operands[0]);
++      operands[1] = gen_lowpart (mode, operands[1]);
++      operands[2] = gen_lowpart (mode, operands[2]);
+     }
+ 
+-  pat = gen_rtx_PLUS (Pmode, operands[1], operands[2]);
+-
+-  if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (SImode))
+-    operands[0] = gen_lowpart (SImode, operands[0]);
+-
+-  if (TARGET_64BIT && mode != Pmode)
+-    pat = gen_rtx_SUBREG (SImode, pat, 0);
++  pat = gen_rtx_PLUS (mode, operands[1], operands[2]);
+ 
+   emit_insn (gen_rtx_SET (VOIDmode, operands[0], pat));
+   DONE;
+ })
+ 
+-;; Convert lea to the lea pattern to avoid flags dependency.
+-;; ??? This pattern handles immediate operands that do not satisfy immediate
+-;; operand predicate (LEGITIMATE_CONSTANT_P) in the previous pattern.
+-(define_split
+-  [(set (match_operand:DI 0 "register_operand" "")
+-	(plus:DI (match_operand:DI 1 "register_operand" "")
+-		 (match_operand:DI 2 "x86_64_immediate_operand" "")))
+-   (clobber (reg:CC FLAGS_REG))]
+-  "TARGET_64BIT && reload_completed 
+-   && true_regnum (operands[0]) != true_regnum (operands[1])"
+-  [(set (match_dup 0)
+-	(plus:DI (match_dup 1) (match_dup 2)))])
+-
+-;; Convert lea to the lea pattern to avoid flags dependency.
++;; Convert add to the lea pattern to avoid flags dependency.
+ (define_split
+   [(set (match_operand:DI 0 "register_operand" "")
+ 	(zero_extend:DI
+ 	  (plus:SI (match_operand:SI 1 "register_operand" "")
+-		   (match_operand:SI 2 "nonmemory_operand" ""))))
++		   (match_operand:SI 2 "x86_64_nonmemory_operand" ""))))
+    (clobber (reg:CC FLAGS_REG))]
+-  "TARGET_64BIT && reload_completed
+-   && ix86_lea_for_add_ok (insn, operands)"
++  "TARGET_64BIT && reload_completed && ix86_lea_for_add_ok (insn, operands)"
+   [(set (match_dup 0)
+ 	(zero_extend:DI (subreg:SI (plus:DI (match_dup 1) (match_dup 2)) 0)))]
+ {
+@@ -6163,7 +6179,7 @@
+   [(set (reg FLAGS_REG)
+ 	(compare
+ 	  (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0")
+-		   (match_operand:SI 2 "general_operand" "g"))
++		   (match_operand:SI 2 "x86_64_general_operand" "rme"))
+ 	  (const_int 0)))
+    (set (match_operand:DI 0 "register_operand" "=r")
+ 	(zero_extend:DI (plus:SI (match_dup 1) (match_dup 2))))]
+@@ -6241,7 +6257,7 @@
+ (define_insn "*addsi_3_zext"
+   [(set (reg FLAGS_REG)
+ 	(compare
+-	  (neg:SI (match_operand:SI 2 "general_operand" "g"))
++	  (neg:SI (match_operand:SI 2 "x86_64_general_operand" "rme"))
+ 	  (match_operand:SI 1 "nonimmediate_operand" "%0")))
+    (set (match_operand:DI 0 "register_operand" "=r")
+ 	(zero_extend:DI (plus:SI (match_dup 1) (match_dup 2))))]
+@@ -6504,7 +6520,7 @@
+ 		    (match_operand 2 "register_operand" "r"))
+ 	      (match_operand 3 "immediate_operand" "i")))]
+   "(GET_MODE (operands[0]) == QImode || GET_MODE (operands[0]) == HImode
+-    || (TARGET_64BIT && GET_MODE (operands[0]) == SImode))
++    || (TARGET_LP64 && GET_MODE (operands[0]) == SImode))
+    && (!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
+    && GET_MODE (operands[0]) == GET_MODE (operands[1])
+    && GET_MODE (operands[0]) == GET_MODE (operands[2])
+@@ -6529,35 +6545,13 @@
+   [(set_attr "type" "lea")
+    (set_attr "mode" "SI")])
+ 
+-(define_insn_and_split "*lea_general_1_zext"
+-  [(set (match_operand:DI 0 "register_operand" "=r")
+-	(zero_extend:DI
+-	  (plus:SI (plus:SI
+-		     (match_operand:SI 1 "index_register_operand" "l")
+-		     (match_operand:SI 2 "register_operand" "r"))
+-		   (match_operand:SI 3 "immediate_operand" "i"))))]
+-  "TARGET_64BIT"
+-  "#"
+-  "&& reload_completed"
+-  [(set (match_dup 0)
+-	(zero_extend:DI (subreg:SI (plus:DI (plus:DI (match_dup 1)
+-						     (match_dup 2))
+-					    (match_dup 3)) 0)))]
+-{
+-  operands[1] = gen_lowpart (Pmode, operands[1]);
+-  operands[2] = gen_lowpart (Pmode, operands[2]);
+-  operands[3] = gen_lowpart (Pmode, operands[3]);
+-}
+-  [(set_attr "type" "lea")
+-   (set_attr "mode" "SI")])
+-
+ (define_insn_and_split "*lea_general_2"
+   [(set (match_operand 0 "register_operand" "=r")
+ 	(plus (mult (match_operand 1 "index_register_operand" "l")
+-		    (match_operand 2 "const248_operand" "i"))
++		    (match_operand 2 "const248_operand" "n"))
+ 	      (match_operand 3 "nonmemory_operand" "ri")))]
+   "(GET_MODE (operands[0]) == QImode || GET_MODE (operands[0]) == HImode
+-    || (TARGET_64BIT && GET_MODE (operands[0]) == SImode))
++    || (TARGET_LP64 && GET_MODE (operands[0]) == SImode))
+    && (!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
+    && GET_MODE (operands[0]) == GET_MODE (operands[1])
+    && (GET_MODE (operands[0]) == GET_MODE (operands[3])
+@@ -6580,35 +6574,14 @@
+   [(set_attr "type" "lea")
+    (set_attr "mode" "SI")])
+ 
+-(define_insn_and_split "*lea_general_2_zext"
+-  [(set (match_operand:DI 0 "register_operand" "=r")
+-	(zero_extend:DI
+-	  (plus:SI (mult:SI
+-		     (match_operand:SI 1 "index_register_operand" "l")
+-		     (match_operand:SI 2 "const248_operand" "n"))
+-		   (match_operand:SI 3 "nonmemory_operand" "ri"))))]
+-  "TARGET_64BIT"
+-  "#"
+-  "&& reload_completed"
+-  [(set (match_dup 0)
+-	(zero_extend:DI (subreg:SI (plus:DI (mult:DI (match_dup 1)
+-						     (match_dup 2))
+-					    (match_dup 3)) 0)))]
+-{
+-  operands[1] = gen_lowpart (Pmode, operands[1]);
+-  operands[3] = gen_lowpart (Pmode, operands[3]);
+-}
+-  [(set_attr "type" "lea")
+-   (set_attr "mode" "SI")])
+-
+ (define_insn_and_split "*lea_general_3"
+   [(set (match_operand 0 "register_operand" "=r")
+ 	(plus (plus (mult (match_operand 1 "index_register_operand" "l")
+-			  (match_operand 2 "const248_operand" "i"))
++			  (match_operand 2 "const248_operand" "n"))
+ 		    (match_operand 3 "register_operand" "r"))
+ 	      (match_operand 4 "immediate_operand" "i")))]
+   "(GET_MODE (operands[0]) == QImode || GET_MODE (operands[0]) == HImode
+-    || (TARGET_64BIT && GET_MODE (operands[0]) == SImode))
++    || (TARGET_LP64 && GET_MODE (operands[0]) == SImode))
+    && (!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
+    && GET_MODE (operands[0]) == GET_MODE (operands[1])
+    && GET_MODE (operands[0]) == GET_MODE (operands[3])"
+@@ -6633,31 +6606,6 @@
+ }
+   [(set_attr "type" "lea")
+    (set_attr "mode" "SI")])
+-
+-(define_insn_and_split "*lea_general_3_zext"
+-  [(set (match_operand:DI 0 "register_operand" "=r")
+-	(zero_extend:DI
+-	  (plus:SI (plus:SI
+-		     (mult:SI
+-		       (match_operand:SI 1 "index_register_operand" "l")
+-		       (match_operand:SI 2 "const248_operand" "n"))
+-		     (match_operand:SI 3 "register_operand" "r"))
+-		   (match_operand:SI 4 "immediate_operand" "i"))))]
+-  "TARGET_64BIT"
+-  "#"
+-  "&& reload_completed"
+-  [(set (match_dup 0)
+-	(zero_extend:DI (subreg:SI (plus:DI (plus:DI (mult:DI (match_dup 1)
+-							      (match_dup 2))
+-						     (match_dup 3))
+-					    (match_dup 4)) 0)))]
+-{
+-  operands[1] = gen_lowpart (Pmode, operands[1]);
+-  operands[3] = gen_lowpart (Pmode, operands[3]);
+-  operands[4] = gen_lowpart (Pmode, operands[4]);
+-}
+-  [(set_attr "type" "lea")
+-   (set_attr "mode" "SI")])
+ 
+ ;; Subtract instructions
+ 
+@@ -6705,7 +6653,7 @@
+   [(set (match_operand:DI 0 "register_operand" "=r")
+ 	(zero_extend:DI
+ 	  (minus:SI (match_operand:SI 1 "register_operand" "0")
+-		    (match_operand:SI 2 "general_operand" "g"))))
++		    (match_operand:SI 2 "x86_64_general_operand" "rme"))))
+    (clobber (reg:CC FLAGS_REG))]
+   "TARGET_64BIT && ix86_binary_operator_ok (MINUS, SImode, operands)"
+   "sub{l}\t{%2, %k0|%k0, %2}"
+@@ -6742,7 +6690,7 @@
+   [(set (reg FLAGS_REG)
+ 	(compare
+ 	  (minus:SI (match_operand:SI 1 "register_operand" "0")
+-		    (match_operand:SI 2 "general_operand" "g"))
++		    (match_operand:SI 2 "x86_64_general_operand" "rme"))
+ 	  (const_int 0)))
+    (set (match_operand:DI 0 "register_operand" "=r")
+ 	(zero_extend:DI
+@@ -6769,7 +6717,7 @@
+ (define_insn "*subsi_3_zext"
+   [(set (reg FLAGS_REG)
+ 	(compare (match_operand:SI 1 "register_operand" "0")
+-		 (match_operand:SI 2 "general_operand" "g")))
++		 (match_operand:SI 2 "x86_64_general_operand" "rme")))
+    (set (match_operand:DI 0 "register_operand" "=r")
+ 	(zero_extend:DI
+ 	  (minus:SI (match_dup 1)
+@@ -6816,7 +6764,7 @@
+ 	  (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0")
+ 		   (plus:SI (match_operator 3 "ix86_carry_flag_operator"
+ 			     [(reg FLAGS_REG) (const_int 0)])
+-			    (match_operand:SI 2 "general_operand" "g")))))
++			    (match_operand:SI 2 "x86_64_general_operand" "rme")))))
+    (clobber (reg:CC FLAGS_REG))]
+   "TARGET_64BIT && ix86_binary_operator_ok (PLUS, SImode, operands)"
+   "adc{l}\t{%2, %k0|%k0, %2}"
+@@ -6831,7 +6779,7 @@
+ 	  (minus:SI (match_operand:SI 1 "register_operand" "0")
+ 		    (plus:SI (match_operator 3 "ix86_carry_flag_operator"
+ 			      [(reg FLAGS_REG) (const_int 0)])
+-			     (match_operand:SI 2 "general_operand" "g")))))
++			     (match_operand:SI 2 "x86_64_general_operand" "rme")))))
+    (clobber (reg:CC FLAGS_REG))]
+   "TARGET_64BIT && ix86_binary_operator_ok (MINUS, SImode, operands)"
+   "sbb{l}\t{%2, %k0|%k0, %2}"
+@@ -6885,7 +6833,7 @@
+ 	(compare:CCC
+ 	  (plusminus:SI
+ 	    (match_operand:SI 1 "nonimmediate_operand" "<comm>0")
+-	    (match_operand:SI 2 "general_operand" "g"))
++	    (match_operand:SI 2 "x86_64_general_operand" "rme"))
+ 	  (match_dup 1)))
+    (set (match_operand:DI 0 "register_operand" "=r")
+ 	(zero_extend:DI (plusminus:SI (match_dup 1) (match_dup 2))))]
+@@ -6972,7 +6920,7 @@
+   [(set (match_operand:DI 0 "register_operand" "=r,r,r")
+ 	(zero_extend:DI
+ 	  (mult:SI (match_operand:SI 1 "nonimmediate_operand" "%rm,rm,0")
+-		   (match_operand:SI 2 "general_operand" "K,i,mr"))))
++		   (match_operand:SI 2 "x86_64_general_operand" "K,e,mr"))))
+    (clobber (reg:CC FLAGS_REG))]
+   "TARGET_64BIT
+    && !(MEM_P (operands[1]) && MEM_P (operands[2]))"
+@@ -7598,7 +7546,7 @@
+   [(set (reg:CCNO FLAGS_REG)
+ 	(compare:CCNO
+ 	  (and:SI (match_operand:SI 0 "nonimmediate_operand" "")
+-		  (match_operand:SI 1 "nonmemory_operand" ""))
++		  (match_operand:SI 1 "x86_64_nonmemory_operand" ""))
+ 	  (const_int 0)))])
+ 
+ (define_expand "testqi_ccz_1"
+@@ -7664,7 +7612,7 @@
+ 	(compare
+ 	 (and:SWI124
+ 	  (match_operand:SWI124 0 "nonimmediate_operand" "%!*a,<r>,<r>m")
+-	  (match_operand:SWI124 1 "general_operand" "<i>,<i>,<r><i>"))
++	  (match_operand:SWI124 1 "<general_operand>" "<i>,<i>,<r><i>"))
+ 	 (const_int 0)))]
+   "ix86_match_ccmode (insn, CCNOmode)
+    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
+@@ -7954,7 +7902,7 @@
+ (define_insn "*andsi_1"
+   [(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r,r")
+ 	(and:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,qm")
+-		(match_operand:SI 2 "general_operand" "ri,rm,L")))
++		(match_operand:SI 2 "x86_64_general_operand" "re,rm,L")))
+    (clobber (reg:CC FLAGS_REG))]
+   "ix86_binary_operator_ok (AND, SImode, operands)"
+ {
+@@ -8001,7 +7949,7 @@
+   [(set (match_operand:DI 0 "register_operand" "=r")
+ 	(zero_extend:DI
+ 	  (and:SI (match_operand:SI 1 "nonimmediate_operand" "%0")
+-		  (match_operand:SI 2 "general_operand" "g"))))
++		  (match_operand:SI 2 "x86_64_general_operand" "rme"))))
+    (clobber (reg:CC FLAGS_REG))]
+   "TARGET_64BIT && ix86_binary_operator_ok (AND, SImode, operands)"
+   "and{l}\t{%2, %k0|%k0, %2}"
+@@ -8149,7 +8097,7 @@
+   [(set (reg FLAGS_REG)
+ 	(compare (and:SWI124
+ 		  (match_operand:SWI124 1 "nonimmediate_operand" "%0,0")
+-		  (match_operand:SWI124 2 "general_operand" "<g>,<r><i>"))
++		  (match_operand:SWI124 2 "<general_operand>" "<g>,<r><i>"))
+ 		 (const_int 0)))
+    (set (match_operand:SWI124 0 "nonimmediate_operand" "=<r>,<r>m")
+ 	(and:SWI124 (match_dup 1) (match_dup 2)))]
+@@ -8164,7 +8112,7 @@
+   [(set (reg FLAGS_REG)
+ 	(compare (and:SI
+ 		  (match_operand:SI 1 "nonimmediate_operand" "%0")
+-		  (match_operand:SI 2 "general_operand" "g"))
++		  (match_operand:SI 2 "x86_64_general_operand" "rme"))
+ 		 (const_int 0)))
+    (set (match_operand:DI 0 "register_operand" "=r")
+ 	(zero_extend:DI (and:SI (match_dup 1) (match_dup 2))))]
+@@ -8381,7 +8329,7 @@
+   [(set (match_operand:DI 0 "register_operand" "=r")
+ 	(zero_extend:DI
+ 	 (any_or:SI (match_operand:SI 1 "nonimmediate_operand" "%0")
+-		    (match_operand:SI 2 "general_operand" "g"))))
++		    (match_operand:SI 2 "x86_64_general_operand" "rme"))))
+    (clobber (reg:CC FLAGS_REG))]
+   "TARGET_64BIT && ix86_binary_operator_ok (<CODE>, SImode, operands)"
+   "<logic>{l}\t{%2, %k0|%k0, %2}"
+@@ -8429,7 +8377,7 @@
+ (define_insn "*<code>si_2_zext"
+   [(set (reg FLAGS_REG)
+ 	(compare (any_or:SI (match_operand:SI 1 "nonimmediate_operand" "%0")
+-			    (match_operand:SI 2 "general_operand" "g"))
++			    (match_operand:SI 2 "x86_64_general_operand" "rme"))
+ 		 (const_int 0)))
+    (set (match_operand:DI 0 "register_operand" "=r")
+ 	(zero_extend:DI (any_or:SI (match_dup 1) (match_dup 2))))]
+@@ -9619,7 +9567,7 @@
+        (const_string "*")))
+    (set_attr "mode" "QI")])
+ 
+-;; Convert lea to the lea pattern to avoid flags dependency.
++;; Convert ashift to the lea pattern to avoid flags dependency.
+ (define_split
+   [(set (match_operand 0 "register_operand" "")
+ 	(ashift (match_operand 1 "index_register_operand" "")
+@@ -9632,23 +9580,22 @@
+   rtx pat;
+   enum machine_mode mode = GET_MODE (operands[0]);
+ 
+-  if (mode != Pmode)
+-    operands[1] = gen_lowpart (Pmode, operands[1]);
+-  operands[2] = gen_int_mode (1 << INTVAL (operands[2]), Pmode);
+-
+-  pat = gen_rtx_MULT (Pmode, operands[1], operands[2]);
+-
+   if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (SImode))
+-    operands[0] = gen_lowpart (SImode, operands[0]);
++    {
++      mode = SImode;
++      operands[0] = gen_lowpart (mode, operands[0]);
++      operands[1] = gen_lowpart (mode, operands[1]);
++    }
+ 
+-  if (TARGET_64BIT && mode != Pmode)
+-    pat = gen_rtx_SUBREG (SImode, pat, 0);
++  operands[2] = gen_int_mode (1 << INTVAL (operands[2]), mode);
++
++  pat = gen_rtx_MULT (mode, operands[1], operands[2]);
+ 
+   emit_insn (gen_rtx_SET (VOIDmode, operands[0], pat));
+   DONE;
+ })
+ 
+-;; Convert lea to the lea pattern to avoid flags dependency.
++;; Convert ashift to the lea pattern to avoid flags dependency.
+ (define_split
+   [(set (match_operand:DI 0 "register_operand" "")
+ 	(zero_extend:DI
+@@ -10585,7 +10532,7 @@
+ 	  (zero_extract:SWI48
+ 	    (match_operand:SWI48 0 "register_operand" "r")
+ 	    (const_int 1)
+-	    (match_operand:SWI48 1 "nonmemory_operand" "rN"))
++	    (match_operand:SWI48 1 "x86_64_nonmemory_operand" "rN"))
+ 	  (const_int 0)))]
+   "TARGET_USE_BT || optimize_function_for_size_p (cfun)"
+   "bt{<imodesuffix>}\t{%1, %0|%0, %1}"
+@@ -11192,19 +11139,19 @@
+    (set_attr "modrm" "0")])
+ 
+ (define_expand "indirect_jump"
+-  [(set (pc) (match_operand 0 "nonimmediate_operand" ""))]
++  [(set (pc) (match_operand 0 "indirect_branch_operand" ""))]
+   ""
+   "")
+ 
+ (define_insn "*indirect_jump"
+-  [(set (pc) (match_operand:P 0 "nonimmediate_operand" "rm"))]
++  [(set (pc) (match_operand:P 0 "indirect_branch_operand" "rw"))]
+   ""
+   "jmp\t%A0"
+   [(set_attr "type" "ibr")
+    (set_attr "length_immediate" "0")])
+ 
+ (define_expand "tablejump"
+-  [(parallel [(set (pc) (match_operand 0 "nonimmediate_operand" ""))
++  [(parallel [(set (pc) (match_operand 0 "indirect_branch_operand" ""))
+ 	      (use (label_ref (match_operand 1 "" "")))])]
+   ""
+ {
+@@ -11242,7 +11189,7 @@
+ })
+ 
+ (define_insn "*tablejump_1"
+-  [(set (pc) (match_operand:P 0 "nonimmediate_operand" "rm"))
++  [(set (pc) (match_operand:P 0 "indirect_branch_operand" "rw"))
+    (use (label_ref (match_operand 1 "" "")))]
+   ""
+   "jmp\t%A0"
+@@ -11484,7 +11431,7 @@
+   [(set_attr "type" "call")])
+ 
+ (define_insn_and_split "*call_1_rex64_vzeroupper"
+-  [(call (mem:QI (match_operand:DI 0 "call_insn_operand" "rzm"))
++  [(call (mem:QI (match_operand:P 0 "call_insn_operand" "rzw"))
+ 	 (match_operand 1 "" ""))
+    (unspec [(match_operand 2 "const_int_operand" "")]
+    	   UNSPEC_CALL_NEEDS_VZEROUPPER)]
+@@ -11497,7 +11444,7 @@
+   [(set_attr "type" "call")])
+ 
+ (define_insn "*call_1_rex64"
+-  [(call (mem:QI (match_operand:DI 0 "call_insn_operand" "rzm"))
++  [(call (mem:QI (match_operand:P 0 "call_insn_operand" "rzw"))
+ 	 (match_operand 1 "" ""))]
+   "TARGET_64BIT && !SIBLING_CALL_P (insn)
+    && ix86_cmodel != CM_LARGE && ix86_cmodel != CM_LARGE_PIC"
+@@ -11570,7 +11517,7 @@
+   [(set_attr "type" "call")])
+ 
+ (define_insn_and_split "*sibcall_1_rex64_vzeroupper"
+-  [(call (mem:QI (match_operand:DI 0 "sibcall_insn_operand" "z,U"))
++  [(call (mem:QI (match_operand:P 0 "sibcall_insn_operand" "z,U"))
+ 	 (match_operand 1 "" ""))
+    (unspec [(match_operand 2 "const_int_operand" "")]
+    	   UNSPEC_CALL_NEEDS_VZEROUPPER)]
+@@ -11582,7 +11529,7 @@
+   [(set_attr "type" "call")])
+ 
+ (define_insn "*sibcall_1_rex64"
+-  [(call (mem:QI (match_operand:DI 0 "sibcall_insn_operand" "z,U"))
++  [(call (mem:QI (match_operand:P 0 "sibcall_insn_operand" "z,U"))
+ 	 (match_operand 1 "" ""))]
+   "TARGET_64BIT && SIBLING_CALL_P (insn)"
+   { return ix86_output_call_insn (insn, operands[0], 0); }
+@@ -11862,7 +11809,7 @@
+ 	(unspec:DI
+ 	  [(label_ref (match_operand 1 "" ""))]
+ 	  UNSPEC_SET_GOT_OFFSET))]
+-  "TARGET_64BIT"
++  "TARGET_LP64"
+   "movabs{q}\t{$_GLOBAL_OFFSET_TABLE_-%l1, %0|%0, OFFSET FLAT:_GLOBAL_OFFSET_TABLE_-%l1}"
+   [(set_attr "type" "imov")
+    (set_attr "length_immediate" "0")
+@@ -12597,22 +12544,33 @@
+   operands[3] = ix86_tls_get_addr ();
+ })
+ 
+-(define_insn "*tls_global_dynamic_64"
+-  [(set (match_operand:DI 0 "register_operand" "=a")
+-	(call:DI (mem:QI (match_operand:DI 2 "call_insn_operand" ""))
+-		 (match_operand:DI 3 "" "")))
+-   (unspec:DI [(match_operand:DI 1 "tls_symbolic_operand" "")]
+-	      UNSPEC_TLS_GD)]
++(define_insn "*tls_global_dynamic_<x86_64_mode>"
++  [(set (match_operand:P 0 "register_operand" "=a")
++	(call:P (mem:QI (match_operand:P 2 "call_insn_operand" ""))
++		(match_operand:P 3 "" "")))
++   (unspec:P [(match_operand:P 1 "tls_symbolic_operand" "")]
++	     UNSPEC_TLS_GD)]
+   "TARGET_64BIT"
+-  { return ASM_BYTE "0x66\n\tlea{q}\t{%a1@tlsgd(%%rip), %%rdi|rdi, %a1@tlsgd[rip]}\n" ASM_SHORT "0x6666\n\trex64\n\tcall\t%P2"; }
++{
++  if (!TARGET_X32)
++    fputs (ASM_BYTE "0x66\n", asm_out_file);
++  output_asm_insn
++    ("lea{q}\t{%a1@tlsgd(%%rip), %%rdi|rdi, %a1@tlsgd[rip]}", operands);
++  fputs (ASM_SHORT "0x6666\n", asm_out_file);
++  fputs ("\trex64\n", asm_out_file);
++  if (TARGET_SUN_TLS)
++    return "call\t%p2@plt";
++  return "call\t%P2";
++}
+   [(set_attr "type" "multi")
+-   (set_attr "length" "16")])
++   (set (attr "length")
++	(symbol_ref "TARGET_X32 ? 15 : 16"))])
+ 
+-(define_expand "tls_global_dynamic_64"
+-  [(parallel [(set (match_operand:DI 0 "register_operand" "")
+-		   (call:DI (mem:QI (match_dup 2)) (const_int 0)))
+-	      (unspec:DI [(match_operand:DI 1 "tls_symbolic_operand" "")]
+-			 UNSPEC_TLS_GD)])]
++(define_expand "tls_global_dynamic_<x86_64_mode>"
++  [(parallel [(set (match_operand:P 0 "register_operand" "")
++		   (call:P (mem:QI (match_dup 2)) (const_int 0)))
++	      (unspec:P [(match_operand:P 1 "tls_symbolic_operand" "")]
++			UNSPEC_TLS_GD)])]
+   ""
+ {
+   if (TARGET_GNU2_TLS)
+@@ -12662,20 +12620,20 @@
+   operands[2] = ix86_tls_get_addr ();
+ })
+ 
+-(define_insn "*tls_local_dynamic_base_64"
+-  [(set (match_operand:DI 0 "register_operand" "=a")
+-	(call:DI (mem:QI (match_operand:DI 1 "call_insn_operand" ""))
+-		 (match_operand:DI 2 "" "")))
+-   (unspec:DI [(const_int 0)] UNSPEC_TLS_LD_BASE)]
++(define_insn "*tls_local_dynamic_base_<x86_64_mode>"
++  [(set (match_operand:P 0 "register_operand" "=a")
++	(call:P (mem:QI (match_operand:P 1 "call_insn_operand" ""))
++		(match_operand:P 2 "" "")))
++   (unspec:P [(const_int 0)] UNSPEC_TLS_LD_BASE)]
+   "TARGET_64BIT"
+   "lea{q}\t{%&@tlsld(%%rip), %%rdi|rdi, %&@tlsld[rip]}\;call\t%P1"
+   [(set_attr "type" "multi")
+    (set_attr "length" "12")])
+ 
+-(define_expand "tls_local_dynamic_base_64"
+-  [(parallel [(set (match_operand:DI 0 "register_operand" "")
+-		   (call:DI (mem:QI (match_dup 1)) (const_int 0)))
+-	      (unspec:DI [(const_int 0)] UNSPEC_TLS_LD_BASE)])]
++(define_expand "tls_local_dynamic_base_<x86_64_mode>"
++  [(parallel [(set (match_operand:P 0 "register_operand" "")
++		   (call:P (mem:QI (match_dup 1)) (const_int 0)))
++	      (unspec:P [(const_int 0)] UNSPEC_TLS_LD_BASE)])]
+   ""
+ {
+   if (TARGET_GNU2_TLS)
+@@ -12714,11 +12672,33 @@
+ ;; Segment register for the thread base ptr load
+ (define_mode_attr tp_seg [(SI "gs") (DI "fs")])
+ 
+-;; Load and add the thread base pointer from %gs:0.
++;; Load and add the thread base pointer from %<tp_seg>:0.
++(define_insn "*load_tp_x32"
++  [(set (match_operand:SI 0 "register_operand" "=r")
++	(unspec:SI [(const_int 0)] UNSPEC_TP))]
++  "TARGET_X32"
++  "mov{l}\t{%%fs:0, %0|%0, DWORD PTR fs:0}"
++  [(set_attr "type" "imov")
++   (set_attr "modrm" "0")
++   (set_attr "length" "7")
++   (set_attr "memory" "load")
++   (set_attr "imm_disp" "false")])
++
++(define_insn "*load_tp_x32_zext"
++  [(set (match_operand:DI 0 "register_operand" "=r")
++	(zero_extend:DI (unspec:SI [(const_int 0)] UNSPEC_TP)))]
++  "TARGET_X32"
++  "mov{l}\t{%%fs:0, %k0|%k0, DWORD PTR fs:0}"
++  [(set_attr "type" "imov")
++   (set_attr "modrm" "0")
++   (set_attr "length" "7")
++   (set_attr "memory" "load")
++   (set_attr "imm_disp" "false")])
++
+ (define_insn "*load_tp_<mode>"
+   [(set (match_operand:P 0 "register_operand" "=r")
+ 	(unspec:P [(const_int 0)] UNSPEC_TP))]
+-  ""
++  "!TARGET_X32"
+   "mov{<imodesuffix>}\t{%%<tp_seg>:0, %0|%0, <iptrsize> PTR <tp_seg>:0}"
+   [(set_attr "type" "imov")
+    (set_attr "modrm" "0")
+@@ -12726,12 +12706,39 @@
+    (set_attr "memory" "load")
+    (set_attr "imm_disp" "false")])
+ 
++(define_insn "*add_tp_x32"
++  [(set (match_operand:SI 0 "register_operand" "=r")
++	(plus:SI (unspec:SI [(const_int 0)] UNSPEC_TP)
++		 (match_operand:SI 1 "register_operand" "0")))
++   (clobber (reg:CC FLAGS_REG))]
++  "TARGET_X32"
++  "add{l}\t{%%fs:0, %0|%0, DWORD PTR fs:0}"
++  [(set_attr "type" "alu")
++   (set_attr "modrm" "0")
++   (set_attr "length" "7")
++   (set_attr "memory" "load")
++   (set_attr "imm_disp" "false")])
++
++(define_insn "*add_tp_x32_zext"
++  [(set (match_operand:DI 0 "register_operand" "=r")
++	(zero_extend:DI
++	  (plus:SI (unspec:SI [(const_int 0)] UNSPEC_TP)
++		   (match_operand:SI 1 "register_operand" "0"))))
++   (clobber (reg:CC FLAGS_REG))]
++  "TARGET_X32"
++  "add{l}\t{%%fs:0, %k0|%k0, DWORD PTR fs:0}"
++  [(set_attr "type" "alu")
++   (set_attr "modrm" "0")
++   (set_attr "length" "7")
++   (set_attr "memory" "load")
++   (set_attr "imm_disp" "false")])
++
+ (define_insn "*add_tp_<mode>"
+   [(set (match_operand:P 0 "register_operand" "=r")
+ 	(plus:P (unspec:P [(const_int 0)] UNSPEC_TP)
+ 		(match_operand:P 1 "register_operand" "0")))
+    (clobber (reg:CC FLAGS_REG))]
+-  ""
++  "!TARGET_X32"
+   "add{<imodesuffix>}\t{%%<tp_seg>:0, %0|%0, <iptrsize> PTR <tp_seg>:0}"
+   [(set_attr "type" "alu")
+    (set_attr "modrm" "0")
+@@ -15778,20 +15785,25 @@
+   "ix86_current_function_needs_cld = 1;")
+ 
+ (define_insn "*rep_movdi_rex64"
+-  [(set (match_operand:DI 2 "register_operand" "=c") (const_int 0))
+-   (set (match_operand:DI 0 "register_operand" "=D")
+-        (plus:DI (ashift:DI (match_operand:DI 5 "register_operand" "2")
+-			    (const_int 3))
+-		 (match_operand:DI 3 "register_operand" "0")))
+-   (set (match_operand:DI 1 "register_operand" "=S")
+-        (plus:DI (ashift:DI (match_dup 5) (const_int 3))
+-		 (match_operand:DI 4 "register_operand" "1")))
++  [(set (match_operand:P 2 "register_operand" "=c") (const_int 0))
++   (set (match_operand:P 0 "register_operand" "=D")
++        (plus:P (ashift:P (match_operand:P 5 "register_operand" "2")
++			  (const_int 3))
++		 (match_operand:P 3 "register_operand" "0")))
++   (set (match_operand:P 1 "register_operand" "=S")
++        (plus:P (ashift:P (match_dup 5) (const_int 3))
++		(match_operand:P 4 "register_operand" "1")))
+    (set (mem:BLK (match_dup 3))
+ 	(mem:BLK (match_dup 4)))
+    (use (match_dup 5))]
+   "TARGET_64BIT
+    && !(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])"
+-  "rep{%;} movsq"
++{
++  if (Pmode == SImode)
++    return "addr32{%;} rep{%;} movsq";
++  else
++    return "rep{%;} movsq";
++}
+   [(set_attr "type" "str")
+    (set_attr "prefix_rep" "1")
+    (set_attr "memory" "both")
+@@ -15810,7 +15822,12 @@
+ 	(mem:BLK (match_dup 4)))
+    (use (match_dup 5))]
+   "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])"
+-  "rep{%;} movs{l|d}"
++{
++  if (word_mode == DImode && Pmode == SImode)
++    return "addr32{%;} rep{%;} movs{l|d}";
++  else
++    return "rep{%;} movs{l|d}";
++}
+   [(set_attr "type" "str")
+    (set_attr "prefix_rep" "1")
+    (set_attr "memory" "both")
+@@ -15827,7 +15844,12 @@
+ 	(mem:BLK (match_dup 4)))
+    (use (match_dup 5))]
+   "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])"
+-  "rep{%;} movsb"
++{
++  if (word_mode == DImode && Pmode == SImode)
++    return "addr32{%;} rep{%;} movsb";
++  else
++    return "rep{%;} movsb";
++}
+   [(set_attr "type" "str")
+    (set_attr "prefix_rep" "1")
+    (set_attr "memory" "both")
+@@ -15952,18 +15974,23 @@
+   "ix86_current_function_needs_cld = 1;")
+ 
+ (define_insn "*rep_stosdi_rex64"
+-  [(set (match_operand:DI 1 "register_operand" "=c") (const_int 0))
+-   (set (match_operand:DI 0 "register_operand" "=D")
+-        (plus:DI (ashift:DI (match_operand:DI 4 "register_operand" "1")
+-			    (const_int 3))
+-		 (match_operand:DI 3 "register_operand" "0")))
++  [(set (match_operand:P 1 "register_operand" "=c") (const_int 0))
++   (set (match_operand:P 0 "register_operand" "=D")
++        (plus:P (ashift:P (match_operand:P 4 "register_operand" "1")
++			  (const_int 3))
++		 (match_operand:P 3 "register_operand" "0")))
+    (set (mem:BLK (match_dup 3))
+ 	(const_int 0))
+    (use (match_operand:DI 2 "register_operand" "a"))
+    (use (match_dup 4))]
+   "TARGET_64BIT
+    && !(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])"
+-  "rep{%;} stosq"
++{
++  if (Pmode == SImode)
++    return "addr32{%;} rep{%;} stosq";
++  else
++    return "rep{%;} stosq";
++}
+   [(set_attr "type" "str")
+    (set_attr "prefix_rep" "1")
+    (set_attr "memory" "store")
+@@ -15980,7 +16007,12 @@
+    (use (match_operand:SI 2 "register_operand" "a"))
+    (use (match_dup 4))]
+   "!(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])"
+-  "rep{%;} stos{l|d}"
++{
++  if (word_mode == DImode && Pmode == SImode)
++    return "addr32{%;} rep{%;} stos{l|d}";
++  else
++    return "rep{%;} stos{l|d}";
++}
+   [(set_attr "type" "str")
+    (set_attr "prefix_rep" "1")
+    (set_attr "memory" "store")
+@@ -15996,7 +16028,12 @@
+    (use (match_operand:QI 2 "register_operand" "a"))
+    (use (match_dup 4))]
+   "!(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])"
+-  "rep{%;} stosb"
++{
++  if (word_mode == DImode && Pmode == SImode)
++    return "addr32{%;} rep{%;} stosb";
++  else
++    return "rep{%;} stosb";
++}
+   [(set_attr "type" "str")
+    (set_attr "prefix_rep" "1")
+    (set_attr "memory" "store")
+@@ -16117,7 +16154,12 @@
+    (clobber (match_operand:P 1 "register_operand" "=D"))
+    (clobber (match_operand:P 2 "register_operand" "=c"))]
+   "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])"
+-  "repz{%;} cmpsb"
++{
++  if (word_mode == DImode && Pmode == SImode)
++    return "addr32{%;} repz{%;} cmpsb";
++  else
++    return "repz{%;} cmpsb";
++}
+   [(set_attr "type" "str")
+    (set_attr "mode" "QI")
+    (set (attr "prefix_rex")
+@@ -16157,7 +16199,12 @@
+    (clobber (match_operand:P 1 "register_operand" "=D"))
+    (clobber (match_operand:P 2 "register_operand" "=c"))]
+   "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])"
+-  "repz{%;} cmpsb"
++{
++  if (word_mode == DImode && Pmode == SImode)
++    return "addr32{%;} repz{%;} cmpsb";
++  else
++    return "repz{%;} cmpsb";
++}
+   [(set_attr "type" "str")
+    (set_attr "mode" "QI")
+    (set (attr "prefix_rex")
+@@ -16198,7 +16245,12 @@
+    (clobber (match_operand:P 1 "register_operand" "=D"))
+    (clobber (reg:CC FLAGS_REG))]
+   "!(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])"
+-  "repnz{%;} scasb"
++{
++  if (word_mode == DImode && Pmode == SImode)
++    return "addr32{%;} repnz{%;} scasb";
++  else
++    return "repnz{%;} scasb";
++}
+   [(set_attr "type" "str")
+    (set_attr "mode" "QI")
+    (set (attr "prefix_rex")
+@@ -16290,8 +16342,8 @@
+ (define_expand "mov<mode>cc"
+   [(set (match_operand:SWIM 0 "register_operand" "")
+ 	(if_then_else:SWIM (match_operand 1 "ordered_comparison_operator" "")
+-			   (match_operand:SWIM 2 "general_operand" "")
+-			   (match_operand:SWIM 3 "general_operand" "")))]
++			   (match_operand:SWIM 2 "<general_operand>" "")
++			   (match_operand:SWIM 3 "<general_operand>" "")))]
+   ""
+   "if (ix86_expand_int_movcc (operands)) DONE; else FAIL;")
+ 
+@@ -17271,131 +17323,131 @@
+ ;; alternative when no register is available later.
+ 
+ (define_peephole2
+-  [(match_scratch:P 1 "r")
++  [(match_scratch:W 1 "r")
+    (parallel [(set (reg:P SP_REG)
+ 		   (plus:P (reg:P SP_REG)
+ 			   (match_operand:P 0 "const_int_operand" "")))
+ 	      (clobber (reg:CC FLAGS_REG))
+ 	      (clobber (mem:BLK (scratch)))])]
+   "(TARGET_SINGLE_PUSH || optimize_insn_for_size_p ())
+-   && INTVAL (operands[0]) == -GET_MODE_SIZE (Pmode)"
++   && INTVAL (operands[0]) == -GET_MODE_SIZE (word_mode)"
+   [(clobber (match_dup 1))
+-   (parallel [(set (mem:P (pre_dec:P (reg:P SP_REG))) (match_dup 1))
++   (parallel [(set (mem:W (pre_dec:P (reg:P SP_REG))) (match_dup 1))
+ 	      (clobber (mem:BLK (scratch)))])])
+ 
+ (define_peephole2
+-  [(match_scratch:P 1 "r")
++  [(match_scratch:W 1 "r")
+    (parallel [(set (reg:P SP_REG)
+ 		   (plus:P (reg:P SP_REG)
+ 			   (match_operand:P 0 "const_int_operand" "")))
+ 	      (clobber (reg:CC FLAGS_REG))
+ 	      (clobber (mem:BLK (scratch)))])]
+   "(TARGET_DOUBLE_PUSH || optimize_insn_for_size_p ())
+-   && INTVAL (operands[0]) == -2*GET_MODE_SIZE (Pmode)"
++   && INTVAL (operands[0]) == -2*GET_MODE_SIZE (word_mode)"
+   [(clobber (match_dup 1))
+-   (set (mem:P (pre_dec:P (reg:P SP_REG))) (match_dup 1))
+-   (parallel [(set (mem:P (pre_dec:P (reg:P SP_REG))) (match_dup 1))
++   (set (mem:W (pre_dec:P (reg:P SP_REG))) (match_dup 1))
++   (parallel [(set (mem:W (pre_dec:P (reg:P SP_REG))) (match_dup 1))
+ 	      (clobber (mem:BLK (scratch)))])])
+ 
+ ;; Convert esp subtractions to push.
+ (define_peephole2
+-  [(match_scratch:P 1 "r")
++  [(match_scratch:W 1 "r")
+    (parallel [(set (reg:P SP_REG)
+ 		   (plus:P (reg:P SP_REG)
+ 			   (match_operand:P 0 "const_int_operand" "")))
+ 	      (clobber (reg:CC FLAGS_REG))])]
+   "(TARGET_SINGLE_PUSH || optimize_insn_for_size_p ())
+-   && INTVAL (operands[0]) == -GET_MODE_SIZE (Pmode)"
++   && INTVAL (operands[0]) == -GET_MODE_SIZE (word_mode)"
+   [(clobber (match_dup 1))
+-   (set (mem:P (pre_dec:P (reg:P SP_REG))) (match_dup 1))])
++   (set (mem:W (pre_dec:P (reg:P SP_REG))) (match_dup 1))])
+ 
+ (define_peephole2
+-  [(match_scratch:P 1 "r")
++  [(match_scratch:W 1 "r")
+    (parallel [(set (reg:P SP_REG)
+ 		   (plus:P (reg:P SP_REG)
+ 			   (match_operand:P 0 "const_int_operand" "")))
+ 	      (clobber (reg:CC FLAGS_REG))])]
+   "(TARGET_DOUBLE_PUSH || optimize_insn_for_size_p ())
+-   && INTVAL (operands[0]) == -2*GET_MODE_SIZE (Pmode)"
++   && INTVAL (operands[0]) == -2*GET_MODE_SIZE (word_mode)"
+   [(clobber (match_dup 1))
+-   (set (mem:P (pre_dec:P (reg:P SP_REG))) (match_dup 1))
+-   (set (mem:P (pre_dec:P (reg:P SP_REG))) (match_dup 1))])
++   (set (mem:W (pre_dec:P (reg:P SP_REG))) (match_dup 1))
++   (set (mem:W (pre_dec:P (reg:P SP_REG))) (match_dup 1))])
+ 
+ ;; Convert epilogue deallocator to pop.
+ (define_peephole2
+-  [(match_scratch:P 1 "r")
++  [(match_scratch:W 1 "r")
+    (parallel [(set (reg:P SP_REG)
+ 		   (plus:P (reg:P SP_REG)
+ 			   (match_operand:P 0 "const_int_operand" "")))
+ 	      (clobber (reg:CC FLAGS_REG))
+ 	      (clobber (mem:BLK (scratch)))])]
+   "(TARGET_SINGLE_POP || optimize_insn_for_size_p ())
+-   && INTVAL (operands[0]) == GET_MODE_SIZE (Pmode)"
+-  [(parallel [(set (match_dup 1) (mem:P (post_inc:P (reg:P SP_REG))))
++   && INTVAL (operands[0]) == GET_MODE_SIZE (word_mode)"
++  [(parallel [(set (match_dup 1) (mem:W (post_inc:P (reg:P SP_REG))))
+ 	      (clobber (mem:BLK (scratch)))])])
+ 
+ ;; Two pops case is tricky, since pop causes dependency
+ ;; on destination register.  We use two registers if available.
+ (define_peephole2
+-  [(match_scratch:P 1 "r")
+-   (match_scratch:P 2 "r")
++  [(match_scratch:W 1 "r")
++   (match_scratch:W 2 "r")
+    (parallel [(set (reg:P SP_REG)
+ 		   (plus:P (reg:P SP_REG)
+ 			   (match_operand:P 0 "const_int_operand" "")))
+ 	      (clobber (reg:CC FLAGS_REG))
+ 	      (clobber (mem:BLK (scratch)))])]
+   "(TARGET_DOUBLE_POP || optimize_insn_for_size_p ())
+-   && INTVAL (operands[0]) == 2*GET_MODE_SIZE (Pmode)"
+-  [(parallel [(set (match_dup 1) (mem:P (post_inc:P (reg:P SP_REG))))
++   && INTVAL (operands[0]) == 2*GET_MODE_SIZE (word_mode)"
++  [(parallel [(set (match_dup 1) (mem:W (post_inc:P (reg:P SP_REG))))
+ 	      (clobber (mem:BLK (scratch)))])
+-   (set (match_dup 2) (mem:P (post_inc:P (reg:P SP_REG))))])
++   (set (match_dup 2) (mem:W (post_inc:P (reg:P SP_REG))))])
+ 
+ (define_peephole2
+-  [(match_scratch:P 1 "r")
++  [(match_scratch:W 1 "r")
+    (parallel [(set (reg:P SP_REG)
+ 		   (plus:P (reg:P SP_REG)
+ 			   (match_operand:P 0 "const_int_operand" "")))
+ 	      (clobber (reg:CC FLAGS_REG))
+ 	      (clobber (mem:BLK (scratch)))])]
+   "optimize_insn_for_size_p ()
+-   && INTVAL (operands[0]) == 2*GET_MODE_SIZE (Pmode)"
+-  [(parallel [(set (match_dup 1) (mem:P (post_inc:P (reg:P SP_REG))))
++   && INTVAL (operands[0]) == 2*GET_MODE_SIZE (word_mode)"
++  [(parallel [(set (match_dup 1) (mem:W (post_inc:P (reg:P SP_REG))))
+ 	      (clobber (mem:BLK (scratch)))])
+-   (set (match_dup 1) (mem:P (post_inc:P (reg:P SP_REG))))])
++   (set (match_dup 1) (mem:W (post_inc:P (reg:P SP_REG))))])
+ 
+ ;; Convert esp additions to pop.
+ (define_peephole2
+-  [(match_scratch:P 1 "r")
++  [(match_scratch:W 1 "r")
+    (parallel [(set (reg:P SP_REG)
+ 		   (plus:P (reg:P SP_REG)
+ 			   (match_operand:P 0 "const_int_operand" "")))
+ 	      (clobber (reg:CC FLAGS_REG))])]
+-  "INTVAL (operands[0]) == GET_MODE_SIZE (Pmode)"
+-  [(set (match_dup 1) (mem:P (post_inc:P (reg:P SP_REG))))])
++  "INTVAL (operands[0]) == GET_MODE_SIZE (word_mode)"
++  [(set (match_dup 1) (mem:W (post_inc:P (reg:P SP_REG))))])
+ 
+ ;; Two pops case is tricky, since pop causes dependency
+ ;; on destination register.  We use two registers if available.
+ (define_peephole2
+-  [(match_scratch:P 1 "r")
+-   (match_scratch:P 2 "r")
++  [(match_scratch:W 1 "r")
++   (match_scratch:W 2 "r")
+    (parallel [(set (reg:P SP_REG)
+ 		   (plus:P (reg:P SP_REG)
+ 			   (match_operand:P 0 "const_int_operand" "")))
+ 	      (clobber (reg:CC FLAGS_REG))])]
+-  "INTVAL (operands[0]) == 2*GET_MODE_SIZE (Pmode)"
+-  [(set (match_dup 1) (mem:P (post_inc:P (reg:P SP_REG))))
+-   (set (match_dup 2) (mem:P (post_inc:P (reg:P SP_REG))))])
++  "INTVAL (operands[0]) == 2*GET_MODE_SIZE (word_mode)"
++  [(set (match_dup 1) (mem:W (post_inc:P (reg:P SP_REG))))
++   (set (match_dup 2) (mem:W (post_inc:P (reg:P SP_REG))))])
+ 
+ (define_peephole2
+-  [(match_scratch:P 1 "r")
++  [(match_scratch:W 1 "r")
+    (parallel [(set (reg:P SP_REG)
+ 		   (plus:P (reg:P SP_REG)
+ 			   (match_operand:P 0 "const_int_operand" "")))
+ 	      (clobber (reg:CC FLAGS_REG))])]
+   "optimize_insn_for_size_p ()
+-   && INTVAL (operands[0]) == 2*GET_MODE_SIZE (Pmode)"
+-  [(set (match_dup 1) (mem:P (post_inc:P (reg:P SP_REG))))
+-   (set (match_dup 1) (mem:P (post_inc:P (reg:P SP_REG))))])
++   && INTVAL (operands[0]) == 2*GET_MODE_SIZE (word_mode)"
++  [(set (match_dup 1) (mem:W (post_inc:P (reg:P SP_REG))))
++   (set (match_dup 1) (mem:W (post_inc:P (reg:P SP_REG))))])
+ 
+ ;; Convert compares with 1 to shorter inc/dec operations when CF is not
+ ;; required and register dies.  Similarly for 128 to -128.
+@@ -17508,7 +17560,7 @@
+ ;;  leal    (%edx,%eax,4), %eax
+ 
+ (define_peephole2
+-  [(match_scratch:P 5 "r")
++  [(match_scratch:W 5 "r")
+    (parallel [(set (match_operand 0 "register_operand" "")
+ 		   (ashift (match_operand 1 "register_operand" "")
+ 			   (match_operand 2 "const_int_operand" "")))
+@@ -17534,16 +17586,16 @@
+   enum machine_mode op1mode = GET_MODE (operands[1]);
+   enum machine_mode mode = op1mode == DImode ? DImode : SImode;
+   int scale = 1 << INTVAL (operands[2]);
+-  rtx index = gen_lowpart (Pmode, operands[1]);
+-  rtx base = gen_lowpart (Pmode, operands[5]);
++  rtx index = gen_lowpart (word_mode, operands[1]);
++  rtx base = gen_lowpart (word_mode, operands[5]);
+   rtx dest = gen_lowpart (mode, operands[3]);
+ 
+-  operands[1] = gen_rtx_PLUS (Pmode, base,
+-  			      gen_rtx_MULT (Pmode, index, GEN_INT (scale)));
++  operands[1] = gen_rtx_PLUS (word_mode, base,
++  			      gen_rtx_MULT (word_mode, index, GEN_INT (scale)));
+   operands[5] = base;
+-  if (mode != Pmode)
++  if (mode != word_mode)
+     operands[1] = gen_rtx_SUBREG (mode, operands[1], 0);
+-  if (op1mode != Pmode)
++  if (op1mode != word_mode)
+     operands[5] = gen_rtx_SUBREG (op1mode, operands[5], 0);
+   operands[0] = dest;
+ })
+@@ -17658,8 +17710,8 @@
+ 
+ (define_insn_and_split "*call_value_0_rex64_vzeroupper"
+   [(set (match_operand 0 "" "")
+-	(call (mem:QI (match_operand:DI 1 "constant_call_address_operand" ""))
+-	      (match_operand:DI 2 "const_int_operand" "")))
++	(call (mem:QI (match_operand:P 1 "constant_call_address_operand" ""))
++	      (match_operand:P 2 "const_int_operand" "")))
+    (unspec [(match_operand 3 "const_int_operand" "")]
+    	   UNSPEC_CALL_NEEDS_VZEROUPPER)]
+   "TARGET_VZEROUPPER && TARGET_64BIT"
+@@ -17671,8 +17723,8 @@
+ 
+ (define_insn "*call_value_0_rex64"
+   [(set (match_operand 0 "" "")
+-	(call (mem:QI (match_operand:DI 1 "constant_call_address_operand" ""))
+-	      (match_operand:DI 2 "const_int_operand" "")))]
++	(call (mem:QI (match_operand:P 1 "constant_call_address_operand" ""))
++	      (match_operand:P 2 "const_int_operand" "")))]
+   "TARGET_64BIT"
+   { return ix86_output_call_insn (insn, operands[1], 1); }
+   [(set_attr "type" "callv")])
+@@ -17769,8 +17821,8 @@
+ 
+ (define_insn_and_split "*call_value_1_rex64_vzeroupper"
+   [(set (match_operand 0 "" "")
+-	(call (mem:QI (match_operand:DI 1 "call_insn_operand" "rzm"))
+-	      (match_operand:DI 2 "" "")))
++	(call (mem:QI (match_operand:P 1 "call_insn_operand" "rzw"))
++	      (match_operand:P 2 "" "")))
+    (unspec [(match_operand 3 "const_int_operand" "")]
+    	   UNSPEC_CALL_NEEDS_VZEROUPPER)]
+   "TARGET_VZEROUPPER && TARGET_64BIT && !SIBLING_CALL_P (insn)
+@@ -17783,8 +17835,8 @@
+ 
+ (define_insn "*call_value_1_rex64"
+   [(set (match_operand 0 "" "")
+-	(call (mem:QI (match_operand:DI 1 "call_insn_operand" "rzm"))
+-	      (match_operand:DI 2 "" "")))]
++	(call (mem:QI (match_operand:P 1 "call_insn_operand" "rzw"))
++	      (match_operand:P 2 "" "")))]
+   "TARGET_64BIT && !SIBLING_CALL_P (insn)
+    && ix86_cmodel != CM_LARGE && ix86_cmodel != CM_LARGE_PIC"
+   { return ix86_output_call_insn (insn, operands[1], 1); }
+@@ -17874,8 +17926,8 @@
+ 
+ (define_insn "*sibcall_value_1_rex64"
+   [(set (match_operand 0 "" "")
+-	(call (mem:QI (match_operand:DI 1 "sibcall_insn_operand" "z,U"))
+-	      (match_operand:DI 2 "" "")))]
++	(call (mem:QI (match_operand:P 1 "sibcall_insn_operand" "z,U"))
++	      (match_operand:P 2 "" "")))]
+   "TARGET_64BIT && SIBLING_CALL_P (insn)"
+   { return ix86_output_call_insn (insn, operands[1], 1); }
+   [(set_attr "type" "callv")])
+@@ -17961,11 +18013,11 @@
+ 
+ #ifdef TARGET_THREAD_SSP_OFFSET
+   operands[1] = GEN_INT (TARGET_THREAD_SSP_OFFSET);
+-  insn = (TARGET_64BIT
++  insn = (TARGET_LP64
+ 	  ? gen_stack_tls_protect_set_di
+ 	  : gen_stack_tls_protect_set_si);
+ #else
+-  insn = (TARGET_64BIT
++  insn = (TARGET_LP64
+ 	  ? gen_stack_protect_set_di
+ 	  : gen_stack_protect_set_si);
+ #endif
+@@ -18005,11 +18057,11 @@
+ 
+ #ifdef TARGET_THREAD_SSP_OFFSET
+   operands[1] = GEN_INT (TARGET_THREAD_SSP_OFFSET);
+-  insn = (TARGET_64BIT
++  insn = (TARGET_LP64
+ 	  ? gen_stack_tls_protect_test_di
+ 	  : gen_stack_tls_protect_test_si);
+ #else
+-  insn = (TARGET_64BIT
++  insn = (TARGET_LP64
+ 	  ? gen_stack_protect_test_di
+ 	  : gen_stack_protect_test_si);
+ #endif
+@@ -18263,7 +18315,7 @@
+ 	(unspec_volatile [(const_int 0)] UNSPECV_SLWP_INTRINSIC))]
+   "TARGET_LWP"
+ {
+-  if (TARGET_64BIT)
++  if (Pmode == DImode)
+     emit_insn (gen_lwp_slwpcbdi (operands[0]));
+   else
+     emit_insn (gen_lwp_slwpcbsi (operands[0]));
+diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt
+index fe5949f..c9d60e1 100644
+--- a/gcc/config/i386/i386.opt
++++ b/gcc/config/i386/i386.opt
+@@ -277,9 +277,17 @@ Target RejectNegative Negative(m64) Report InverseMask(ISA_64BIT) Var(ix86_isa_f
+ Generate 32bit i386 code
+ 
+ m64
+-Target RejectNegative Negative(m32) Report Mask(ISA_64BIT) Var(ix86_isa_flags) Save
++Target RejectNegative Negative(mx32) Report Mask(ISA_X86_64) Var(ix86_isa_flags) Save
+ Generate 64bit x86-64 code
+ 
++mx32
++Target RejectNegative Negative(m32) Report Mask(ISA_X32) Var(ix86_isa_flags) Save
++Generate 32bit x86-64 code
++
++mx86-64
++Target Undocumented Mask(ISA_64BIT) Var(ix86_isa_flags) Save
++Generate 32bit or 64bit x86-64 code
++
+ mmmx
+ Target Report Mask(ISA_MMX) Var(ix86_isa_flags) Save
+ Support MMX built-in functions
+diff --git a/gcc/config/i386/linux64.h b/gcc/config/i386/linux64.h
+index 103ab0c..f777d1b 100644
+--- a/gcc/config/i386/linux64.h
++++ b/gcc/config/i386/linux64.h
+@@ -64,27 +64,40 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ 
+ #define GLIBC_DYNAMIC_LINKER32 "/lib/ld-linux.so.2"
+ #define GLIBC_DYNAMIC_LINKER64 "/lib64/ld-linux-x86-64.so.2"
++#define GLIBC_DYNAMIC_LINKERX32 "/libx32/ld-linux-x32.so.2"
+ 
+ #if TARGET_64BIT_DEFAULT
+ #define SPEC_32 "m32"
+-#define SPEC_64 "!m32"
++#if TARGET_BI_ARCH == 2
++#define SPEC_64 "m64"
++#define SPEC_X32 "m32|m64:;"
++#else
++#define SPEC_64 "m32|mx32:;"
++#define SPEC_X32 "mx32"
++#endif
+ #else
+-#define SPEC_32 "!m64"
++#define SPEC_32 "m64|mx32:;"
+ #define SPEC_64 "m64"
++#define SPEC_X32 "mx32"
+ #endif
+ 
+ #undef ASM_SPEC
+-#define ASM_SPEC "%{" SPEC_32 ":--32} %{" SPEC_64 ":--64} \
++#define ASM_SPEC "%{" SPEC_32 ":--32} \
++ %{" SPEC_64 ":--64} \
++ %{" SPEC_X32 ":--x32} \
+  %{!mno-sse2avx:%{mavx:-msse2avx}} %{msse2avx:%{!mavx:-msse2avx}}"
+ 
+ #undef	LINK_SPEC
+-#define LINK_SPEC "%{" SPEC_64 ":-m elf_x86_64} %{" SPEC_32 ":-m elf_i386} \
++#define LINK_SPEC "%{" SPEC_64 ":-m elf_x86_64} \
++                   %{" SPEC_32 ":-m elf_i386} \
++                   %{" SPEC_X32 ":-m elf32_x86_64} \
+   %{shared:-shared} \
+   %{!shared: \
+     %{!static: \
+       %{rdynamic:-export-dynamic} \
+-      %{" SPEC_32 ":-dynamic-linker " LINUX_DYNAMIC_LINKER32 "} \
+-      %{" SPEC_64 ":-dynamic-linker " LINUX_DYNAMIC_LINKER64 "}} \
++      %{" SPEC_32 ":-dynamic-linker " GLIBC_DYNAMIC_LINKER32 "} \
++      %{" SPEC_64 ":-dynamic-linker " GLIBC_DYNAMIC_LINKER64 "} \
++      %{" SPEC_X32 ":-dynamic-linker " GLIBC_DYNAMIC_LINKERX32 "}} \
+     %{static:-static}}"
+ 
+ /* Similar to standard Linux, but adding -ffast-math support.  */
+@@ -97,7 +110,11 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+    %{shared|pie:crtendS.o%s;:crtend.o%s} crtn.o%s"
+ 
+ #if TARGET_64BIT_DEFAULT
++#if TARGET_BI_ARCH == 2
++#define MULTILIB_DEFAULTS { "mx32" }
++#else
+ #define MULTILIB_DEFAULTS { "m64" }
++#endif
+ #else
+ #define MULTILIB_DEFAULTS { "m32" }
+ #endif
+@@ -123,10 +140,13 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ 
+ #ifdef TARGET_LIBC_PROVIDES_SSP
+ /* i386 glibc provides __stack_chk_guard in %gs:0x14,
++   x32 glibc provides it in %fs:0x18. 
+    x86_64 glibc provides it in %fs:0x28.  */
+-#define TARGET_THREAD_SSP_OFFSET	(TARGET_64BIT ? 0x28 : 0x14)
++#define TARGET_THREAD_SSP_OFFSET \
++  (TARGET_64BIT ? (TARGET_X32 ? 0x18 : 0x28) : 0x14)
+ 
+ /* We steal the last transactional memory word.  */
+ #define TARGET_CAN_SPLIT_STACK
+-#define TARGET_THREAD_SPLIT_STACK_OFFSET (TARGET_64BIT ? 0x70 : 0x30)
++#define TARGET_THREAD_SPLIT_STACK_OFFSET \
++  (TARGET_64BIT ? (TARGET_X32 ? 0x40 : 0x70) : 0x30)
+ #endif
+diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
+index ca37622..055b5eb 100644
+--- a/gcc/config/i386/mmx.md
++++ b/gcc/config/i386/mmx.md
+@@ -1626,24 +1626,12 @@
+   "TARGET_SSE || TARGET_3DNOW_A")
+ 
+ (define_insn "*mmx_maskmovq"
+-  [(set (mem:V8QI (match_operand:SI 0 "register_operand" "D"))
++  [(set (mem:V8QI (match_operand:P 0 "register_operand" "D"))
+ 	(unspec:V8QI [(match_operand:V8QI 1 "register_operand" "y")
+ 		      (match_operand:V8QI 2 "register_operand" "y")
+ 		      (mem:V8QI (match_dup 0))]
+ 		     UNSPEC_MASKMOV))]
+-  "(TARGET_SSE || TARGET_3DNOW_A) && !TARGET_64BIT"
+-  ;; @@@ check ordering of operands in intel/nonintel syntax
+-  "maskmovq\t{%2, %1|%1, %2}"
+-  [(set_attr "type" "mmxcvt")
+-   (set_attr "mode" "DI")])
+-
+-(define_insn "*mmx_maskmovq_rex"
+-  [(set (mem:V8QI (match_operand:DI 0 "register_operand" "D"))
+-	(unspec:V8QI [(match_operand:V8QI 1 "register_operand" "y")
+-		      (match_operand:V8QI 2 "register_operand" "y")
+-		      (mem:V8QI (match_dup 0))]
+-		     UNSPEC_MASKMOV))]
+-  "(TARGET_SSE || TARGET_3DNOW_A) && TARGET_64BIT"
++  "TARGET_SSE || TARGET_3DNOW_A"
+   ;; @@@ check ordering of operands in intel/nonintel syntax
+   "maskmovq\t{%2, %1|%1, %2}"
+   [(set_attr "type" "mmxcvt")
+diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md
+index 7cce9d4..d9105a7 100644
+--- a/gcc/config/i386/predicates.md
++++ b/gcc/config/i386/predicates.md
+@@ -324,6 +324,53 @@
+   return false;
+ })
+ 
++;; Return true if OP is either a symbol reference or a sum of a symbol
++;; reference and a constant in x86-64 small mode, which can be stored
++;; in the zero extended immediate field.
++(define_predicate "x86_64_symbolic_immediate_operand"
++  (match_code "symbol_ref,const")
++{
++  /* Only small model is allowed.  */
++  if (ix86_cmodel != CM_SMALL)
++    return false;
++
++  switch (GET_CODE (op))
++    {
++    case SYMBOL_REF:
++      /* TLS symbols are not constant.  */
++      if (SYMBOL_REF_TLS_MODEL (op))
++	return false;
++      return true;
++
++    case CONST:
++      op = XEXP (op, 0);
++      if (GET_CODE (op) == PLUS)
++	{
++	  rtx op1 = XEXP (op, 0);
++	  rtx op2 = XEXP (op, 1);
++
++	  switch (GET_CODE (op1))
++	    {
++	    case SYMBOL_REF:
++	      /* TLS symbols are not constant.  */
++	      if (SYMBOL_REF_TLS_MODEL (op1))
++		return false;
++	      if (CONST_INT_P (op2))
++		return true;
++	      break;
++
++	    default:
++	      return false;
++	    }
++	}
++      break;
++
++    default:
++      gcc_unreachable ();
++    }
++  return false;
++})
++
+ ;; Return true if OP is general operand representable on x86_64.
+ (define_predicate "x86_64_general_operand"
+   (if_then_else (match_test "TARGET_64BIT")
+@@ -553,11 +600,18 @@
+   (ior (match_operand 0 "register_no_elim_operand")
+        (match_operand 0 "immediate_operand")))
+ 
++;; Test for a valid operand for indirect branch.
++(define_predicate "indirect_branch_operand"
++  (if_then_else (match_test "TARGET_X32")
++    (match_operand 0 "register_operand")
++    (match_operand 0 "nonimmediate_operand")))
++
+ ;; Test for a valid operand for a call instruction.
+ (define_predicate "call_insn_operand"
+   (ior (match_operand 0 "constant_call_address_operand")
+        (match_operand 0 "call_register_no_elim_operand")
+-       (match_operand 0 "memory_operand")))
++       (and (match_test "!TARGET_X32")
++	    (match_operand 0 "memory_operand"))))
+ 
+ ;; Similarly, but for tail calls, in which we cannot allow memory references.
+ (define_predicate "sibcall_insn_operand"
+@@ -850,6 +904,11 @@
+   ok = ix86_decompose_address (op, &parts);
+   gcc_assert (ok);
+ 
++  if (parts.base && GET_CODE (parts.base) == SUBREG)
++    parts.base = SUBREG_REG (parts.base);
++  if (parts.index && GET_CODE (parts.index) == SUBREG)
++    parts.index = SUBREG_REG (parts.index);
++
+   /* Look for some component that isn't known to be aligned.  */
+   if (parts.index)
+     {
+@@ -913,6 +972,12 @@
+ 
+   ok = ix86_decompose_address (XEXP (op, 0), &parts);
+   gcc_assert (ok);
++
++  if (parts.base && GET_CODE (parts.base) == SUBREG)
++    parts.base = SUBREG_REG (parts.base);
++  if (parts.index && GET_CODE (parts.index) == SUBREG)
++    parts.index = SUBREG_REG (parts.index);
++
+   if (parts.base == NULL_RTX
+       || parts.base == arg_pointer_rtx
+       || parts.base == frame_pointer_rtx
+diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
+index b5b900a..03a7e0e 100644
+--- a/gcc/config/i386/sse.md
++++ b/gcc/config/i386/sse.md
+@@ -8174,7 +8174,7 @@
+    (set_attr "mode" "TI")])
+ 
+ (define_insn "*sse2_maskmovdqu_rex64"
+-  [(set (mem:V16QI (match_operand:DI 0 "register_operand" "D"))
++  [(set (mem:V16QI (match_operand:P 0 "register_operand" "D"))
+ 	(unspec:V16QI [(match_operand:V16QI 1 "register_operand" "x")
+ 		       (match_operand:V16QI 2 "register_operand" "x")
+ 		       (mem:V16QI (match_dup 0))]
+@@ -8296,8 +8296,8 @@
+   "monitor\t%0, %1, %2"
+   [(set_attr "length" "3")])
+ 
+-(define_insn "sse3_monitor64"
+-  [(unspec_volatile [(match_operand:DI 0 "register_operand" "a")
++(define_insn "sse3_monitor_<x86_64_mode>"
++  [(unspec_volatile [(match_operand:P 0 "register_operand" "a")
+ 		     (match_operand:SI 1 "register_operand" "c")
+ 		     (match_operand:SI 2 "register_operand" "d")]
+ 		    UNSPECV_MONITOR)]
+diff --git a/gcc/config/i386/t-linux64 b/gcc/config/i386/t-linux64
+index 5d5a476..ea8f5e9 100644
+--- a/gcc/config/i386/t-linux64
++++ b/gcc/config/i386/t-linux64
+@@ -1,4 +1,5 @@
+-# Copyright (C) 2002, 2005, 2007, 2008 Free Software Foundation, Inc.
++# Copyright (C) 2002, 2005, 2007, 2008, 2011
++# Free Software Foundation, Inc.
+ #
+ # This file is part of GCC.
+ #
+@@ -23,9 +24,19 @@
+ # it doesn't tell anything about the 32bit libraries on those systems.  Set
+ # MULTILIB_OSDIRNAMES according to what is found on the target.
+ 
+-MULTILIB_OPTIONS = m64/m32
+-MULTILIB_DIRNAMES = 64 32 
+-MULTILIB_OSDIRNAMES = ../lib64 $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)
++# To support i386, x86-64 and x32 libraries, the directory structrue
++# should be:
++#
++# 	/lib has i386 libraries.
++# 	/lib64 has x86-64 libraries.
++# 	/libx32 has x32 libraries.
++#
++comma=,
++MULTILIB_OPTIONS    = $(subst $(comma),/,$(TM_MULTILIB_CONFIG))
++MULTILIB_DIRNAMES   = $(patsubst m%, %, $(subst /, ,$(MULTILIB_OPTIONS)))
++MULTILIB_OSDIRNAMES = m64=../lib64
++MULTILIB_OSDIRNAMES+= m32=$(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)
++MULTILIB_OSDIRNAMES+= mx32=../libx32
+ 
+ LIBGCC = stmp-multilib
+ INSTALL_LIBGCC = install-multilib
+diff --git a/gcc/config/i386/x86-64.h b/gcc/config/i386/x86-64.h
+index b85dab9..d20f326 100644
+--- a/gcc/config/i386/x86-64.h
++++ b/gcc/config/i386/x86-64.h
+@@ -38,10 +38,10 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ #define MCOUNT_NAME "mcount"
+ 
+ #undef SIZE_TYPE
+-#define SIZE_TYPE (TARGET_64BIT ? "long unsigned int" : "unsigned int")
++#define SIZE_TYPE (TARGET_LP64 ? "long unsigned int" : "unsigned int")
+ 
+ #undef PTRDIFF_TYPE
+-#define PTRDIFF_TYPE (TARGET_64BIT ? "long int" : "int")
++#define PTRDIFF_TYPE (TARGET_LP64 ? "long int" : "int")
+ 
+ #undef WCHAR_TYPE
+ #define WCHAR_TYPE "int"
+diff --git a/gcc/config/linux.h b/gcc/config/linux.h
+index 00b4f1c..ed22877 100644
+--- a/gcc/config/linux.h
++++ b/gcc/config/linux.h
+@@ -77,9 +77,11 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ #define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"
+ #define UCLIBC_DYNAMIC_LINKER32 "/lib/ld-uClibc.so.0"
+ #define UCLIBC_DYNAMIC_LINKER64 "/lib/ld64-uClibc.so.0"
++#define UCLIBC_DYNAMIC_LINKERX32 "/lib/ldx32-uClibc.so.0"
+ #define BIONIC_DYNAMIC_LINKER "/system/bin/linker"
+ #define BIONIC_DYNAMIC_LINKER32 "/system/bin/linker"
+ #define BIONIC_DYNAMIC_LINKER64 "/system/bin/linker64"
++#define BIONIC_DYNAMIC_LINKERX32 "/system/bin/linkerx32"
+ 
+ #define LINUX_DYNAMIC_LINKER						\
+   CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKER, UCLIBC_DYNAMIC_LINKER,	\
+@@ -90,6 +92,9 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ #define LINUX_DYNAMIC_LINKER64						\
+   CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKER64, UCLIBC_DYNAMIC_LINKER64, \
+ 			 BIONIC_DYNAMIC_LINKER64)
++#define LINUX_DYNAMIC_LINKERX32					\
++  CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKERX32, UCLIBC_DYNAMIC_LINKERX32, \
++			 BIONIC_DYNAMIC_LINKERX32)
+ 
+ /* Determine whether the entire c99 runtime
+    is present in the runtime library.  */
+diff --git a/gcc/configure b/gcc/configure
+index 1960d5a..5b848b6 100755
+--- a/gcc/configure
++++ b/gcc/configure
+@@ -1649,7 +1649,7 @@ Optional Packages:
+   --with-specs=SPECS      add SPECS to driver command-line processing
+   --with-pkgversion=PKG   Use PKG in the version string in place of "GCC"
+   --with-bugurl=URL       Direct users to URL to report a bug
+-  --with-multilib-list    Select multilibs (SH only)
++  --with-multilib-list    Select multilibs (SH and x86-64 only)
+   --with-gnu-ld           assume the C compiler uses GNU ld default=no
+   --with-libiconv-prefix[=DIR]  search for libiconv in DIR/include and DIR/lib
+   --without-libiconv-prefix     don't search for libiconv in includedir and libdir
+diff --git a/gcc/configure.ac b/gcc/configure.ac
+index 505a54d..485dbfa 100644
+--- a/gcc/configure.ac
++++ b/gcc/configure.ac
+@@ -786,7 +786,7 @@ esac],
+ [enable_languages=c])
+ 
+ AC_ARG_WITH(multilib-list,
+-[  --with-multilib-list    Select multilibs (SH only)],
++[  --with-multilib-list    Select multilibs (SH and x86-64 only)],
+ :,
+ with_multilib_list=default)
+ 
+diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
+index fc04c96..a9d2d2e 100644
+--- a/gcc/doc/install.texi
++++ b/gcc/doc/install.texi
+@@ -1035,8 +1035,10 @@ sysv, aix.
+ @item --with-multilib-list=@var{list}
+ @itemx --without-multilib-list
+ Specify what multilibs to build.
+-Currently only implemented for sh*-*-*.
++Currently only implemented for sh*-*-* and x86-64-*-linux*.
+ 
++@table @code
++@item sh*-*-*
+ @var{list} is a comma separated list of CPU names.  These must be of the
+ form @code{sh*} or @code{m*} (in which case they match the compiler option
+ for that processor).  The list should not contain any endian options -
+@@ -1068,6 +1070,16 @@ only little endian SH4AL:
+ --with-multilib-list=sh4al,!mb/m4al
+ @end smallexample
+ 
++@item x86-64-*-linux*
++@var{list} is a comma separated list of @code{m32}, @code{m64} and
++@code{mx32} to enable 32-bit, 64-bit and x32 run-time libraries,
++respectively.  If @var{list} is empty, then there will be no multilibs
++and only the default run-time library will be enabled.
++
++If @option{--with-multilib-list} is not given, then only 32-bit and
++64-bit run-time libraries will be enabled.
++@end table
++
+ @item --with-endian=@var{endians}
+ Specify what endians to use.
+ Currently only implemented for sh*-*-*.
+diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
+index a918e60..903308e 100644
+--- a/gcc/doc/invoke.texi
++++ b/gcc/doc/invoke.texi
+@@ -610,7 +610,7 @@ Objective-C and Objective-C++ Dialects}.
+ -mpc32 -mpc64 -mpc80 -mstackrealign @gol
+ -momit-leaf-frame-pointer  -mno-red-zone -mno-tls-direct-seg-refs @gol
+ -mcmodel=@var{code-model} -mabi=@var{name} @gol
+--m32  -m64 -mlarge-data-threshold=@var{num} @gol
++-m32 -m64 -mx32 -mlarge-data-threshold=@var{num} @gol
+ -msse2avx -mfentry -m8bit-idiv @gol
+ -mavx256-split-unaligned-load -mavx256-split-unaligned-store}
+ 
+@@ -12900,15 +12900,19 @@ on AMD x86-64 processors in 64-bit environments.
+ @table @gcctabopt
+ @item -m32
+ @itemx -m64
++@itemx -mx32
+ @opindex m32
+ @opindex m64
++@opindex mx32
+ Generate code for a 32-bit or 64-bit environment.
+-The 32-bit environment sets int, long and pointer to 32 bits and
++The @option{-m32} option sets int, long and pointer to 32 bits and
+ generates code that runs on any i386 system.
+-The 64-bit environment sets int to 32 bits and long and pointer
+-to 64 bits and generates code for AMD's x86-64 architecture. For
+-darwin only the -m64 option turns off the @option{-fno-pic} and
+-@option{-mdynamic-no-pic} options.
++The @option{-m64} option sets int to 32 bits and long and pointer
++to 64 bits and generates code for AMD's x86-64 architecture.
++The @option{-mx32} option sets int, long and pointer to 32 bits and
++generates code for AMD's x86-64 architecture.
++For darwin only the @option{-m64} option turns off the @option{-fno-pic}
++and @option{-mdynamic-no-pic} options.
+ 
+ @item -mno-red-zone
+ @opindex mno-red-zone
+diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
+index f7c0cce..9939449 100644
+--- a/gcc/doc/tm.texi
++++ b/gcc/doc/tm.texi
+@@ -3723,6 +3723,24 @@ return @code{@var{regno}}.
+ 
+ @end defmac
+ 
++@defmac REG_VALUE_IN_UNWIND_CONTEXT
++
++Define this macro if the target stores register values as
++@code{_Unwind_Word} type in unwind context.  It should be defined if
++target register size is larger than the size of @code{void *}.  The
++default is to store register values as @code{void *} type.
++
++@end defmac
++
++@defmac ASSUME_EXTENDED_UNWIND_CONTEXT
++
++Define this macro to be 1 if the target always uses extended unwind
++context with version, args_size and by_value fields.  If it is undefined,
++it will be defined to 1 when @code{REG_VALUE_IN_UNWIND_CONTEXT} is
++defined and 0 otherwise.
++
++@end defmac
++
+ @node Elimination
+ @subsection Eliminating Frame Pointer and Arg Pointer
+ 
+diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
+index 40acf65..26cbbeb 100644
+--- a/gcc/doc/tm.texi.in
++++ b/gcc/doc/tm.texi.in
+@@ -3711,6 +3711,24 @@ return @code{@var{regno}}.
+ 
+ @end defmac
+ 
++@defmac REG_VALUE_IN_UNWIND_CONTEXT
++
++Define this macro if the target stores register values as
++@code{_Unwind_Word} type in unwind context.  It should be defined if
++target register size is larger than the size of @code{void *}.  The
++default is to store register values as @code{void *} type.
++
++@end defmac
++
++@defmac ASSUME_EXTENDED_UNWIND_CONTEXT
++
++Define this macro to be 1 if the target always uses extended unwind
++context with version, args_size and by_value fields.  If it is undefined,
++it will be defined to 1 when @code{REG_VALUE_IN_UNWIND_CONTEXT} is
++defined and 0 otherwise.
++
++@end defmac
++
+ @node Elimination
+ @subsection Eliminating Frame Pointer and Arg Pointer
+ 
+diff --git a/gcc/dwarf2out.c b/gcc/dwarf2out.c
+index f0330ba..1f010f3 100644
+--- a/gcc/dwarf2out.c
++++ b/gcc/dwarf2out.c
+@@ -2602,7 +2602,8 @@ dwarf2out_frame_debug_expr (rtx expr, const char *label)
+ 	     regiser.  */
+           if (fde
+               && fde->stack_realign
+-              && src == hard_frame_pointer_rtx)
++	      && REG_P (src)
++	      && REGNO (src) == HARD_FRAME_POINTER_REGNUM)
+ 	    {
+ 	      gcc_assert (cfa.reg != HARD_FRAME_POINTER_REGNUM);
+ 	      cfa_store.offset = 0;
+diff --git a/gcc/fwprop.c b/gcc/fwprop.c
+index b2fd955..c8009d0 100644
+--- a/gcc/fwprop.c
++++ b/gcc/fwprop.c
+@@ -1101,6 +1101,7 @@ forward_propagate_subreg (df_ref use, rtx def_insn, rtx def_set)
+       src = SET_SRC (def_set);
+       if (GET_CODE (src) == SUBREG
+ 	  && REG_P (SUBREG_REG (src))
++	  && REGNO (SUBREG_REG (src)) >= FIRST_PSEUDO_REGISTER
+ 	  && GET_MODE (SUBREG_REG (src)) == use_mode
+ 	  && subreg_lowpart_p (src)
+ 	  && all_uses_available_at (def_insn, use_insn))
+@@ -1119,6 +1120,7 @@ forward_propagate_subreg (df_ref use, rtx def_insn, rtx def_set)
+       if ((GET_CODE (src) == ZERO_EXTEND
+ 	   || GET_CODE (src) == SIGN_EXTEND)
+ 	  && REG_P (XEXP (src, 0))
++	  && REGNO (XEXP (src, 0)) >= FIRST_PSEUDO_REGISTER
+ 	  && GET_MODE (XEXP (src, 0)) == use_mode
+ 	  && !free_load_extend (src, def_insn)
+ 	  && all_uses_available_at (def_insn, use_insn))
+diff --git a/gcc/longlong.h b/gcc/longlong.h
+index acb3185..db8c289 100644
+--- a/gcc/longlong.h
++++ b/gcc/longlong.h
+@@ -1,6 +1,6 @@
+ /* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
+    Copyright (C) 1991, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
+-   2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
++   2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
+    Free Software Foundation, Inc.
+ 
+    This file is part of the GNU C Library.
+@@ -431,8 +431,8 @@ UDItype __umulsidi3 (USItype, USItype);
+ 	   : "0" ((UDItype) (n0)),					\
+ 	     "1" ((UDItype) (n1)),					\
+ 	     "rm" ((UDItype) (dv)))
+-#define count_leading_zeros(count, x)	((count) = __builtin_clzl (x))
+-#define count_trailing_zeros(count, x)	((count) = __builtin_ctzl (x))
++#define count_leading_zeros(count, x)	((count) = __builtin_clzll (x))
++#define count_trailing_zeros(count, x)	((count) = __builtin_ctzll (x))
+ #define UMUL_TIME 40
+ #define UDIV_TIME 40
+ #endif /* x86_64 */
+diff --git a/gcc/testsuite/ChangeLog.x32 b/gcc/testsuite/ChangeLog.x32
+new file mode 100644
+index 0000000..e496341
+--- /dev/null
++++ b/gcc/testsuite/ChangeLog.x32
+@@ -0,0 +1,424 @@
++2011-11-10  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* objc.dg/torture/forward-1.m: Check ia32 instead of ilp32.
++
++2011-11-10  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* gcc.target/i386/pr49920.c: Check ia32 instead of ilp32.
++	* gcc.target/i386/pr50712.c: Likewise.
++
++2011-11-10  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* gcc.dg/pr46212.c: Correct merge.
++	* gcc.target/i386/incoming-8.c: Likewise.
++
++2011-11-10  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* gcc/testsuite/gcc.target/i386/avx-vzeroupper-16.c: Only run
++	on lp64 targets.
++	* gcc/testsuite/gcc.target/i386/avx-vzeroupper-17.c: Likewise.
++	* gcc/testsuite/gcc.target/i386/avx-vzeroupper-18.c: Likewise.
++	* gcc/testsuite/gcc.target/i386/pr43662.c: Likewise.
++	* gcc/testsuite/gcc.target/i386/pr43869.c: Likewise.
++
++	* gcc.target/x86_64/abi/callabi/callabi.exp: Check ilp32
++	instead of ia32.
++
++2011-11-09  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* gcc.target/i386/builtin-copysign.c: Remove __LP64__ check.
++
++2011-11-09  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* gcc.dg/vect/costmodel/x86_64/x86_64-costmodel-vect.exp: Check
++	ia32.
++	* go.test/go-test.exp (go-set-goarch): Likewise.
++
++2011-11-09  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* c-c++-common/dfp/func-vararg-alternate-d128-2.c: Support x32.
++	* c-c++-common/dfp/func-vararg-mixed-2.c: Likewise.
++	* g++.dg/abi/bitfield3.C: Likewise.
++	* g++.dg/eh/pr38662.C: Likewise.
++	* g++.dg/ext/attrib36.C: Likewise.
++	* g++.dg/ext/attrib37.C: Likewise.
++	* g++.dg/ext/attrib8.C: Likewise.
++	* g++.dg/ext/tmplattr1.C: Likewise.
++	* g++.dg/inherit/override-attribs.C: Likewise.
++	* g++.dg/opt/inline9.C: Likewise.
++	* g++.dg/opt/life1.C: Likewise.
++	* g++.dg/opt/longbranch2.C: Likewise.
++	* g++.dg/opt/nrv12.C: Likewise.
++	* g++.dg/opt/reg-stack4.C: Likewise.
++	* g++.dg/other/pr35504.C: Likewise.
++	* g++.dg/other/pr39496.C: Likewise.
++	* g++.dg/torture/stackalign/eh-fastcall-1.C: Likewise.
++	* g++.dg/torture/stackalign/eh-thiscall-1.C: Likewise.
++	* g++.dg/torture/stackalign/stdcall-1.C: Likewise.
++	* g++.dg/torture/stackalign/unwind-0.C: Likewise.
++	* g++.dg/torture/stackalign/unwind-1.C: Likewise.
++	* g++.dg/torture/stackalign/unwind-2.C: Likewise.
++	* g++.dg/torture/stackalign/unwind-3.C: Likewise.
++	* g++.dg/torture/stackalign/unwind-4.C: Likewise.
++	* g++.dg/torture/stackalign/unwind-5.C: Likewise.
++	* g++.dg/torture/stackalign/unwind-6.C: Likewise.
++	* g++.dg/warn/pr15774-1.C: Likewise.
++	* g++.dg/warn/pr15774-2.C: Likewise.
++	* g++.old-deja/g++.ext/attrib1.C: Likewise.
++	* g++.old-deja/g++.ext/attrib2.C: Likewise.
++	* g++.old-deja/g++.ext/attrib3.C: Likewise.
++	* g++.old-deja/g++.pt/asm2.C: Likewise.
++	* gcc.c-torture/compile/20000804-1.c: Likewise.
++	* gcc.c-torture/compile/pr16566-2.c: Likewise.
++	* gcc.c-torture/execute/ieee/ieee.exp: Likewise.
++	* gcc.dg/20020108-1.c: Likewise.
++	* gcc.dg/20020122-2.c: Likewise.
++	* gcc.dg/20020122-3.c: Likewise.
++	* gcc.dg/20020206-1.c: Likewise.
++	* gcc.dg/20020219-1.c: Likewise.
++	* gcc.dg/20020310-1.c: Likewise.
++	* gcc.dg/20020411-1.c: Likewise.
++	* gcc.dg/20020418-2.c: Likewise.
++	* gcc.dg/20020426-2.c: Likewise.
++	* gcc.dg/20020517-1.c: Likewise.
++	* gcc.dg/20030204-1.c: Likewise.
++	* gcc.dg/20030826-2.c: Likewise.
++	* gcc.dg/20031102-1.c: Likewise.
++	* gcc.dg/20031202-1.c: Likewise.
++	* gcc.dg/20050111-1.c: Likewise.
++	* gcc.dg/20050503-1.c: Likewise.
++	* gcc.dg/array-init-1.c: Likewise.
++	* gcc.dg/builtin-apply4.c: Likewise.
++	* gcc.dg/dfp/pr31344.c: Likewise.
++	* gcc.dg/gomp/atomic-11.c: Likewise.
++	* gcc.dg/graphite/pr40281.c: Likewise.
++	* gcc.dg/ia64-sync-1.c: Likewise.
++	* gcc.dg/ia64-sync-2.c: Likewise.
++	* gcc.dg/ia64-sync-3.c: Likewise.
++	* gcc.dg/ia64-sync-4.c: Likewise.
++	* gcc.dg/ifcvt-fabs-1.c: Likewise.
++	* gcc.dg/invalid-call-1.c: Likewise.
++	* gcc.dg/loop-3.c: Likewise.
++	* gcc.dg/lower-subreg-1.c: Likewise.
++	* gcc.dg/lto/pr47259_0.c: Likewise.
++	* gcc.dg/nested-calls-1.c: Likewise.
++	* gcc.dg/pr20017.c: Likewise.
++	* gcc.dg/pr25023.c: Likewise.
++	* gcc.dg/pr27671-2.c: Likewise.
++	* gcc.dg/pr32176.c: Likewise.
++	* gcc.dg/pr33676.c: Likewise.
++	* gcc.dg/pr35045.c: Likewise.
++	* gcc.dg/pr36015.c: Likewise.
++	* gcc.dg/pr36584.c: Likewise.
++	* gcc.dg/pr36998.c: Likewise.
++	* gcc.dg/pr37438.c: Likewise.
++	* gcc.dg/pr37908.c: Likewise.
++	* gcc.dg/pr41241.c: Likewise.
++	* gcc.dg/pr41340.c: Likewise.
++	* gcc.dg/pr44136.c: Likewise.
++	* gcc.dg/pr46212.c: Likewise.
++	* gcc.dg/prefetch-loop-arrays-1.c: Likewise.
++	* gcc.dg/setjmp-2.c: Likewise.
++	* gcc.dg/short-compare-1.c: Likewise.
++	* gcc.dg/short-compare-2.c: Likewise.
++	* gcc.dg/smod-1.c: Likewise.
++	* gcc.dg/sync-2.c: Likewise.
++	* gcc.dg/sync-3.c: Likewise.
++	* gcc.dg/tls/opt-1.c: Likewise.
++	* gcc.dg/tls/opt-2.c: Likewise.
++	* gcc.dg/tls/opt-3.c: Likewise.
++	* gcc.dg/torture/badshift.c: Likewise.
++	* gcc.dg/torture/fp-int-convert-float80-timode.c: Likewise.
++	* gcc.dg/torture/pr20314-2.c: Likewise.
++	* gcc.dg/torture/pr36891.c: Likewise.
++	* gcc.dg/torture/pr38774.c: Likewise.
++	* gcc.dg/torture/stackalign/alloca-2.c: Likewise.
++	* gcc.dg/torture/stackalign/alloca-4.c: Likewise.
++	* gcc.dg/torture/stackalign/alloca-5.c: Likewise.
++	* gcc.dg/torture/stackalign/alloca-6.c: Likewise.
++	* gcc.dg/torture/stackalign/fastcall-1.c: Likewise.
++	* gcc.dg/torture/stackalign/push-1.c: Likewise.
++	* gcc.dg/torture/stackalign/regparm-1.c: Likewise.
++	* gcc.dg/torture/stackalign/thiscall-1.c: Likewise.
++	* gcc.dg/tree-ssa/loop-28.c: Likewise.
++	* gcc.dg/tree-ssa/prefetch-3.c: Likewise.
++	* gcc.dg/tree-ssa/prefetch-4.c: Likewise.
++	* gcc.dg/tree-ssa/prefetch-5.c: Likewise.
++	* gcc.dg/tree-ssa/prefetch-6.c: Likewise.
++	* gcc.dg/tree-ssa/prefetch-7.c: Likewise.
++	* gcc.dg/tree-ssa/prefetch-8.c: Likewise.
++	* gcc.dg/tree-ssa/prefetch-9.c: Likewise.
++	* gcc.dg/tree-ssa/stdarg-2.c: Likewise.
++	* gcc.dg/tree-ssa/stdarg-3.c: Likewise.
++	* gcc.dg/tree-ssa/stdarg-4.c: Likewise.
++	* gcc.dg/tree-ssa/stdarg-5.c: Likewise.
++	* gcc.dg/tree-ssa/update-unroll-1.c: Likewise.
++	* gcc.dg/unroll-1.c: Likewise.
++	* gcc.dg/vect/costmodel/x86_64/x86_64-costmodel-vect.exp: Likewise.
++	* gcc.misc-tests/i386-pf-3dnow-1.c: Likewise.
++	* gcc.misc-tests/i386-pf-athlon-1.c: Likewise.
++	* gcc.misc-tests/i386-pf-none-1.c: Likewise.
++	* gcc.misc-tests/i386-pf-sse-1.c: Likewise.
++	* gcc.target/i386/20000609-1.c: Likewise.
++	* gcc.target/i386/20000720-1.c: Likewise.
++	* gcc.target/i386/20000724-1.c: Likewise.
++	* gcc.target/i386/20011107-1.c: Likewise.
++	* gcc.target/i386/20011119-1.c: Likewise.
++	* gcc.target/i386/20020201-3.c: Likewise.
++	* gcc.target/i386/20020218-1.c: Likewise.
++	* gcc.target/i386/20020729-1.c: Likewise.
++	* gcc.target/i386/20030926-1.c: Likewise.
++	* gcc.target/i386/20060125-1.c: Likewise.
++	* gcc.target/i386/20060125-2.c: Likewise.
++	* gcc.target/i386/20060512-1.c: Likewise.
++	* gcc.target/i386/20060512-2.c: Likewise.
++	* gcc.target/i386/20060512-3.c: Likewise.
++	* gcc.target/i386/20060512-4.c: Likewise.
++	* gcc.target/i386/387-1.c: Likewise.
++	* gcc.target/i386/387-2.c: Likewise.
++	* gcc.target/i386/387-5.c: Likewise.
++	* gcc.target/i386/387-6.c: Likewise.
++	* gcc.target/i386/980312-1.c: Likewise.
++	* gcc.target/i386/980313-1.c: Likewise.
++	* gcc.target/i386/990117-1.c: Likewise.
++	* gcc.target/i386/990424-1.c: Likewise.
++	* gcc.target/i386/990524-1.c: Likewise.
++	* gcc.target/i386/991129-1.c: Likewise.
++	* gcc.target/i386/991214-1.c: Likewise.
++	* gcc.target/i386/991230-1.c: Likewise.
++	* gcc.target/i386/addr-sel-1.c: Likewise.
++	* gcc.target/i386/aggregate-ret1.c: Likewise.
++	* gcc.target/i386/aggregate-ret2.c: Likewise.
++	* gcc.target/i386/align-main-3.c: Likewise.
++	* gcc.target/i386/amd64-abi-1.c: Likewise.
++	* gcc.target/i386/amd64-abi-2.c: Likewise.
++	* gcc.target/i386/amd64-abi-4.c: Likewise.
++	* gcc.target/i386/amd64-abi-5.c: Likewise.
++	* gcc.target/i386/amd64-abi-6.c: Likewise.
++	* gcc.target/i386/asm-1.c: Likewise.
++	* gcc.target/i386/asm-3.c: Likewise.
++	* gcc.target/i386/asm-5.c: Likewise.
++	* gcc.target/i386/attributes-error.c: Likewise.
++	* gcc.target/i386/avx-vcvtsd2si-2.c: Likewise.
++	* gcc.target/i386/avx-vcvtsi2sd-2.c: Likewise.
++	* gcc.target/i386/avx-vcvtsi2ss-2.c: Likewise.
++	* gcc.target/i386/avx-vcvtss2si-2.c: Likewise.
++	* gcc.target/i386/avx-vcvttsd2si-2.c: Likewise.
++	* gcc.target/i386/avx-vcvttss2si-2.c: Likewise.
++	* gcc.target/i386/avx-vinsertps-3.c: Likewise.
++	* gcc.target/i386/avx-vmovd-2.c: Likewise.
++	* gcc.target/i386/avx-vmovq-2.c: Likewise.
++	* gcc.target/i386/avx-vmovq-3.c: Likewise.
++	* gcc.target/i386/avx-vpextrq-1.c: Likewise.
++	* gcc.target/i386/avx-vpinsrq-1.c: Likewise.
++	* gcc.target/i386/avx-vzeroupper-16.c: Likewise.
++	* gcc.target/i386/avx-vzeroupper-17.c: Likewise.
++	* gcc.target/i386/avx-vzeroupper-18.c: Likewise.
++	* gcc.target/i386/bitfield1.c: Likewise.
++	* gcc.target/i386/bitfield2.c: Likewise.
++	* gcc.target/i386/bmi-2.c: Likewise.
++	* gcc.target/i386/bmi-5.c: Likewise.
++	* gcc.target/i386/builtin-unreachable.c: Likewise.
++	* gcc.target/i386/cleanup-2.c: Likewise.
++	* gcc.target/i386/clobbers.c: Likewise.
++	* gcc.target/i386/cmov8.c: Likewise.
++	* gcc.target/i386/cmpxchg16b-1.c: Likewise.
++	* gcc.target/i386/compress-float-387-pic.c: Likewise.
++	* gcc.target/i386/compress-float-387.c: Likewise.
++	* gcc.target/i386/compress-float-sse-pic.c: Likewise.
++	* gcc.target/i386/compress-float-sse.c: Likewise.
++	* gcc.target/i386/crc32-2.c: Likewise.
++	* gcc.target/i386/crc32-3.c: Likewise.
++	* gcc.target/i386/divmod-7.c: Likewise.
++	* gcc.target/i386/divmod-8.c: Likewise.
++	* gcc.target/i386/fastcall-sseregparm.c: Likewise.
++	* gcc.target/i386/fma3-builtin.c: Likewise.
++	* gcc.target/i386/fma3-fma.c: Likewise.
++	* gcc.target/i386/fma4-256-vector.c: Likewise.
++	* gcc.target/i386/fma4-builtin.c: Likewise.
++	* gcc.target/i386/fma4-fma-2.c: Likewise.
++	* gcc.target/i386/fma4-fma.c: Likewise.
++	* gcc.target/i386/fma4-vector-2.c: Likewise.
++	* gcc.target/i386/fma4-vector.c: Likewise.
++	* gcc.target/i386/funcspec-1.c: Likewise.
++	* gcc.target/i386/funcspec-10.c: Likewise.
++	* gcc.target/i386/funcspec-11.c: Likewise.
++	* gcc.target/i386/funcspec-2.c: Likewise.
++	* gcc.target/i386/funcspec-5.c: Likewise.
++	* gcc.target/i386/funcspec-6.c: Likewise.
++	* gcc.target/i386/gcc-have-sync-compare-and-swap-1.c: Likewise.
++	* gcc.target/i386/gcc-have-sync-compare-and-swap-2.c: Likewise.
++	* gcc.target/i386/gcc-have-sync-compare-and-swap-3.c: Likewise.
++	* gcc.target/i386/gcc-have-sync-compare-and-swap-4.c: Likewise.
++	* gcc.target/i386/incoming-1.c: Likewise.
++	* gcc.target/i386/incoming-10.c: Likewise.
++	* gcc.target/i386/incoming-11.c: Likewise.
++	* gcc.target/i386/incoming-12.c: Likewise.
++	* gcc.target/i386/incoming-13.c: Likewise.
++	* gcc.target/i386/incoming-14.c: Likewise.
++	* gcc.target/i386/incoming-15.c: Likewise.
++	* gcc.target/i386/incoming-2.c: Likewise.
++	* gcc.target/i386/incoming-3.c: Likewise.
++	* gcc.target/i386/incoming-4.c: Likewise.
++	* gcc.target/i386/incoming-5.c: Likewise.
++	* gcc.target/i386/incoming-6.c: Likewise.
++	* gcc.target/i386/incoming-7.c: Likewise.
++	* gcc.target/i386/incoming-8.c: Likewise.
++	* gcc.target/i386/incoming-9.c: Likewise.
++	* gcc.target/i386/lea.c: Likewise.
++	* gcc.target/i386/local.c: Likewise.
++	* gcc.target/i386/loop-1.c: Likewise.
++	* gcc.target/i386/loop-2.c: Likewise.
++	* gcc.target/i386/loop-3.c: Likewise.
++	* gcc.target/i386/max-stack-align.c: Likewise.
++	* gcc.target/i386/memcpy-1.c: Likewise.
++	* gcc.target/i386/movbe-2.c: Likewise.
++	* gcc.target/i386/movq-2.c: Likewise.
++	* gcc.target/i386/movq.c: Likewise.
++	* gcc.target/i386/nrv1.c: Likewise.
++	* gcc.target/i386/pad-4.c: Likewise.
++	* gcc.target/i386/pad-5a.c: Likewise.
++	* gcc.target/i386/pad-5b.c: Likewise.
++	* gcc.target/i386/pad-6a.c: Likewise.
++	* gcc.target/i386/pad-6b.c: Likewise.
++	* gcc.target/i386/pad-7.c: Likewise.
++	* gcc.target/i386/pad-9.c: Likewise.
++	* gcc.target/i386/pentium4-not-mull.c: Likewise.
++	* gcc.target/i386/pic-1.c: Likewise.
++	* gcc.target/i386/pr12092-1.c: Likewise.
++	* gcc.target/i386/pr12329.c: Likewise.
++	* gcc.target/i386/pr21518.c: Likewise.
++	* gcc.target/i386/pr22362.c: Likewise.
++	* gcc.target/i386/pr22585.c: Likewise.
++	* gcc.target/i386/pr23098.c: Likewise.
++	* gcc.target/i386/pr25196.c: Likewise.
++	* gcc.target/i386/pr25293.c: Likewise.
++	* gcc.target/i386/pr25654.c: Likewise.
++	* gcc.target/i386/pr26449.c: Likewise.
++	* gcc.target/i386/pr26778.c: Likewise.
++	* gcc.target/i386/pr26826.c: Likewise.
++	* gcc.target/i386/pr27266.c: Likewise.
++	* gcc.target/i386/pr29978.c: Likewise.
++	* gcc.target/i386/pr30505.c: Likewise.
++	* gcc.target/i386/pr30961-1.c: Likewise.
++	* gcc.target/i386/pr31628.c: Likewise.
++	* gcc.target/i386/pr32000-2.c: Likewise.
++	* gcc.target/i386/pr32661-1.c: Likewise.
++	* gcc.target/i386/pr32708-2.c: Likewise.
++	* gcc.target/i386/pr32708-3.c: Likewise.
++	* gcc.target/i386/pr34256.c: Likewise.
++	* gcc.target/i386/pr34312.c: Likewise.
++	* gcc.target/i386/pr34522.c: Likewise.
++	* gcc.target/i386/pr35160.c: Likewise.
++	* gcc.target/i386/pr35281.c: Likewise.
++	* gcc.target/i386/pr36246.c: Likewise.
++	* gcc.target/i386/pr36786.c: Likewise.
++	* gcc.target/i386/pr37275.c: Likewise.
++	* gcc.target/i386/pr37843-3.c: Likewise.
++	* gcc.target/i386/pr37843-4.c: Likewise.
++	* gcc.target/i386/pr39082-1.c: Likewise.
++	* gcc.target/i386/pr39431.c: Likewise.
++	* gcc.target/i386/pr39496.c: Likewise.
++	* gcc.target/i386/pr39543-2.c: Likewise.
++	* gcc.target/i386/pr39911.c: Likewise.
++	* gcc.target/i386/pr40718.c: Likewise.
++	* gcc.target/i386/pr40906-1.c: Likewise.
++	* gcc.target/i386/pr40906-2.c: Likewise.
++	* gcc.target/i386/pr40906-3.c: Likewise.
++	* gcc.target/i386/pr40934.c: Likewise.
++	* gcc.target/i386/pr41900.c: Likewise.
++	* gcc.target/i386/pr42589.c: Likewise.
++	* gcc.target/i386/pr43662.c: Likewise.
++	* gcc.target/i386/pr43671.c: Likewise.
++	* gcc.target/i386/pr43766.c: Likewise.
++	* gcc.target/i386/pr43869.c: Likewise.
++	* gcc.target/i386/pr44942.c: Likewise.
++	* gcc.target/i386/pr44948-2a.c: Likewise.
++	* gcc.target/i386/pr45234.c: Likewise.
++	* gcc.target/i386/pr45336-2.c: Likewise.
++	* gcc.target/i386/pr45336-4.c: Likewise.
++	* gcc.target/i386/pr45852.c: Likewise.
++	* gcc.target/i386/pr46470.c: Likewise.
++	* gcc.target/i386/pr9771-1.c: Likewise.
++	* gcc.target/i386/rdfsbase-1.c: Likewise.
++	* gcc.target/i386/rdfsbase-2.c: Likewise.
++	* gcc.target/i386/rdgsbase-1.c: Likewise.
++	* gcc.target/i386/rdgsbase-2.c: Likewise.
++	* gcc.target/i386/rdrand-3.c: Likewise.
++	* gcc.target/i386/regparm-stdcall.c: Likewise.
++	* gcc.target/i386/regparm.c: Likewise.
++	* gcc.target/i386/reload-1.c: Likewise.
++	* gcc.target/i386/rotate-2.c: Likewise.
++	* gcc.target/i386/sibcall-5.c: Likewise.
++	* gcc.target/i386/signbit-1.c: Likewise.
++	* gcc.target/i386/signbit-2.c: Likewise.
++	* gcc.target/i386/signbit-3.c: Likewise.
++	* gcc.target/i386/sse-5.c: Likewise.
++	* gcc.target/i386/sse-8.c: Likewise.
++	* gcc.target/i386/sse-cvtsi2ss-2.c: Likewise.
++	* gcc.target/i386/sse-cvtss2si-2.c: Likewise.
++	* gcc.target/i386/sse-cvttss2si-2.c: Likewise.
++	* gcc.target/i386/sse2-cvtsd2si-2.c: Likewise.
++	* gcc.target/i386/sse2-cvtsi2sd-2.c: Likewise.
++	* gcc.target/i386/sse2-cvttsd2si-2.c: Likewise.
++	* gcc.target/i386/sse2-init-v2di-2.c: Likewise.
++	* gcc.target/i386/sse2-movq-2.c: Likewise.
++	* gcc.target/i386/sse2-movq-3.c: Likewise.
++	* gcc.target/i386/sse4_1-insertps-3.c: Likewise.
++	* gcc.target/i386/sse4_1-pextrq.c: Likewise.
++	* gcc.target/i386/sse4_1-pinsrq.c: Likewise.
++	* gcc.target/i386/sse4_2-crc32q.c: Likewise.
++	* gcc.target/i386/sse4_2-popcntq.c: Likewise.
++	* gcc.target/i386/ssefn-1.c: Likewise.
++	* gcc.target/i386/ssefn-2.c: Likewise.
++	* gcc.target/i386/sseregparm-1.c: Likewise.
++	* gcc.target/i386/sseregparm-2.c: Likewise.
++	* gcc.target/i386/sseregparm-3.c: Likewise.
++	* gcc.target/i386/sseregparm-4.c: Likewise.
++	* gcc.target/i386/sseregparm-5.c: Likewise.
++	* gcc.target/i386/sseregparm-6.c: Likewise.
++	* gcc.target/i386/sseregparm-7.c: Likewise.
++	* gcc.target/i386/sseregparm-8.c: Likewise.
++	* gcc.target/i386/stack-realign.c: Likewise.
++	* gcc.target/i386/stack-usage-realign.c: Likewise.
++	* gcc.target/i386/stackalign/asm-1.c: Likewise.
++	* gcc.target/i386/stackalign/longlong-1.c: Likewise.
++	* gcc.target/i386/stackalign/longlong-2.c: Likewise.
++	* gcc.target/i386/stackalign/return-1.c: Likewise.
++	* gcc.target/i386/stackalign/return-2.c: Likewise.
++	* gcc.target/i386/stackalign/return-3.c: Likewise.
++	* gcc.target/i386/tailcall-1.c: Likewise.
++	* gcc.target/i386/tbm-2.c: Likewise.
++	* gcc.target/i386/udivmod-7.c: Likewise.
++	* gcc.target/i386/udivmod-8.c: Likewise.
++	* gcc.target/i386/unroll-1.c: Likewise.
++	* gcc.target/i386/vararg-1.c: Likewise.
++	* gcc.target/i386/vararg-2.c: Likewise.
++	* gcc.target/i386/vect8-ret.c: Likewise.
++	* gcc.target/i386/vectorize5.c: Likewise.
++	* gcc.target/i386/wmul-1.c: Likewise.
++	* gcc.target/i386/wmul-2.c: Likewise.
++	* gcc.target/i386/wrfsbase-1.c: Likewise.
++	* gcc.target/i386/wrfsbase-2.c: Likewise.
++	* gcc.target/i386/wrgsbase-1.c: Likewise.
++	* gcc.target/i386/wrgsbase-2.c: Likewise.
++	* gcc.target/i386/xop-pcmov.c: Likewise.
++	* gcc.target/i386/xop-pcmov2.c: Likewise.
++	* gcc.target/i386/xop-rotate1-vector.c: Likewise.
++	* gcc.target/i386/xop-rotate2-vector.c: Likewise.
++	* gcc.target/i386/xop-rotate3-vector.c: Likewise.
++	* gcc.target/i386/xop-shift1-vector.c: Likewise.
++	* gcc.target/i386/xop-shift2-vector.c: Likewise.
++	* gcc.target/i386/xop-shift3-vector.c: Likewise.
++	* gcc.target/i386/zee.c: Likewise.
++	* gcc.target/x86_64/abi/callabi/callabi.exp: Likewise.
++	* gfortran.dg/compiler-directive_2.f: Likewise.
++	* gfortran.dg/g77/20010216-1.f: Likewise.
++	* gfortran.dg/gomp/pr39152.f90: Likewise.
++	* gfortran.dg/pr33794.f90: Likewise.
++
++2011-07-07  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* lib/target-supports.exp (check_effective_target_ia32): New.
++	(check_effective_target_x32): Likewise.
++	(check_effective_target_vect_cmdline_needed): Also check x32.
+diff --git a/gcc/testsuite/c-c++-common/dfp/func-vararg-alternate-d128-2.c b/gcc/testsuite/c-c++-common/dfp/func-vararg-alternate-d128-2.c
+index 2960c35..f2e4dee 100644
+--- a/gcc/testsuite/c-c++-common/dfp/func-vararg-alternate-d128-2.c
++++ b/gcc/testsuite/c-c++-common/dfp/func-vararg-alternate-d128-2.c
+@@ -1,4 +1,4 @@
+-/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-options "-mpreferred-stack-boundary=2" } */
+ 
+ /* Simple test of vararg passing for problematic types with and without
+diff --git a/gcc/testsuite/c-c++-common/dfp/func-vararg-mixed-2.c b/gcc/testsuite/c-c++-common/dfp/func-vararg-mixed-2.c
+index 893cdae..02cafb0 100644
+--- a/gcc/testsuite/c-c++-common/dfp/func-vararg-mixed-2.c
++++ b/gcc/testsuite/c-c++-common/dfp/func-vararg-mixed-2.c
+@@ -1,4 +1,4 @@
+-/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-options "-mpreferred-stack-boundary=2" } */
+ 
+ /* C99 6.5.2.2 Function calls.
+diff --git a/gcc/testsuite/g++.dg/abi/bitfield3.C b/gcc/testsuite/g++.dg/abi/bitfield3.C
+index b96c9ed..632bc5c 100644
+--- a/gcc/testsuite/g++.dg/abi/bitfield3.C
++++ b/gcc/testsuite/g++.dg/abi/bitfield3.C
+@@ -1,10 +1,9 @@
+ // Test for oversized bitfield alignment in structs on IA-32
+-// { dg-do run { target i?86-*-* x86_64-*-* } }
++// { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } }
+ // { dg-options "-O2" }
+ // Cygwin and mingw32 default to MASK_ALIGN_DOUBLE. Override to ensure
+ // 4-byte alignment.
+ // { dg-options "-mno-align-double" { target i?86-*-cygwin* i?86-*-mingw* } }
+-// { dg-require-effective-target ilp32 }
+ 
+ struct A
+ {
+diff --git a/gcc/testsuite/g++.dg/eh/pr38662.C b/gcc/testsuite/g++.dg/eh/pr38662.C
+index 5da0f97..294a129 100644
+--- a/gcc/testsuite/g++.dg/eh/pr38662.C
++++ b/gcc/testsuite/g++.dg/eh/pr38662.C
+@@ -1,4 +1,4 @@
+-// { dg-do compile { target { { i?86-*-* x86_64-*-* } && ilp32 } } }
++// { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } }
+ class E { };
+ 
+ class T {
+diff --git a/gcc/testsuite/g++.dg/ext/attrib36.C b/gcc/testsuite/g++.dg/ext/attrib36.C
+index 5434cb9..625ffe6 100644
+--- a/gcc/testsuite/g++.dg/ext/attrib36.C
++++ b/gcc/testsuite/g++.dg/ext/attrib36.C
+@@ -1,5 +1,5 @@
+ // PR c++/43031
+-// { dg-do compile { target { { i?86-*-* x86_64-*-* } && ilp32 } } }
++// { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } }
+ 
+ class T;
+ class L { };
+diff --git a/gcc/testsuite/g++.dg/ext/attrib37.C b/gcc/testsuite/g++.dg/ext/attrib37.C
+index d12c176..5aacac6 100644
+--- a/gcc/testsuite/g++.dg/ext/attrib37.C
++++ b/gcc/testsuite/g++.dg/ext/attrib37.C
+@@ -1,5 +1,5 @@
+ // PR c++/43093
+-// { dg-do compile { target { { i?86-*-* x86_64-*-* } && ilp32 } } }
++// { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } }
+ 
+ struct S {
+   int x;
+diff --git a/gcc/testsuite/g++.dg/ext/attrib8.C b/gcc/testsuite/g++.dg/ext/attrib8.C
+index 7d99132..130fe25 100644
+--- a/gcc/testsuite/g++.dg/ext/attrib8.C
++++ b/gcc/testsuite/g++.dg/ext/attrib8.C
+@@ -1,6 +1,5 @@
+ // PR 8656
+-// { dg-do compile { target i?86-*-* x86_64-*-* } }
+-// { dg-require-effective-target ilp32 }
++// { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } }
+ 
+ extern int * (__attribute__((stdcall)) *fooPtr)( void);
+ int * __attribute__((stdcall)) myFn01( void) { return 0; }
+diff --git a/gcc/testsuite/g++.dg/ext/tmplattr1.C b/gcc/testsuite/g++.dg/ext/tmplattr1.C
+index 111e344..16a32ce 100644
+--- a/gcc/testsuite/g++.dg/ext/tmplattr1.C
++++ b/gcc/testsuite/g++.dg/ext/tmplattr1.C
+@@ -1,6 +1,5 @@
+ // PR c++/24260
+-// { dg-do compile { target i?86-*-* x86_64-*-* } }
+-// { dg-require-effective-target ilp32 }
++// { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } }
+ 
+ #define stdcall __attribute__((stdcall))
+ 
+diff --git a/gcc/testsuite/g++.dg/inherit/override-attribs.C b/gcc/testsuite/g++.dg/inherit/override-attribs.C
+index e28b8d4..6f5c928 100644
+--- a/gcc/testsuite/g++.dg/inherit/override-attribs.C
++++ b/gcc/testsuite/g++.dg/inherit/override-attribs.C
+@@ -1,6 +1,5 @@
+ // PR c++/14688
+-// { dg-do compile { target i?86-*-* x86_64-*-* } }
+-// { dg-require-effective-target ilp32 }
++// { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } }
+ 
+ class one
+ {
+diff --git a/gcc/testsuite/g++.dg/opt/inline9.C b/gcc/testsuite/g++.dg/opt/inline9.C
+index 10bc54c..4fc556f 100644
+--- a/gcc/testsuite/g++.dg/opt/inline9.C
++++ b/gcc/testsuite/g++.dg/opt/inline9.C
+@@ -3,7 +3,7 @@
+ // Testcase by Alan Modra <amodra@bigpond.net.au>
+ // { dg-do run }
+ // { dg-options "-O" }
+-// { dg-options "-O -mtune=i686" { target { { i?86-*-* x86_64-*-* } && ilp32 } } }
++// { dg-options "-O -mtune=i686" { target { { i?86-*-* x86_64-*-* } && ia32 } } }
+ 
+ struct thread_info
+ {
+diff --git a/gcc/testsuite/g++.dg/opt/life1.C b/gcc/testsuite/g++.dg/opt/life1.C
+index f029767..42fd744 100644
+--- a/gcc/testsuite/g++.dg/opt/life1.C
++++ b/gcc/testsuite/g++.dg/opt/life1.C
+@@ -1,7 +1,6 @@
+ // This testcase did not set up the pic register on IA-32 due
+ // to bug in calculate_global_regs_live EH edge handling.
+-// { dg-do compile { target i?86-*-linux* x86_64-*-linux* } }
+-// { dg-require-effective-target ilp32 }
++// { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } }
+ // { dg-require-effective-target fpic }
+ // { dg-options "-O2 -fPIC" }
+ 
+diff --git a/gcc/testsuite/g++.dg/opt/longbranch2.C b/gcc/testsuite/g++.dg/opt/longbranch2.C
+index f2a3a78..de63f69 100644
+--- a/gcc/testsuite/g++.dg/opt/longbranch2.C
++++ b/gcc/testsuite/g++.dg/opt/longbranch2.C
+@@ -2,7 +2,7 @@
+ // Originator: thor@math.tu-berlin.de
+ 
+ // { dg-do compile }
+-// { dg-options "-O3 -funroll-loops -mtune=k6 -fomit-frame-pointer" { target { { i?86-*-* x86_64-*-* } && ilp32 } } }
++// { dg-options "-O3 -funroll-loops -mtune=k6 -fomit-frame-pointer" { target { { i?86-*-* x86_64-*-* } && ia32 } } }
+ 
+ 
+ // This used to fail to assemble because of an out-of-range 'loop' instructions.
+diff --git a/gcc/testsuite/g++.dg/opt/nrv12.C b/gcc/testsuite/g++.dg/opt/nrv12.C
+index 944dddd..5593375 100644
+--- a/gcc/testsuite/g++.dg/opt/nrv12.C
++++ b/gcc/testsuite/g++.dg/opt/nrv12.C
+@@ -1,7 +1,6 @@
+-/* Verify that gimple-level NRV is occurring even for RESULT_DECLs.  *./
+-/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
++/* Verify that gimple-level NRV is occurring even for RESULT_DECLs.  */
++/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-options "-O -fdump-tree-optimized" } */
+-/* { dg-require-effective-target ilp32 } */
+ 
+ struct P
+ {
+diff --git a/gcc/testsuite/g++.dg/opt/reg-stack4.C b/gcc/testsuite/g++.dg/opt/reg-stack4.C
+index b1b7434..5707a38 100644
+--- a/gcc/testsuite/g++.dg/opt/reg-stack4.C
++++ b/gcc/testsuite/g++.dg/opt/reg-stack4.C
+@@ -5,7 +5,7 @@
+ // deleted a valid edge.
+ 
+ // { dg-do compile }
+-// { dg-options "-mtune=i586 -O2" { target { { i?86-*-* x86_64-*-* } && ilp32 } } }
++// { dg-options "-mtune=i586 -O2" { target { { i?86-*-* x86_64-*-* } && ia32 } } }
+ 
+ struct array {
+   double data;
+diff --git a/gcc/testsuite/g++.dg/other/pr35504.C b/gcc/testsuite/g++.dg/other/pr35504.C
+index 58422f2..a37b8b3 100644
+--- a/gcc/testsuite/g++.dg/other/pr35504.C
++++ b/gcc/testsuite/g++.dg/other/pr35504.C
+@@ -1,4 +1,4 @@
+-// { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } }
++// { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } }
+ 
+ #define ATTR0 __attribute__((__regparm__(0)))
+ #define ATTR1 __attribute__((__regparm__(1)))
+diff --git a/gcc/testsuite/g++.dg/other/pr39496.C b/gcc/testsuite/g++.dg/other/pr39496.C
+index 3791434..f7f2433 100644
+--- a/gcc/testsuite/g++.dg/other/pr39496.C
++++ b/gcc/testsuite/g++.dg/other/pr39496.C
+@@ -1,5 +1,5 @@
+ // PR target/39496
+-// { dg-do compile { target { { i?86-*-linux* x86_64-*-linux* } && ilp32 } } }
++// { dg-do compile { target { { i?86-*-linux* x86_64-*-linux* } && ia32 } } }
+ // { dg-options "-O0 -fverbose-asm -fno-omit-frame-pointer -mtune=i686 -msse2 -mfpmath=sse" }
+ // { dg-require-effective-target sse2 }
+ // Verify that {foo,bar}{,2}param are all passed on the stack, using
+diff --git a/gcc/testsuite/g++.dg/torture/stackalign/eh-fastcall-1.C b/gcc/testsuite/g++.dg/torture/stackalign/eh-fastcall-1.C
+index 4b849a2..2c24ea3 100644
+--- a/gcc/testsuite/g++.dg/torture/stackalign/eh-fastcall-1.C
++++ b/gcc/testsuite/g++.dg/torture/stackalign/eh-fastcall-1.C
+@@ -1,4 +1,4 @@
+-/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ #include "check.h"
+ 
+diff --git a/gcc/testsuite/g++.dg/torture/stackalign/eh-thiscall-1.C b/gcc/testsuite/g++.dg/torture/stackalign/eh-thiscall-1.C
+index de9bed5..403497a 100644
+--- a/gcc/testsuite/g++.dg/torture/stackalign/eh-thiscall-1.C
++++ b/gcc/testsuite/g++.dg/torture/stackalign/eh-thiscall-1.C
+@@ -1,4 +1,4 @@
+-/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ #include "check.h"
+ 
+diff --git a/gcc/testsuite/g++.dg/torture/stackalign/stdcall-1.C b/gcc/testsuite/g++.dg/torture/stackalign/stdcall-1.C
+index 393b37e..18c02be 100644
+--- a/gcc/testsuite/g++.dg/torture/stackalign/stdcall-1.C
++++ b/gcc/testsuite/g++.dg/torture/stackalign/stdcall-1.C
+@@ -1,4 +1,4 @@
+-// { dg-do compile { target { { i?86-*-* x86_64-*-* } && ilp32 } } }
++// { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } }
+ 
+ // This case is to detect an assertion failure in stack branch development.
+ 
+diff --git a/gcc/testsuite/g++.dg/torture/stackalign/unwind-0.C b/gcc/testsuite/g++.dg/torture/stackalign/unwind-0.C
+index f8166eb..b1e79d8 100644
+--- a/gcc/testsuite/g++.dg/torture/stackalign/unwind-0.C
++++ b/gcc/testsuite/g++.dg/torture/stackalign/unwind-0.C
+@@ -1,4 +1,4 @@
+-/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ #include "test-unwind.h"
+ 
+diff --git a/gcc/testsuite/g++.dg/torture/stackalign/unwind-1.C b/gcc/testsuite/g++.dg/torture/stackalign/unwind-1.C
+index 70dce74..d61b1ba 100644
+--- a/gcc/testsuite/g++.dg/torture/stackalign/unwind-1.C
++++ b/gcc/testsuite/g++.dg/torture/stackalign/unwind-1.C
+@@ -1,4 +1,4 @@
+-/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ #include "test-unwind.h"
+ 
+diff --git a/gcc/testsuite/g++.dg/torture/stackalign/unwind-2.C b/gcc/testsuite/g++.dg/torture/stackalign/unwind-2.C
+index 791eeb5..7ed0a8d 100644
+--- a/gcc/testsuite/g++.dg/torture/stackalign/unwind-2.C
++++ b/gcc/testsuite/g++.dg/torture/stackalign/unwind-2.C
+@@ -1,4 +1,4 @@
+-/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ #include "test-unwind.h"
+ 
+diff --git a/gcc/testsuite/g++.dg/torture/stackalign/unwind-3.C b/gcc/testsuite/g++.dg/torture/stackalign/unwind-3.C
+index 29dee2d..e3368bf 100644
+--- a/gcc/testsuite/g++.dg/torture/stackalign/unwind-3.C
++++ b/gcc/testsuite/g++.dg/torture/stackalign/unwind-3.C
+@@ -1,4 +1,4 @@
+-/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ #include "test-unwind.h"
+ 
+diff --git a/gcc/testsuite/g++.dg/torture/stackalign/unwind-4.C b/gcc/testsuite/g++.dg/torture/stackalign/unwind-4.C
+index a896176..fddf276 100644
+--- a/gcc/testsuite/g++.dg/torture/stackalign/unwind-4.C
++++ b/gcc/testsuite/g++.dg/torture/stackalign/unwind-4.C
+@@ -1,4 +1,4 @@
+-/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ #include "test-unwind.h"
+ 
+diff --git a/gcc/testsuite/g++.dg/torture/stackalign/unwind-5.C b/gcc/testsuite/g++.dg/torture/stackalign/unwind-5.C
+index 514e4e7..e3e1a85 100644
+--- a/gcc/testsuite/g++.dg/torture/stackalign/unwind-5.C
++++ b/gcc/testsuite/g++.dg/torture/stackalign/unwind-5.C
+@@ -1,4 +1,4 @@
+-/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ #include "test-unwind.h"
+ 
+diff --git a/gcc/testsuite/g++.dg/torture/stackalign/unwind-6.C b/gcc/testsuite/g++.dg/torture/stackalign/unwind-6.C
+index a888ca1..f1188f8 100644
+--- a/gcc/testsuite/g++.dg/torture/stackalign/unwind-6.C
++++ b/gcc/testsuite/g++.dg/torture/stackalign/unwind-6.C
+@@ -1,4 +1,4 @@
+-/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ #include "test-unwind.h"
+ 
+diff --git a/gcc/testsuite/g++.dg/warn/pr15774-1.C b/gcc/testsuite/g++.dg/warn/pr15774-1.C
+index efd4dae..116ec83 100644
+--- a/gcc/testsuite/g++.dg/warn/pr15774-1.C
++++ b/gcc/testsuite/g++.dg/warn/pr15774-1.C
+@@ -1,4 +1,4 @@
+-// { dg-do compile { target { { i?86-*-* x86_64-*-* } && ilp32 } } }
++// { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } }
+ // Test that an new declartion with different attributes then old one fail.
+ extern void foo (int); // { dg-error "ambiguates old declaration" }
+ 
+diff --git a/gcc/testsuite/g++.dg/warn/pr15774-2.C b/gcc/testsuite/g++.dg/warn/pr15774-2.C
+index f890b7a..5002d54 100644
+--- a/gcc/testsuite/g++.dg/warn/pr15774-2.C
++++ b/gcc/testsuite/g++.dg/warn/pr15774-2.C
+@@ -1,4 +1,4 @@
+-// { dg-do compile { target { { i?86-*-* x86_64-*-* } && ilp32 } } }
++// { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } }
+ // Test that old declaration is used, if new one has no attributes.
+ extern void __attribute__((stdcall)) foo (int);
+ 
+diff --git a/gcc/testsuite/g++.old-deja/g++.ext/attrib1.C b/gcc/testsuite/g++.old-deja/g++.ext/attrib1.C
+index e879791..99f48e4 100644
+--- a/gcc/testsuite/g++.old-deja/g++.ext/attrib1.C
++++ b/gcc/testsuite/g++.old-deja/g++.ext/attrib1.C
+@@ -1,5 +1,4 @@
+-// { dg-do assemble { target i?86-*-* x86_64-*-* } }
+-// { dg-require-effective-target ilp32 }
++// { dg-do assemble { target { { i?86-*-* x86_64-*-* } && ia32 } } }
+ // Test for using prefix attributes in a parameter decl.
+ // Contributed by Jason Merrill <jason@cygnus.com>
+ 
+diff --git a/gcc/testsuite/g++.old-deja/g++.ext/attrib2.C b/gcc/testsuite/g++.old-deja/g++.ext/attrib2.C
+index 09b2bf2..c79677b 100644
+--- a/gcc/testsuite/g++.old-deja/g++.ext/attrib2.C
++++ b/gcc/testsuite/g++.old-deja/g++.ext/attrib2.C
+@@ -1,5 +1,4 @@
+-// { dg-do run { target i?86-*-* x86_64-*-* } }
+-// { dg-require-effective-target ilp32 }
++// { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } }
+ // Test that stdcall doesn't prevent us from using op delete.
+ // Contributed by Jason Merrill <jason@cygnus.com>
+ 
+diff --git a/gcc/testsuite/g++.old-deja/g++.ext/attrib3.C b/gcc/testsuite/g++.old-deja/g++.ext/attrib3.C
+index 7d9c70e..db9e189 100644
+--- a/gcc/testsuite/g++.old-deja/g++.ext/attrib3.C
++++ b/gcc/testsuite/g++.old-deja/g++.ext/attrib3.C
+@@ -1,5 +1,4 @@
+-// { dg-do run { target i?86-*-* x86_64-*-* } }
+-// { dg-require-effective-target ilp32 }
++// { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } }
+ // Test for proper handling of attributes in template instantiation.
+ // Contributed by Jason Merrill <jason@cygnus.com>
+ 
+diff --git a/gcc/testsuite/g++.old-deja/g++.pt/asm2.C b/gcc/testsuite/g++.old-deja/g++.pt/asm2.C
+index 7a70637..b8572c8 100644
+--- a/gcc/testsuite/g++.old-deja/g++.pt/asm2.C
++++ b/gcc/testsuite/g++.old-deja/g++.pt/asm2.C
+@@ -1,5 +1,4 @@
+-// { dg-do assemble { target i?86-*-linux* x86_64-*-linux* } }
+-// { dg-require-effective-target ilp32 }
++// { dg-do assemble { target { { i?86-*-* x86_64-*-* } && ia32 } } }
+ // We'd use ebx with 32-bit pic code, so require nonpic.
+ // { dg-require-effective-target nonpic }
+ // Origin: "Weidmann, Nicholas" <nicholas.weidmann@swx.ch>
+diff --git a/gcc/testsuite/gcc.c-torture/compile/20000804-1.c b/gcc/testsuite/gcc.c-torture/compile/20000804-1.c
+index 0a63a32..8d2e79f 100644
+--- a/gcc/testsuite/gcc.c-torture/compile/20000804-1.c
++++ b/gcc/testsuite/gcc.c-torture/compile/20000804-1.c
+@@ -1,7 +1,7 @@
+ /* This does not work on m68hc11 or h8300 due to the use of an asm
+    statement to force a 'long long' (64-bits) to go in a register.  */
+ /* { dg-do assemble } */
+-/* { dg-skip-if "" { { i?86-*-* x86_64-*-* } && { ilp32 && { ! nonpic } } } { "*" } { "" } } */
++/* { dg-skip-if "" { { i?86-*-* x86_64-*-* } && { ia32 && { ! nonpic } } } { "*" } { "" } } */
+ /* { dg-skip-if "No 64-bit registers" { m32c-*-* } { "*" } { "" } } */
+ /* { dg-skip-if "Not enough 64-bit registers" { pdp11-*-* } { "-O0" } { "" } } */
+ /* { dg-xfail-if "" { m6811-*-* m6812-*-* h8300-*-* } { "*" } { "" } } */
+diff --git a/gcc/testsuite/gcc.c-torture/compile/pr16566-2.c b/gcc/testsuite/gcc.c-torture/compile/pr16566-2.c
+index 2f7a106..73cf05a 100644
+--- a/gcc/testsuite/gcc.c-torture/compile/pr16566-2.c
++++ b/gcc/testsuite/gcc.c-torture/compile/pr16566-2.c
+@@ -1,6 +1,6 @@
+ /* ICE with flexible arrays in non-lvalue structures.  Bug 16566
+    (comment #5).  */
+-/* { dg-options "-Wno-psabi" { target { { i?86-*-* x86_64-*-* } && lp64 } } } */
++/* { dg-options "-Wno-psabi" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } */
+ 
+ struct A
+ {
+diff --git a/gcc/testsuite/gcc.c-torture/execute/ieee/ieee.exp b/gcc/testsuite/gcc.c-torture/execute/ieee/ieee.exp
+index 25009e4..d15e90a 100644
+--- a/gcc/testsuite/gcc.c-torture/execute/ieee/ieee.exp
++++ b/gcc/testsuite/gcc.c-torture/execute/ieee/ieee.exp
+@@ -44,7 +44,7 @@ set additional_flags "-fno-inline"
+ if [istarget "i\[34567\]86-*-*"] then {
+   lappend additional_flags "-ffloat-store"
+ }
+-if { [istarget "x86_64-*-*"] && [check_effective_target_ilp32] } then {
++if { [istarget "x86_64-*-*"] && [check_effective_target_ia32] } then {
+   lappend additional_flags "-ffloat-store"
+ }
+ if [istarget "m68k-*-*"] then {
+diff --git a/gcc/testsuite/gcc.dg/20020108-1.c b/gcc/testsuite/gcc.dg/20020108-1.c
+index d61944c..579a228 100644
+--- a/gcc/testsuite/gcc.dg/20020108-1.c
++++ b/gcc/testsuite/gcc.dg/20020108-1.c
+@@ -5,7 +5,7 @@
+    is not valid general_operand in HImode.  */
+ /* { dg-do compile } */
+ /* { dg-options "-O2" } */
+-/* { dg-options "-O2 -mtune=i686" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O2 -mtune=i686" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ 
+ void
+diff --git a/gcc/testsuite/gcc.dg/20020122-2.c b/gcc/testsuite/gcc.dg/20020122-2.c
+index 275dcee..2499221 100644
+--- a/gcc/testsuite/gcc.dg/20020122-2.c
++++ b/gcc/testsuite/gcc.dg/20020122-2.c
+@@ -3,7 +3,7 @@
+   
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fprefetch-loop-arrays -w" } */
+-/* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ extern int access( char* );
+ extern int a();
+diff --git a/gcc/testsuite/gcc.dg/20020122-3.c b/gcc/testsuite/gcc.dg/20020122-3.c
+index 28f6871..e39bd23 100644
+--- a/gcc/testsuite/gcc.dg/20020122-3.c
++++ b/gcc/testsuite/gcc.dg/20020122-3.c
+@@ -4,7 +4,7 @@
+ 
+ /* { dg-do compile } */
+ /* { dg-options "-Os -fprefetch-loop-arrays -w" } */
+-/* { dg-options "-Os -fprefetch-loop-arrays -mtune=pentium3 -w" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-Os -fprefetch-loop-arrays -mtune=pentium3 -w" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ int foo (int *p, int n)
+ {
+diff --git a/gcc/testsuite/gcc.dg/20020206-1.c b/gcc/testsuite/gcc.dg/20020206-1.c
+index 837718b..4b3d0fc 100644
+--- a/gcc/testsuite/gcc.dg/20020206-1.c
++++ b/gcc/testsuite/gcc.dg/20020206-1.c
+@@ -4,7 +4,7 @@
+ 
+ /* { dg-do run } */
+ /* { dg-options "-O2 -fprefetch-loop-arrays -w" } */
+-/* { dg-options "-O2 -fprefetch-loop-arrays -mtune=pentium3 -w" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O2 -fprefetch-loop-arrays -mtune=pentium3 -w" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ 
+ struct reload
+diff --git a/gcc/testsuite/gcc.dg/20020219-1.c b/gcc/testsuite/gcc.dg/20020219-1.c
+index 3664949..ffdf19a 100644
+--- a/gcc/testsuite/gcc.dg/20020219-1.c
++++ b/gcc/testsuite/gcc.dg/20020219-1.c
+@@ -8,11 +8,13 @@
+    IA64 hpux in ILP32 mode because extending x - 1 before adding the
+    array offset gives a different answer then adding first and then
+    extending.  The underlying problem is the same as with hppa, x - 1 is
+-   not a legal data address.  */
++   not a legal data address.  It also fails on x32 targets for the
++   same reason.  */
+ /* { dg-do run } */
+ /* { dg-options "-O2" } */
+ /* { dg-options "-O2 -mdisable-indexing" { target hppa*-*-hpux* } } */
+ /* { dg-skip-if "" { "ia64-*-hpux*" } "*" "-mlp64" } */
++/* { dg-skip-if "" { { i?86-*-* x86_64-*-* } && x32 } { "*" } { "" } } */
+ 
+ /* Disable the test entirely for 16-bit targets.  */
+ #if __INT_MAX__ > 32767
+diff --git a/gcc/testsuite/gcc.dg/20020310-1.c b/gcc/testsuite/gcc.dg/20020310-1.c
+index bdd2967..7f35e9b 100644
+--- a/gcc/testsuite/gcc.dg/20020310-1.c
++++ b/gcc/testsuite/gcc.dg/20020310-1.c
+@@ -2,7 +2,7 @@
+    This testcase was miscompiled because of an rtx sharing bug.  */
+ /* { dg-do run } */
+ /* { dg-options "-O2" } */
+-/* { dg-options "-O2 -mtune=i586" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O2 -mtune=i586" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ struct A
+ {
+diff --git a/gcc/testsuite/gcc.dg/20020411-1.c b/gcc/testsuite/gcc.dg/20020411-1.c
+index 47a8fed..55ca299 100644
+--- a/gcc/testsuite/gcc.dg/20020411-1.c
++++ b/gcc/testsuite/gcc.dg/20020411-1.c
+@@ -3,7 +3,7 @@
+    for its mode.  */
+ /* { dg-do compile } */
+ /* { dg-options "-O2" } */
+-/* { dg-options "-O2 -march=i686" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O2 -march=i686" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ #if __INT_MAX__ > 32767
+ 
+diff --git a/gcc/testsuite/gcc.dg/20020418-2.c b/gcc/testsuite/gcc.dg/20020418-2.c
+index 93688d2..56094e7 100644
+--- a/gcc/testsuite/gcc.dg/20020418-2.c
++++ b/gcc/testsuite/gcc.dg/20020418-2.c
+@@ -1,7 +1,7 @@
+ /* PR optimization/6010 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -funroll-all-loops" } */
+-/* { dg-options "-O2 -funroll-all-loops -march=pentium3" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O2 -funroll-all-loops -march=pentium3" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ void bar (float);
+ 
+diff --git a/gcc/testsuite/gcc.dg/20020426-2.c b/gcc/testsuite/gcc.dg/20020426-2.c
+index 3a892ed..9ad7a54 100644
+--- a/gcc/testsuite/gcc.dg/20020426-2.c
++++ b/gcc/testsuite/gcc.dg/20020426-2.c
+@@ -2,7 +2,7 @@
+    Distilled from zlib sources.  */
+ /* { dg-do run } */
+ /* { dg-options "-O2" } */
+-/* { dg-options "-O2 -frename-registers -fomit-frame-pointer -fPIC -mtune=i686" { target { { i?86-*-* x86_64-*-* } && { ilp32 && fpic } } } } */
++/* { dg-options "-O2 -frename-registers -fomit-frame-pointer -fPIC -mtune=i686" { target { { i?86-*-* x86_64-*-* } && { ia32 && fpic } } } } */
+ 
+ extern void exit (int);
+ 
+diff --git a/gcc/testsuite/gcc.dg/20020517-1.c b/gcc/testsuite/gcc.dg/20020517-1.c
+index 032ccd2..74c6b3e 100644
+--- a/gcc/testsuite/gcc.dg/20020517-1.c
++++ b/gcc/testsuite/gcc.dg/20020517-1.c
+@@ -2,7 +2,7 @@
+    was not sign-extended for QImode.  */
+ /* { dg-do run } */
+ /* { dg-options "-O2" } */
+-/* { dg-options "-O2 -mtune=i686" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O2 -mtune=i686" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ #include <limits.h>
+ 
+diff --git a/gcc/testsuite/gcc.dg/20030204-1.c b/gcc/testsuite/gcc.dg/20030204-1.c
+index 701ded2..6b8ea4d 100644
+--- a/gcc/testsuite/gcc.dg/20030204-1.c
++++ b/gcc/testsuite/gcc.dg/20030204-1.c
+@@ -1,7 +1,7 @@
+ /* PR optimization/8555 */
+ /* { dg-do compile } */
+ /* { dg-options "-O -ffast-math -funroll-loops" } */
+-/* { dg-options "-march=pentium3 -O -ffast-math -funroll-loops" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-march=pentium3 -O -ffast-math -funroll-loops" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ 
+ float foo (float *a, int i)
+diff --git a/gcc/testsuite/gcc.dg/20030826-2.c b/gcc/testsuite/gcc.dg/20030826-2.c
+index 32db091..552c77e 100644
+--- a/gcc/testsuite/gcc.dg/20030826-2.c
++++ b/gcc/testsuite/gcc.dg/20030826-2.c
+@@ -1,6 +1,6 @@
+ /* { dg-do run } */
+ /* { dg-options "-O2 -fomit-frame-pointer" } */
+-/* { dg-options "-O2 -fomit-frame-pointer -march=i386" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O2 -fomit-frame-pointer -march=i386" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ extern void abort (void);
+ extern void exit (int);
+diff --git a/gcc/testsuite/gcc.dg/20031102-1.c b/gcc/testsuite/gcc.dg/20031102-1.c
+index 5a02a70..2148381 100644
+--- a/gcc/testsuite/gcc.dg/20031102-1.c
++++ b/gcc/testsuite/gcc.dg/20031102-1.c
+@@ -3,7 +3,7 @@
+ 
+ /* { dg-do run } */
+ /* { dg-options "-O2" } */
+-/* { dg-options "-O2 -march=i686" { target { { i686-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O2 -march=i686" { target { { i686-*-* x86_64-*-* } && ia32 } } } */
+ 
+ /* Verify that reload_cse_move2add doesn't add unexpected CLOBBERs. */
+ 
+diff --git a/gcc/testsuite/gcc.dg/20031202-1.c b/gcc/testsuite/gcc.dg/20031202-1.c
+index c7fbfe5..a5e7845 100644
+--- a/gcc/testsuite/gcc.dg/20031202-1.c
++++ b/gcc/testsuite/gcc.dg/20031202-1.c
+@@ -1,6 +1,6 @@
+ /* { dg-do run } */
+ /* { dg-options "-O2" } */
+-/* { dg-options "-O2 -mtune=i686" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O2 -mtune=i686" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ extern void abort (void);
+ extern void exit (int);
+diff --git a/gcc/testsuite/gcc.dg/20050111-1.c b/gcc/testsuite/gcc.dg/20050111-1.c
+index 7cf04e8..0ad256f 100644
+--- a/gcc/testsuite/gcc.dg/20050111-1.c
++++ b/gcc/testsuite/gcc.dg/20050111-1.c
+@@ -1,7 +1,7 @@
+ /* PR middle-end/19084, rtl-optimization/19348 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2" } */
+-/* { dg-options "-O2 -march=i686" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O2 -march=i686" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ unsigned int
+ foo (unsigned long long x)
+diff --git a/gcc/testsuite/gcc.dg/20050503-1.c b/gcc/testsuite/gcc.dg/20050503-1.c
+index d118b95..200494f 100644
+--- a/gcc/testsuite/gcc.dg/20050503-1.c
++++ b/gcc/testsuite/gcc.dg/20050503-1.c
+@@ -2,7 +2,7 @@
+    Test whether tail call information is propagated through builtin
+    expanders.  */
+ /* { dg-do compile } */
+-/* { dg-skip-if "" { { i?86-*-* x86_64-*-* } && { ilp32 && { ! nonpic } } } { "*" } { "" } } */
++/* { dg-skip-if "" { { i?86-*-* x86_64-*-* } && { ia32 && { ! nonpic } } } { "*" } { "" } } */
+ /* { dg-options "-O2" } */
+ 
+ typedef __SIZE_TYPE__ size_t;
+diff --git a/gcc/testsuite/gcc.dg/array-init-1.c b/gcc/testsuite/gcc.dg/array-init-1.c
+index 0ab8634..14ec955 100644
+--- a/gcc/testsuite/gcc.dg/array-init-1.c
++++ b/gcc/testsuite/gcc.dg/array-init-1.c
+@@ -1,7 +1,7 @@
+ /* Test that both arrays are initialized by store_by_pieces.  */
+ /* { dg-do compile } */
+ /* { dg-options "-O2" } */
+-/* { dg-options "-O2 -mtune=i686" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O2 -mtune=i686" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ struct A { char c[10]; };
+ extern void baz (struct A *);
+diff --git a/gcc/testsuite/gcc.dg/builtin-apply4.c b/gcc/testsuite/gcc.dg/builtin-apply4.c
+index 7a14356..530da71 100644
+--- a/gcc/testsuite/gcc.dg/builtin-apply4.c
++++ b/gcc/testsuite/gcc.dg/builtin-apply4.c
+@@ -1,6 +1,6 @@
+ /* PR tree-optimization/20076 */
+ /* { dg-options "-O2 -Wmissing-noreturn" } */
+-/* { dg-options "-O2 -mno-mmx" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O2 -mno-mmx" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-do run } */
+ 
+ extern void abort (void);
+diff --git a/gcc/testsuite/gcc.dg/dfp/pr31344.c b/gcc/testsuite/gcc.dg/dfp/pr31344.c
+index 0f5e21e..506eef4 100644
+--- a/gcc/testsuite/gcc.dg/dfp/pr31344.c
++++ b/gcc/testsuite/gcc.dg/dfp/pr31344.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O -mtune=i386" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O -mtune=i386" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-options "-O" } */
+ 
+ typedef struct
+diff --git a/gcc/testsuite/gcc.dg/gomp/atomic-11.c b/gcc/testsuite/gcc.dg/gomp/atomic-11.c
+index 397972b..b5647b0 100644
+--- a/gcc/testsuite/gcc.dg/gomp/atomic-11.c
++++ b/gcc/testsuite/gcc.dg/gomp/atomic-11.c
+@@ -1,7 +1,7 @@
+ /* PR middle-end/36877 */
+ /* { dg-do compile } */
+ /* { dg-options "-fopenmp" } */
+-/* { dg-options "-fopenmp -march=i386" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-fopenmp -march=i386" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ int i;
+ float f;
+diff --git a/gcc/testsuite/gcc.dg/graphite/pr40281.c b/gcc/testsuite/gcc.dg/graphite/pr40281.c
+index 255546b..d242754 100644
+--- a/gcc/testsuite/gcc.dg/graphite/pr40281.c
++++ b/gcc/testsuite/gcc.dg/graphite/pr40281.c
+@@ -1,6 +1,6 @@
+ /* { dg-options "-O -fprefetch-loop-arrays -w" } */
+-/* { dg-options "-O -fprefetch-loop-arrays -march=i686 -msse -w" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
+-/* { dg-require-effective-target sse { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O -fprefetch-loop-arrays -march=i686 -msse -w" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
++/* { dg-require-effective-target sse { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ void foo(int);
+ void bar(int n)
+diff --git a/gcc/testsuite/gcc.dg/ia64-sync-1.c b/gcc/testsuite/gcc.dg/ia64-sync-1.c
+index 83c995a..2cfc144 100644
+--- a/gcc/testsuite/gcc.dg/ia64-sync-1.c
++++ b/gcc/testsuite/gcc.dg/ia64-sync-1.c
+@@ -1,7 +1,7 @@
+ /* { dg-do run } */
+ /* { dg-require-effective-target sync_int_long } */
+ /* { dg-options } */
+-/* { dg-options "-march=i486" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-march=i486" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-options "-mcpu=v9" { target sparc*-*-* } } */
+ 
+ /* { dg-message "note: '__sync_fetch_and_nand' changed semantics in GCC 4.4" "" { target *-*-* } 0 } */
+diff --git a/gcc/testsuite/gcc.dg/ia64-sync-2.c b/gcc/testsuite/gcc.dg/ia64-sync-2.c
+index 69fb9b7..d8d4082 100644
+--- a/gcc/testsuite/gcc.dg/ia64-sync-2.c
++++ b/gcc/testsuite/gcc.dg/ia64-sync-2.c
+@@ -1,7 +1,7 @@
+ /* { dg-do run } */
+ /* { dg-require-effective-target sync_int_long } */
+ /* { dg-options } */
+-/* { dg-options "-march=i486" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-march=i486" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-options "-mcpu=v9" { target sparc*-*-* } } */
+ 
+ /* { dg-message "note: '__sync_fetch_and_nand' changed semantics in GCC 4.4" "" { target *-*-* } 0 } */
+diff --git a/gcc/testsuite/gcc.dg/ia64-sync-3.c b/gcc/testsuite/gcc.dg/ia64-sync-3.c
+index 965d435..621e902 100644
+--- a/gcc/testsuite/gcc.dg/ia64-sync-3.c
++++ b/gcc/testsuite/gcc.dg/ia64-sync-3.c
+@@ -1,7 +1,7 @@
+ /* { dg-do run } */
+ /* { dg-require-effective-target sync_int_long } */
+ /* { dg-options } */
+-/* { dg-options "-march=i486" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-march=i486" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-options "-mcpu=v9" { target sparc*-*-* } } */
+ 
+ /* Test basic functionality of the intrinsics.  */
+diff --git a/gcc/testsuite/gcc.dg/ia64-sync-4.c b/gcc/testsuite/gcc.dg/ia64-sync-4.c
+index e78fb4c..eec472f 100644
+--- a/gcc/testsuite/gcc.dg/ia64-sync-4.c
++++ b/gcc/testsuite/gcc.dg/ia64-sync-4.c
+@@ -1,7 +1,7 @@
+ /* { dg-do compile } */
+ /* { dg-require-effective-target sync_int_long } */
+ /* { dg-options "-O2 -finline-functions" } */
+-/* { dg-options "-march=i486" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-march=i486" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-options "-mcpu=v9" { target sparc*-*-* } } */
+ 
+ /* Test inlining __sync_bool_compare_and_swap.  */
+diff --git a/gcc/testsuite/gcc.dg/ifcvt-fabs-1.c b/gcc/testsuite/gcc.dg/ifcvt-fabs-1.c
+index bdf6b39..40c57d8 100644
+--- a/gcc/testsuite/gcc.dg/ifcvt-fabs-1.c
++++ b/gcc/testsuite/gcc.dg/ifcvt-fabs-1.c
+@@ -1,6 +1,6 @@
+ /* { dg-do run } */
+ /* { dg-options "-O" } */
+-/* { dg-options "-O -march=i686" { target { { i686-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O -march=i686" { target { { i686-*-* x86_64-*-* } && ia32 } } } */
+ 
+ extern void abort(void);
+ 
+diff --git a/gcc/testsuite/gcc.dg/invalid-call-1.c b/gcc/testsuite/gcc.dg/invalid-call-1.c
+index 1d19c56..31f66b9 100644
+--- a/gcc/testsuite/gcc.dg/invalid-call-1.c
++++ b/gcc/testsuite/gcc.dg/invalid-call-1.c
+@@ -3,7 +3,7 @@
+ 
+ /* { dg-do compile } */
+ /* { dg-options "-O2" } */
+-/* { dg-options "-O2 -march=i586" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O2 -march=i586" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ typedef void (*fp)(void);
+ extern char* bar(void* a1, int a2);
+diff --git a/gcc/testsuite/gcc.dg/loop-3.c b/gcc/testsuite/gcc.dg/loop-3.c
+index 06428d9..6bdb5ef 100644
+--- a/gcc/testsuite/gcc.dg/loop-3.c
++++ b/gcc/testsuite/gcc.dg/loop-3.c
+@@ -3,7 +3,7 @@
+ 
+ /* { dg-do compile } */
+ /* { dg-options "-O3" } */
+-/* { dg-options "-O3 -mtune=i386" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O3 -mtune=i386" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ #if defined(STACK_SIZE) && (STACK_SIZE < 65536)
+ # define BYTEMEM_SIZE 10000L
+diff --git a/gcc/testsuite/gcc.dg/lower-subreg-1.c b/gcc/testsuite/gcc.dg/lower-subreg-1.c
+index 4de90bd..33be4c4 100644
+--- a/gcc/testsuite/gcc.dg/lower-subreg-1.c
++++ b/gcc/testsuite/gcc.dg/lower-subreg-1.c
+@@ -1,5 +1,6 @@
+ /* { dg-do compile { target { { { ! mips64 } && { ! ia64-*-* } } && { ! spu-*-* } } } } */
+ /* { dg-options "-O -fdump-rtl-subreg1" } */
++/* { dg-skip-if "" { { i?86-*-* x86_64-*-* } && x32 } { "*" } { "" } } */
+ /* { dg-require-effective-target ilp32 } */
+ 
+ long long test (long long a, long long b) { return a | b; }
+diff --git a/gcc/testsuite/gcc.dg/lto/pr47259_0.c b/gcc/testsuite/gcc.dg/lto/pr47259_0.c
+index b959478..7900e5a 100644
+--- a/gcc/testsuite/gcc.dg/lto/pr47259_0.c
++++ b/gcc/testsuite/gcc.dg/lto/pr47259_0.c
+@@ -1,7 +1,6 @@
+ /* { dg-lto-do link } */
+ /* { dg-skip-if "" { ! { x86_64-*-* } } { "*" } { "" } } */
+ /* { dg-lto-options { { -O2 -flto -w } } } */
+-/* { dg-require-effective-target lp64 } */
+ 
+ register int r asm("esi");
+ 
+diff --git a/gcc/testsuite/gcc.dg/nested-calls-1.c b/gcc/testsuite/gcc.dg/nested-calls-1.c
+index 89fdc88..500fed2 100644
+--- a/gcc/testsuite/gcc.dg/nested-calls-1.c
++++ b/gcc/testsuite/gcc.dg/nested-calls-1.c
+@@ -3,7 +3,7 @@
+ 
+ /* { dg-do run } */
+ /* { dg-options "-std=c99 -O -fno-inline" } */
+-/* { dg-options "-std=c99 -O -fno-inline -mtune=i686" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-std=c99 -O -fno-inline -mtune=i686" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ #include <limits.h>
+ 
+diff --git a/gcc/testsuite/gcc.dg/pr20017.c b/gcc/testsuite/gcc.dg/pr20017.c
+index 1fd6d58..47c048f 100644
+--- a/gcc/testsuite/gcc.dg/pr20017.c
++++ b/gcc/testsuite/gcc.dg/pr20017.c
+@@ -6,7 +6,7 @@
+ 
+ /* { dg-do compile } */
+ /* { dg-options "-O1" } */
+-/* { dg-options "-O1 -march=i386" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O1 -march=i386" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ int
+ foo (int *buf, int *p)
+diff --git a/gcc/testsuite/gcc.dg/pr25023.c b/gcc/testsuite/gcc.dg/pr25023.c
+index b8cb7cf..58d962c 100644
+--- a/gcc/testsuite/gcc.dg/pr25023.c
++++ b/gcc/testsuite/gcc.dg/pr25023.c
+@@ -1,7 +1,7 @@
+ /* PR debug/25023 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2" } */
+-/* { dg-options "-O2 -mtune=i686" { target { { i?86-*-* || x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O2 -mtune=i686" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ extern unsigned char v;
+ 
+diff --git a/gcc/testsuite/gcc.dg/pr27671-2.c b/gcc/testsuite/gcc.dg/pr27671-2.c
+index 7882042..11dae10 100644
+--- a/gcc/testsuite/gcc.dg/pr27671-2.c
++++ b/gcc/testsuite/gcc.dg/pr27671-2.c
+@@ -3,7 +3,7 @@
+    simplify_relational_operation_1 in simplify-rtx.c.  */
+ /* { dg-do run } */
+ /* { dg-options "-O1" } */
+-/* { dg-options "-O1 -march=pentium4" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O1 -march=pentium4" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ extern void abort (void) __attribute__ ((noreturn));
+ extern void exit (int) __attribute__ ((noreturn));
+diff --git a/gcc/testsuite/gcc.dg/pr32176.c b/gcc/testsuite/gcc.dg/pr32176.c
+index 6646db0..3017c34 100644
+--- a/gcc/testsuite/gcc.dg/pr32176.c
++++ b/gcc/testsuite/gcc.dg/pr32176.c
+@@ -2,7 +2,7 @@
+ 
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fprefetch-loop-arrays -w" } */
+-/* { dg-options "-O2 -fprefetch-loop-arrays -march=i686 -msse" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O2 -fprefetch-loop-arrays -march=i686 -msse" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ void foo (void)
+ {
+diff --git a/gcc/testsuite/gcc.dg/pr33676.c b/gcc/testsuite/gcc.dg/pr33676.c
+index af65478..79c830e 100644
+--- a/gcc/testsuite/gcc.dg/pr33676.c
++++ b/gcc/testsuite/gcc.dg/pr33676.c
+@@ -1,5 +1,5 @@
+ /* { dg-do run } */
+-/* { dg-options "-O0 -mtune=i386 -fomit-frame-pointer" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O0 -mtune=i386 -fomit-frame-pointer" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ __attribute__((noreturn,noinline)) void abrt (const char *fi, const char *fu)
+ {
+diff --git a/gcc/testsuite/gcc.dg/pr35045.c b/gcc/testsuite/gcc.dg/pr35045.c
+index 0b2b209..bcd01d7 100644
+--- a/gcc/testsuite/gcc.dg/pr35045.c
++++ b/gcc/testsuite/gcc.dg/pr35045.c
+@@ -1,5 +1,5 @@
+ /* { dg-do run } */
+-/* { dg-skip-if "" { { i?86-*-* x86_64-*-* } && { ilp32 && { ! nonpic } } } { "*" } { "" } } */
++/* { dg-skip-if "" { { i?86-*-* x86_64-*-* } && { ia32 && { ! nonpic } } } { "*" } { "" } } */
+ /* { dg-options "-O2 -fgcse-after-reload" } */
+ 
+ extern void abort (void);
+diff --git a/gcc/testsuite/gcc.dg/pr36015.c b/gcc/testsuite/gcc.dg/pr36015.c
+index 456ec6a..fc31535 100644
+--- a/gcc/testsuite/gcc.dg/pr36015.c
++++ b/gcc/testsuite/gcc.dg/pr36015.c
+@@ -1,7 +1,7 @@
+ /* PR target/36015 */
+ /* { dg-do run } */
+ /* { dg-options "-O0" } */
+-/* { dg-options "-O0 -mregparm=3" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O0 -mregparm=3" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ static int test ();
+ 
+diff --git a/gcc/testsuite/gcc.dg/pr36584.c b/gcc/testsuite/gcc.dg/pr36584.c
+index c0b005d..1b6e38c 100644
+--- a/gcc/testsuite/gcc.dg/pr36584.c
++++ b/gcc/testsuite/gcc.dg/pr36584.c
+@@ -1,7 +1,7 @@
+ /* { dg-do run } */
+ /* { dg-options "-O2 -lm" } */
+-/* { dg-options "-O2 -msse2 -mfpmath=sse" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
+-/* { dg-require-effective-target sse2_runtime { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O2 -msse2 -mfpmath=sse" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
++/* { dg-require-effective-target sse2_runtime { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ extern double fabs (double);
+ extern void abort (void);
+diff --git a/gcc/testsuite/gcc.dg/pr36998.c b/gcc/testsuite/gcc.dg/pr36998.c
+index 9315fd5..bf08ed1 100644
+--- a/gcc/testsuite/gcc.dg/pr36998.c
++++ b/gcc/testsuite/gcc.dg/pr36998.c
+@@ -1,7 +1,7 @@
+ /* PR rtl-optimization/36998 */
+ /* { dg-do compile } */
+ /* { dg-options "-Os -fasynchronous-unwind-tables" } */
+-/* { dg-options "-Os -mpreferred-stack-boundary=2 -fasynchronous-unwind-tables" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-Os -mpreferred-stack-boundary=2 -fasynchronous-unwind-tables" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-options "-fno-omit-frame-pointer" { target { avr-*-* } } } */
+ 
+ void foo (const char *, ...) __attribute__ ((noreturn));
+diff --git a/gcc/testsuite/gcc.dg/pr37438.c b/gcc/testsuite/gcc.dg/pr37438.c
+index a6e366d..7365dc9 100644
+--- a/gcc/testsuite/gcc.dg/pr37438.c
++++ b/gcc/testsuite/gcc.dg/pr37438.c
+@@ -1,7 +1,7 @@
+ /* PR target/37438 */
+ /* { dg-do compile } */
+ /* { dg-options "-Os" } */
+-/* { dg-options "-Os -march=i486" { target { { i686-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-Os -march=i486" { target { { i686-*-* x86_64-*-* } && ia32 } } } */
+ 
+ extern int bar (unsigned long long int);
+ extern int baz (const char *, unsigned int, unsigned short);
+diff --git a/gcc/testsuite/gcc.dg/pr37908.c b/gcc/testsuite/gcc.dg/pr37908.c
+index d927807..32946d1 100644
+--- a/gcc/testsuite/gcc.dg/pr37908.c
++++ b/gcc/testsuite/gcc.dg/pr37908.c
+@@ -1,7 +1,7 @@
+ /* { dg-do run } */
+ /* { dg-require-effective-target sync_char_short } */
+ /* { dg-options "-Wsync-nand" } */
+-/* { dg-options "-Wsync-nand -march=i486" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-Wsync-nand -march=i486" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-options "-Wsync-nand -mcpu=v9" { target sparc*-*-* } } */
+ 
+ 
+diff --git a/gcc/testsuite/gcc.dg/pr41241.c b/gcc/testsuite/gcc.dg/pr41241.c
+index b69aa96..42fb2f7 100644
+--- a/gcc/testsuite/gcc.dg/pr41241.c
++++ b/gcc/testsuite/gcc.dg/pr41241.c
+@@ -1,7 +1,7 @@
+ /* PR bootstrap/41241 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fcompare-debug -g" } */
+-/* { dg-options "-O2 -fcompare-debug -g -march=i586 -mtune=i586 -fomit-frame-pointer" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O2 -fcompare-debug -g -march=i586 -mtune=i586 -fomit-frame-pointer" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ typedef struct { int t1; int t2; int t3; } *T;
+ typedef struct { int s; } S;
+diff --git a/gcc/testsuite/gcc.dg/pr41340.c b/gcc/testsuite/gcc.dg/pr41340.c
+index b86f40b..439046a 100644
+--- a/gcc/testsuite/gcc.dg/pr41340.c
++++ b/gcc/testsuite/gcc.dg/pr41340.c
+@@ -1,7 +1,7 @@
+ /* PR debug/41340 */
+ /* { dg-do compile } */
+ /* { dg-options "-O3 -g -fcompare-debug" } */
+-/* { dg-options "-O3 -g -fcompare-debug -march=i686" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O3 -g -fcompare-debug -march=i686" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-skip-if "no long pointers" {  { ! ilp32 } && { ! lp64 } } } */
+ 
+ typedef struct { int t; } *T;
+diff --git a/gcc/testsuite/gcc.dg/pr44136.c b/gcc/testsuite/gcc.dg/pr44136.c
+index e053cf8..31f1924 100644
+--- a/gcc/testsuite/gcc.dg/pr44136.c
++++ b/gcc/testsuite/gcc.dg/pr44136.c
+@@ -1,7 +1,7 @@
+ /* PR debug/44136 */
+ /* { dg-do compile } */
+ /* { dg-options "-w -O2 -g" } */
+-/* { dg-options "-w -Wno-psabi -O2 -g -mno-sse" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-w -Wno-psabi -O2 -g -mno-sse" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ #define vector __attribute((vector_size(16)))
+ vector float a;
+diff --git a/gcc/testsuite/gcc.dg/pr46212.c b/gcc/testsuite/gcc.dg/pr46212.c
+index 9dbb601..3533e25 100644
+--- a/gcc/testsuite/gcc.dg/pr46212.c
++++ b/gcc/testsuite/gcc.dg/pr46212.c
+@@ -1,7 +1,7 @@
+ /* PR rtl-optimization/46212 */
+ /* { dg-do compile } */
+ /* { dg-options "-O3 -funroll-loops" } */
+-/* { dg-options "-O3 -funroll-loops -march=i386" { target { { i686-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O3 -funroll-loops -march=i386" { target { { i686-*-* x86_64-*-* } && ia32 } } } */
+ 
+ static inline unsigned
+ foo (void *x)
+diff --git a/gcc/testsuite/gcc.dg/prefetch-loop-arrays-1.c b/gcc/testsuite/gcc.dg/prefetch-loop-arrays-1.c
+index 59cebc5..024cc1a 100644
+--- a/gcc/testsuite/gcc.dg/prefetch-loop-arrays-1.c
++++ b/gcc/testsuite/gcc.dg/prefetch-loop-arrays-1.c
+@@ -1,7 +1,7 @@
+ /* PR tree-optimization/28887 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fprefetch-loop-arrays -w" } */
+-/* { dg-options "-O2 -fprefetch-loop-arrays -march=i686 -msse -w" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O2 -fprefetch-loop-arrays -march=i686 -msse -w" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ __extension__ typedef __SIZE_TYPE__ size_t;
+ 
+diff --git a/gcc/testsuite/gcc.dg/setjmp-2.c b/gcc/testsuite/gcc.dg/setjmp-2.c
+index 8ad874d..f31f6b2 100644
+--- a/gcc/testsuite/gcc.dg/setjmp-2.c
++++ b/gcc/testsuite/gcc.dg/setjmp-2.c
+@@ -2,7 +2,7 @@
+ /* Origin: Tom Hughes <tom@compton.nu> */
+ /* { dg-do run { target i?86-*-linux* x86_64-*-linux* } } */
+ /* { dg-options "-O -fomit-frame-pointer" } */
+-/* { dg-options "-O -fomit-frame-pointer -march=i386" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O -fomit-frame-pointer -march=i386" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ #include <setjmp.h>
+ #include <signal.h>
+diff --git a/gcc/testsuite/gcc.dg/short-compare-1.c b/gcc/testsuite/gcc.dg/short-compare-1.c
+index 4c47052..b5e01c1 100644
+--- a/gcc/testsuite/gcc.dg/short-compare-1.c
++++ b/gcc/testsuite/gcc.dg/short-compare-1.c
+@@ -3,7 +3,7 @@
+ 
+ /* { dg-do run } */
+ /* { dg-options "-O" } */
+-/* { dg-options "-O -mtune=i686" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O -mtune=i686" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ extern void abort(void);
+ 
+diff --git a/gcc/testsuite/gcc.dg/short-compare-2.c b/gcc/testsuite/gcc.dg/short-compare-2.c
+index 0026a88..bf4e6b4 100644
+--- a/gcc/testsuite/gcc.dg/short-compare-2.c
++++ b/gcc/testsuite/gcc.dg/short-compare-2.c
+@@ -4,7 +4,7 @@
+ 
+ /* { dg-do run } */
+ /* { dg-options "-O" } */
+-/* { dg-options "-O -mtune=i686" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O -mtune=i686" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ extern void abort();
+ 
+diff --git a/gcc/testsuite/gcc.dg/smod-1.c b/gcc/testsuite/gcc.dg/smod-1.c
+index 8ff60de..9a847a1 100644
+--- a/gcc/testsuite/gcc.dg/smod-1.c
++++ b/gcc/testsuite/gcc.dg/smod-1.c
+@@ -3,7 +3,7 @@
+ 
+ /* { dg-do run } */
+ /* { dg-options "-std=c99" } */
+-/* { dg-options "-std=c99 -mtune=i486" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-std=c99 -mtune=i486" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ #include <limits.h>
+ 
+diff --git a/gcc/testsuite/gcc.dg/sync-2.c b/gcc/testsuite/gcc.dg/sync-2.c
+index 7794ffd..e94248c 100644
+--- a/gcc/testsuite/gcc.dg/sync-2.c
++++ b/gcc/testsuite/gcc.dg/sync-2.c
+@@ -1,7 +1,7 @@
+ /* { dg-do run } */
+ /* { dg-require-effective-target sync_char_short } */
+ /* { dg-options "-ansi" } */
+-/* { dg-options "-march=i486" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-march=i486" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-options "-mcpu=v9" { target sparc*-*-* } } */
+ 
+ /* { dg-message "note: '__sync_fetch_and_nand' changed semantics in GCC 4.4" "" { target *-*-* } 0 } */
+diff --git a/gcc/testsuite/gcc.dg/sync-3.c b/gcc/testsuite/gcc.dg/sync-3.c
+index f912405..255faaa 100644
+--- a/gcc/testsuite/gcc.dg/sync-3.c
++++ b/gcc/testsuite/gcc.dg/sync-3.c
+@@ -1,7 +1,7 @@
+ /* { dg-do run } */
+ /* { dg-require-effective-target sync_char_short } */
+ /* { dg-options "-ansi" } */
+-/* { dg-options "-march=i486" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-march=i486" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-options "-mcpu=v9" { target sparc*-*-* } } */
+ 
+ /* Test functionality of the intrinsics for 'short' and 'char'.  */
+diff --git a/gcc/testsuite/gcc.dg/tls/opt-1.c b/gcc/testsuite/gcc.dg/tls/opt-1.c
+index f9399e0..658fc67 100644
+--- a/gcc/testsuite/gcc.dg/tls/opt-1.c
++++ b/gcc/testsuite/gcc.dg/tls/opt-1.c
+@@ -1,6 +1,6 @@
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fPIC" } */
+-/* { dg-options "-O2 -fPIC -mtune=i686" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O2 -fPIC -mtune=i686" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-require-effective-target tls } */
+ /* { dg-require-effective-target fpic } */
+ 
+diff --git a/gcc/testsuite/gcc.dg/tls/opt-2.c b/gcc/testsuite/gcc.dg/tls/opt-2.c
+index 3ede352..868b97c 100644
+--- a/gcc/testsuite/gcc.dg/tls/opt-2.c
++++ b/gcc/testsuite/gcc.dg/tls/opt-2.c
+@@ -4,7 +4,7 @@
+    on IA-32.  */
+ /* { dg-do link } */
+ /* { dg-options "-O2 -ftls-model=initial-exec" } */
+-/* { dg-options "-O2 -ftls-model=initial-exec -march=i686" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O2 -ftls-model=initial-exec -march=i686" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-require-effective-target tls } */
+ /* { dg-require-effective-target tls_runtime  } */
+ 
+diff --git a/gcc/testsuite/gcc.dg/tls/opt-3.c b/gcc/testsuite/gcc.dg/tls/opt-3.c
+index dd37dbc..0f1bbfc 100644
+--- a/gcc/testsuite/gcc.dg/tls/opt-3.c
++++ b/gcc/testsuite/gcc.dg/tls/opt-3.c
+@@ -1,6 +1,6 @@
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fpic" } */
+-/* { dg-options "-O2 -fpic -mregparm=3" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O2 -fpic -mregparm=3" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-require-effective-target tls } */
+ /* { dg-require-effective-target fpic } */
+ 
+diff --git a/gcc/testsuite/gcc.dg/torture/badshift.c b/gcc/testsuite/gcc.dg/torture/badshift.c
+index 7288a37..39d123b 100644
+--- a/gcc/testsuite/gcc.dg/torture/badshift.c
++++ b/gcc/testsuite/gcc.dg/torture/badshift.c
+@@ -2,7 +2,7 @@
+ 
+ /* { dg-do run } */
+ /* { dg-options "" } */
+-/* { dg-options "-march=i386" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-march=i386" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ /* We used to optimize the DImode shift-by-32 to zero because in combine
+    we turned:
+diff --git a/gcc/testsuite/gcc.dg/torture/fp-int-convert-float80-timode.c b/gcc/testsuite/gcc.dg/torture/fp-int-convert-float80-timode.c
+index 5b9bb70..7600994 100644
+--- a/gcc/testsuite/gcc.dg/torture/fp-int-convert-float80-timode.c
++++ b/gcc/testsuite/gcc.dg/torture/fp-int-convert-float80-timode.c
+@@ -2,7 +2,7 @@
+ /* Origin: Joseph Myers <joseph@codesourcery.com> */
+ /* { dg-do run { target i?86-*-* x86_64-*-* ia64-*-* } } */
+ /* { dg-options "" } */
+-/* { dg-options "-mmmx" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-mmmx" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ #include "fp-int-convert.h"
+ 
+diff --git a/gcc/testsuite/gcc.dg/torture/pr20314-2.c b/gcc/testsuite/gcc.dg/torture/pr20314-2.c
+index 8185218..aac02dd 100644
+--- a/gcc/testsuite/gcc.dg/torture/pr20314-2.c
++++ b/gcc/testsuite/gcc.dg/torture/pr20314-2.c
+@@ -1,5 +1,5 @@
+ /* PR inline-asm/20314 */
+-/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && lp64 } } } */
++/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } */
+ /* { dg-do compile { target ia64-*-* powerpc*-*-* } } */
+ 
+ int a, b, c, d, e, f, g, h, i, j, k, l;
+diff --git a/gcc/testsuite/gcc.dg/torture/pr36891.c b/gcc/testsuite/gcc.dg/torture/pr36891.c
+index 53e6163..5a8e5c3 100644
+--- a/gcc/testsuite/gcc.dg/torture/pr36891.c
++++ b/gcc/testsuite/gcc.dg/torture/pr36891.c
+@@ -1,7 +1,7 @@
+ /* { dg-do compile } */
+ /* { dg-options "-ffast-math" } */
+-/* { dg-options "-ffast-math -msse" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
+-/* { dg-require-effective-target sse { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-ffast-math -msse" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
++/* { dg-require-effective-target sse { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ #define __vector __attribute__((vector_size(16) ))
+ __vector float f(void);
+diff --git a/gcc/testsuite/gcc.dg/torture/pr38774.c b/gcc/testsuite/gcc.dg/torture/pr38774.c
+index d6d7fcb..b626194 100644
+--- a/gcc/testsuite/gcc.dg/torture/pr38774.c
++++ b/gcc/testsuite/gcc.dg/torture/pr38774.c
+@@ -1,7 +1,7 @@
+ /* PR rtl-optimization/38774 */
+ /* { dg-do compile } */
+ /* { dg-options "" } */
+-/* { dg-options "-march=i686" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-march=i686" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ extern int bar (void);
+ volatile int g;
+diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/alloca-2.c b/gcc/testsuite/gcc.dg/torture/stackalign/alloca-2.c
+index 139b74e..744d72a 100644
+--- a/gcc/testsuite/gcc.dg/torture/stackalign/alloca-2.c
++++ b/gcc/testsuite/gcc.dg/torture/stackalign/alloca-2.c
+@@ -1,5 +1,5 @@
+ /* PR middle-end/37009 */
+-/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-options "-msse2" } */
+ /* { dg-require-effective-target sse2_runtime } */
+ 
+diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/alloca-4.c b/gcc/testsuite/gcc.dg/torture/stackalign/alloca-4.c
+index c3e554a..b23fdf6 100644
+--- a/gcc/testsuite/gcc.dg/torture/stackalign/alloca-4.c
++++ b/gcc/testsuite/gcc.dg/torture/stackalign/alloca-4.c
+@@ -1,5 +1,5 @@
+ /* PR middle-end/37009 */
+-/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-options "-mincoming-stack-boundary=2 -mpreferred-stack-boundary=2" } */
+ 
+ #include "check.h"
+diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/alloca-5.c b/gcc/testsuite/gcc.dg/torture/stackalign/alloca-5.c
+index 2ef4443..7b7ed68 100644
+--- a/gcc/testsuite/gcc.dg/torture/stackalign/alloca-5.c
++++ b/gcc/testsuite/gcc.dg/torture/stackalign/alloca-5.c
+@@ -1,5 +1,5 @@
+ /* PR middle-end/45234 */
+-/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-options "-mincoming-stack-boundary=2 -mpreferred-stack-boundary=2" } */
+ 
+ #include "check.h"
+diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/alloca-6.c b/gcc/testsuite/gcc.dg/torture/stackalign/alloca-6.c
+index f0e4513..24c8e5a 100644
+--- a/gcc/testsuite/gcc.dg/torture/stackalign/alloca-6.c
++++ b/gcc/testsuite/gcc.dg/torture/stackalign/alloca-6.c
+@@ -1,5 +1,5 @@
+ /* PR middle-end/45234 */
+-/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-options "-mincoming-stack-boundary=2 -mpreferred-stack-boundary=2" } */
+ 
+ #include "check.h"
+diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/fastcall-1.c b/gcc/testsuite/gcc.dg/torture/stackalign/fastcall-1.c
+index d1cda10..24dab4d 100644
+--- a/gcc/testsuite/gcc.dg/torture/stackalign/fastcall-1.c
++++ b/gcc/testsuite/gcc.dg/torture/stackalign/fastcall-1.c
+@@ -1,4 +1,4 @@
+-/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ #include "check.h"
+ 
+diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/push-1.c b/gcc/testsuite/gcc.dg/torture/stackalign/push-1.c
+index dd5dffc..787f99f 100644
+--- a/gcc/testsuite/gcc.dg/torture/stackalign/push-1.c
++++ b/gcc/testsuite/gcc.dg/torture/stackalign/push-1.c
+@@ -1,5 +1,5 @@
+ /* PR middle-end/37010 */
+-/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-options "-msse2 -mpreferred-stack-boundary=2" } */
+ /* { dg-require-effective-target sse2_runtime } */
+ 
+diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/regparm-1.c b/gcc/testsuite/gcc.dg/torture/stackalign/regparm-1.c
+index 9dac024..b9acacf 100644
+--- a/gcc/testsuite/gcc.dg/torture/stackalign/regparm-1.c
++++ b/gcc/testsuite/gcc.dg/torture/stackalign/regparm-1.c
+@@ -1,4 +1,4 @@
+-/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ #include "check.h"
+ 
+diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/thiscall-1.c b/gcc/testsuite/gcc.dg/torture/stackalign/thiscall-1.c
+index 6f22e07..27b71b6 100644
+--- a/gcc/testsuite/gcc.dg/torture/stackalign/thiscall-1.c
++++ b/gcc/testsuite/gcc.dg/torture/stackalign/thiscall-1.c
+@@ -1,4 +1,4 @@
+-/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ #include "check.h"
+ 
+diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-28.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-28.c
+index 77d0c47..479355e 100644
+--- a/gcc/testsuite/gcc.dg/tree-ssa/loop-28.c
++++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-28.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -fdump-tree-optimized -fdump-tree-aprefetch --param max-unrolled-insns=1000" } */
+ 
+ char x[100000];
+diff --git a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-3.c b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-3.c
+index 2c1282d..dc19150 100644
+--- a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-3.c
++++ b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-3.c
+@@ -1,7 +1,6 @@
+ /* Prefetching used to prefer nonsensical unroll factor of 5 in this testcase.  */
+ 
+-/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -msse2 -mfpmath=sse -fdump-tree-aprefetch-details" } */
+ 
+ #define N 1000000
+diff --git a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-4.c b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-4.c
+index bff4b9f..11fd41f 100644
+--- a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-4.c
++++ b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-4.c
+@@ -1,7 +1,6 @@
+ /* The loop rolls too little, hence the prefetching would not be useful.  */
+ 
+-/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -fdump-tree-optimized" } */
+ 
+ int xxx[20];
+diff --git a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-5.c b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-5.c
+index 19914ca..1ccf506 100644
+--- a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-5.c
++++ b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-5.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-options "-O2 --param min-insn-to-prefetch-ratio=5 -fprefetch-loop-arrays -march=athlon -fdump-tree-aprefetch-details" } */
+ 
+ /* These are common idioms for writing variable-length arrays at the end
+diff --git a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-6.c b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-6.c
+index 7a1de5a..1768305 100644
+--- a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-6.c
++++ b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-6.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-require-effective-target sse2 } */
+ /* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -msse2 -mfpmath=sse --param simultaneous-prefetches=100 --param min-insn-to-prefetch-ratio=6 -fdump-tree-aprefetch-details" } */
+ 
+diff --git a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-7.c b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-7.c
+index 9e453a7..5c469ba 100644
+--- a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-7.c
++++ b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-7.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-require-effective-target sse2 } */
+ /* { dg-skip-if "" { i?86-*-* x86_64-*-* } { "-march=*" } { "-march=athlon" } } */
+ /* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -msse2 -mfpmath=sse --param simultaneous-prefetches=100 -fdump-tree-aprefetch-details -fdump-tree-optimized" } */
+diff --git a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-8.c b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-8.c
+index a05d552..705d35f 100644
+--- a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-8.c
++++ b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-8.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-require-effective-target sse2 } */
+ /* { dg-skip-if "" { i?86-*-* x86_64-*-* } { "-march=*" } { "-march=athlon" } } */
+ /* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -msse2 -mfpmath=sse --param simultaneous-prefetches=100 -fdump-tree-aprefetch-details -fdump-tree-optimized" } */
+diff --git a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-9.c b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-9.c
+index eb22a66..f78bea3 100644
+--- a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-9.c
++++ b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-9.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-require-effective-target sse2 } */
+ /* { dg-skip-if "" { i?86-*-* x86_64-*-* } { "-march=*" } { "-march=athlon" } } */
+ /* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -msse2 -mfpmath=sse --param simultaneous-prefetches=100 -fdump-tree-aprefetch-details -fdump-tree-optimized" } */
+diff --git a/gcc/testsuite/gcc.dg/tree-ssa/stdarg-2.c b/gcc/testsuite/gcc.dg/tree-ssa/stdarg-2.c
+index 6b4783c..3cac558 100644
+--- a/gcc/testsuite/gcc.dg/tree-ssa/stdarg-2.c
++++ b/gcc/testsuite/gcc.dg/tree-ssa/stdarg-2.c
+@@ -21,11 +21,11 @@ f1 (int i, ...)
+   va_start (ap, i);
+   va_end (ap);
+ }
+-/* { dg-final { scan-tree-dump "f1: va_list escapes 0, needs to save 0 GPR units and 0 FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f1: va_list escapes 0, needs to save 0 GPR units and 0 FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f1: va_list escapes 0, needs to save 0 GPR units and 0 FPR units" "stdarg" { target { powerpc*-*-linux* && ilp32 } } } } */
+ /* { dg-final { scan-tree-dump "f1: va_list escapes 0, needs to save 0 GPR units and 0 FPR units" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f1: va_list escapes 0, needs to save 0 GPR units and 0 FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump "f1: va_list escapes 0, needs to save 0 GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump "f1: va_list escapes 0, needs to save 0 GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f1: va_list escapes 0, needs to save 0 GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f1: va_list escapes 0, needs to save 0 GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ 
+@@ -41,11 +41,11 @@ f2 (int i, ...)
+ }
+ /* Assume the counters can be number of registers or bytes on 32-bit
+    architecture or bytes on 64-bit architecture.  */
+-/* { dg-final { scan-tree-dump "f2: va_list escapes 0, needs to save \[148\] GPR units and 0 FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f2: va_list escapes 0, needs to save \[148\] GPR units and 0 FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f2: va_list escapes 0, needs to save \[148\] GPR units and 0 FPR units" "stdarg" { target { powerpc*-*-linux* && ilp32 } } } } */
+ /* { dg-final { scan-tree-dump "f2: va_list escapes 0, needs to save 8 GPR units and 1" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f2: va_list escapes 0, needs to save 1 GPR units and 0 FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump "f2: va_list escapes 0, needs to save \[148\] GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump "f2: va_list escapes 0, needs to save \[148\] GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f2: va_list escapes 0, needs to save \[148\] GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f2: va_list escapes 0, needs to save \[148\] GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ 
+@@ -57,11 +57,11 @@ f3 (int i, ...)
+   d = va_arg (ap, double);
+   va_end (ap);
+ }
+-/* { dg-final { scan-tree-dump "f3: va_list escapes 0, needs to save 0 GPR units and \[1-9\]\[0-9\]* FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f3: va_list escapes 0, needs to save 0 GPR units and \[1-9\]\[0-9\]* FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f3: va_list escapes 0, needs to save 0 GPR units and \[1-9\]\[0-9\]* FPR units" "stdarg" { target { powerpc*-*-linux* && { powerpc_fprs && ilp32 } } } } } */
+ /* { dg-final { scan-tree-dump "f3: va_list escapes 0, needs to save 0 GPR units and 1 FPR units" "stdarg" { target s390*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f3: va_list escapes 0, needs to save 8 GPR units and 2" "stdarg" { target alpha*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump "f3: va_list escapes 0, needs to save \[1-9\]\[0-9\]* GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump "f3: va_list escapes 0, needs to save \[1-9\]\[0-9\]* GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f3: va_list escapes 0, needs to save \[1-9\]\[0-9\]* GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f3: va_list escapes 0, needs to save \[1-9\]\[0-9\]* GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ 
+@@ -74,11 +74,11 @@ f4 (int i, ...)
+   foo (i, ap);
+   va_end (ap);
+ }
+-/* { dg-final { scan-tree-dump "f4: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f4: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f4: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { powerpc*-*-linux* && ilp32 } } } } */
+ /* { dg-final { scan-tree-dump "f4: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f4: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump "f4: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump "f4: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f4: va_list escapes 1, needs to save all GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f4: va_list escapes 1, needs to save all GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ 
+@@ -92,11 +92,11 @@ f5 (int i, ...)
+   va_end (ap);
+   va_end (gap);
+ }
+-/* { dg-final { scan-tree-dump "f5: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f5: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f5: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { powerpc*-*-linux* && ilp32 } } } } */
+ /* { dg-final { scan-tree-dump "f5: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f5: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump "f5: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump "f5: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f5: va_list escapes 1, needs to save all GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f5: va_list escapes 1, needs to save all GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ 
+@@ -112,11 +112,11 @@ f6 (int i, ...)
+   bar (x);
+   va_end (ap);
+ }
+-/* { dg-final { scan-tree-dump "f6: va_list escapes 0, needs to save (3|12|24) GPR units and 0 FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f6: va_list escapes 0, needs to save (3|12|24) GPR units and 0 FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f6: va_list escapes 0, needs to save (3|12|24) GPR units and 0 FPR units" "stdarg" { target { powerpc*-*-linux* && ilp32 } } } } */
+ /* { dg-final { scan-tree-dump "f6: va_list escapes 0, needs to save 24 GPR units and 1" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f6: va_list escapes 0, needs to save 3 GPR units and 0 FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump "f6: va_list escapes 0, needs to save (3|12|24) GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump "f6: va_list escapes 0, needs to save (3|12|24) GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f6: va_list escapes 0, needs to save (3|12|24) GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f6: va_list escapes 0, needs to save (3|12|24) GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ 
+@@ -129,11 +129,11 @@ f7 (int i, ...)
+   bar (6);
+   va_end (ap);
+ }
+-/* { dg-final { scan-tree-dump "f7: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f7: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f7: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { powerpc*-*-linux* && ilp32 } } } } */
+ /* { dg-final { scan-tree-dump "f7: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f7: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump "f7: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump "f7: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f7: va_list escapes 1, needs to save all GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f7: va_list escapes 1, needs to save all GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ 
+@@ -148,11 +148,11 @@ f8 (int i, ...)
+   bar (x);
+   va_end (ap);
+ }
+-/* { dg-final { scan-tree-dump "f8: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f8: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f8: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { powerpc*-*-linux* && ilp32 } } } } */
+ /* { dg-final { scan-tree-dump "f8: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f8: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump "f8: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump "f8: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f8: va_list escapes 1, needs to save all GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f8: va_list escapes 1, needs to save all GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ 
+@@ -165,11 +165,11 @@ f9 (int i, ...)
+   bar (6);
+   va_end (ap);
+ }
+-/* { dg-final { scan-tree-dump "f9: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f9: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f9: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { powerpc*-*-linux* && ilp32 } } } } */
+ /* { dg-final { scan-tree-dump "f9: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f9: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump "f9: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump "f9: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f9: va_list escapes 1, needs to save all GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f9: va_list escapes 1, needs to save all GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ 
+@@ -184,11 +184,11 @@ f10 (int i, ...)
+   bar (x);
+   va_end (ap);
+ }
+-/* { dg-final { scan-tree-dump "f10: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f10: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f10: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { powerpc*-*-linux* && ilp32 } } } } */
+ /* { dg-final { scan-tree-dump "f10: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f10: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump "f10: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump "f10: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f10: va_list escapes 1, needs to save all GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f10: va_list escapes 1, needs to save all GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ 
+@@ -204,11 +204,11 @@ f11 (int i, ...)
+   bar (x);
+   va_end (ap);
+ }
+-/* { dg-final { scan-tree-dump "f11: va_list escapes 0, needs to save (3|12|24) GPR units and 0 FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f11: va_list escapes 0, needs to save (3|12|24) GPR units and 0 FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f11: va_list escapes 0, needs to save (3|12|24) GPR units and 0 FPR units" "stdarg" { target { powerpc*-*-linux* && ilp32 } } } } */
+ /* { dg-final { scan-tree-dump "f11: va_list escapes 0, needs to save 24 GPR units and 1" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f11: va_list escapes 0, needs to save 3 GPR units and 0 FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump "f11: va_list escapes 0, needs to save (3|12|24) GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump "f11: va_list escapes 0, needs to save (3|12|24) GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f11: va_list escapes 0, needs to save (3|12|24) GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f11: va_list escapes 0, needs to save (3|12|24) GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ 
+@@ -224,11 +224,11 @@ f12 (int i, ...)
+   bar (x);
+   va_end (ap);
+ }
+-/* { dg-final { scan-tree-dump "f12: va_list escapes 0, needs to save 0 GPR units and \[1-9\]\[0-9\]* FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f12: va_list escapes 0, needs to save 0 GPR units and \[1-9\]\[0-9\]* FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f12: va_list escapes 0, needs to save 0 GPR units and \[1-9\]\[0-9\]* FPR units" "stdarg" { target { powerpc*-*-linux* && { powerpc_fprs && ilp32 } } } } } */
+ /* { dg-final { scan-tree-dump "f12: va_list escapes 0, needs to save 24 GPR units and 2" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f12: va_list escapes 0, needs to save 0 GPR units and 3 FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump "f12: va_list escapes 0, needs to save \[1-9]\[0-9\]* GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump "f12: va_list escapes 0, needs to save \[1-9]\[0-9\]* GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f12: va_list escapes 0, needs to save \[1-9]\[0-9\]* GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f12: va_list escapes 0, needs to save \[1-9]\[0-9\]* GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ 
+@@ -244,11 +244,11 @@ f13 (int i, ...)
+   bar (x);
+   va_end (ap);
+ }
+-/* { dg-final { scan-tree-dump "f13: va_list escapes 0, needs to save 0 GPR units and \[1-9\]\[0-9\]* FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f13: va_list escapes 0, needs to save 0 GPR units and \[1-9\]\[0-9\]* FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f13: va_list escapes 0, needs to save 0 GPR units and \[1-9\]\[0-9\]* FPR units" "stdarg" { target { powerpc*-*-linux* && { powerpc_fprs && ilp32 } } } } } */
+ /* { dg-final { scan-tree-dump "f13: va_list escapes 0, needs to save 24 GPR units and 2" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f13: va_list escapes 0, needs to save 0 GPR units and 3 FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump "f13: va_list escapes 0, needs to save \[1-9]\[0-9\]* GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump "f13: va_list escapes 0, needs to save \[1-9]\[0-9\]* GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f13: va_list escapes 0, needs to save \[1-9]\[0-9\]* GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f13: va_list escapes 0, needs to save \[1-9]\[0-9\]* GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ 
+@@ -264,11 +264,11 @@ f14 (int i, ...)
+   bar (x);
+   va_end (ap);
+ }
+-/* { dg-final { scan-tree-dump "f14: va_list escapes 0, needs to save \[148\] GPR units and \[1-9\]\[0-9\]* FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f14: va_list escapes 0, needs to save \[148\] GPR units and \[1-9\]\[0-9\]* FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f14: va_list escapes 0, needs to save \[148\] GPR units and \[1-9\]\[0-9\]* FPR units" "stdarg" { target { powerpc*-*-linux* && { powerpc_fprs && ilp32 } } } } } */
+ /* { dg-final { scan-tree-dump "f14: va_list escapes 0, needs to save 24 GPR units and 3" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f14: va_list escapes 0, needs to save 1 GPR units and 2 FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump "f14: va_list escapes 0, needs to save \[1-9]\[0-9\]* GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump "f14: va_list escapes 0, needs to save \[1-9]\[0-9\]* GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f14: va_list escapes 0, needs to save \[1-9]\[0-9\]* GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f14: va_list escapes 0, needs to save \[1-9]\[0-9\]* GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ 
+@@ -288,11 +288,11 @@ f15 (int i, ...)
+   f15_1 (ap);
+   va_end (ap);
+ }
+-/* { dg-final { scan-tree-dump "f15: va_list escapes 0, needs to save \[148\] GPR units and \[1-9\]\[0-9\]* FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f15: va_list escapes 0, needs to save \[148\] GPR units and \[1-9\]\[0-9\]* FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f15: va_list escapes 0, needs to save \[148\] GPR units and \[1-9\]\[0-9\]* FPR units" "stdarg" { target { powerpc*-*-linux* && { powerpc_fprs && ilp32 } } } } } */
+ /* { dg-final { scan-tree-dump "f15: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f15: va_list escapes 0, needs to save 1 GPR units and 2 FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump-not "f15: va_list escapes 0, needs to save 0 GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump-not "f15: va_list escapes 0, needs to save 0 GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump-not "f15: va_list escapes 0, needs to save 0 GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump-not "f15: va_list escapes 0, needs to save 0 GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ /* { dg-final { cleanup-tree-dump "stdarg" } } */
+diff --git a/gcc/testsuite/gcc.dg/tree-ssa/stdarg-3.c b/gcc/testsuite/gcc.dg/tree-ssa/stdarg-3.c
+index 9ffbe3f..d9c55a8 100644
+--- a/gcc/testsuite/gcc.dg/tree-ssa/stdarg-3.c
++++ b/gcc/testsuite/gcc.dg/tree-ssa/stdarg-3.c
+@@ -20,11 +20,11 @@ f1 (int i, ...)
+   x = va_arg (gap, long);
+   va_end (gap);
+ }
+-/* { dg-final { scan-tree-dump "f1: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f1: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f1: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { powerpc*-*-linux* && ilp32 } } } } */
+ /* { dg-final { scan-tree-dump "f1: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f1: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump "f1: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump "f1: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f1: va_list escapes 1, needs to save all GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f1: va_list escapes 1, needs to save all GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ 
+@@ -35,11 +35,11 @@ f2 (int i, ...)
+   bar (i);
+   va_end (gap);
+ }
+-/* { dg-final { scan-tree-dump "f2: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f2: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f2: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { powerpc*-*-linux* && ilp32 } } } } */
+ /* { dg-final { scan-tree-dump "f2: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f2: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump "f2: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump "f2: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f2: va_list escapes 1, needs to save all GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f2: va_list escapes 1, needs to save all GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ 
+@@ -53,11 +53,11 @@ f3 (int i, ...)
+   x = va_arg (aps[4], long);
+   va_end (aps[4]);
+ }
+-/* { dg-final { scan-tree-dump "f3: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f3: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f3: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { powerpc*-*-linux* && ilp32 } } } } */
+ /* { dg-final { scan-tree-dump "f3: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f3: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump "f3: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump "f3: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f3: va_list escapes 1, needs to save all GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f3: va_list escapes 1, needs to save all GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ 
+@@ -69,11 +69,11 @@ f4 (int i, ...)
+   bar (i);
+   va_end (aps[4]);
+ }
+-/* { dg-final { scan-tree-dump "f4: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f4: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f4: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { powerpc*-*-linux* && ilp32 } } } } */
+ /* { dg-final { scan-tree-dump "f4: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f4: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump "f4: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump "f4: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f4: va_list escapes 1, needs to save all GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f4: va_list escapes 1, needs to save all GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ 
+@@ -85,11 +85,11 @@ f5 (int i, ...)
+   foo (i, aps[4]);
+   va_end (aps[4]);
+ }
+-/* { dg-final { scan-tree-dump "f5: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f5: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f5: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { powerpc*-*-linux* && ilp32 } } } } */
+ /* { dg-final { scan-tree-dump "f5: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f5: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump "f5: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump "f5: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f5: va_list escapes 1, needs to save all GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f5: va_list escapes 1, needs to save all GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ 
+@@ -103,11 +103,11 @@ f6 (int i, ...)
+   x = va_arg (a.g, long);
+   va_end (a.g);
+ }
+-/* { dg-final { scan-tree-dump "f6: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f6: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f6: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { powerpc*-*-linux* && ilp32 } } } } */
+ /* { dg-final { scan-tree-dump "f6: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f6: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump "f6: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump "f6: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f6: va_list escapes 1, needs to save all GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f6: va_list escapes 1, needs to save all GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ 
+@@ -119,11 +119,11 @@ f7 (int i, ...)
+   bar (i);
+   va_end (a.g);
+ }
+-/* { dg-final { scan-tree-dump "f7: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f7: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f7: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { powerpc*-*-linux* && ilp32 } } } } */
+ /* { dg-final { scan-tree-dump "f7: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f7: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump "f7: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump "f7: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f7: va_list escapes 1, needs to save all GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f7: va_list escapes 1, needs to save all GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ 
+@@ -135,11 +135,11 @@ f8 (int i, ...)
+   foo (i, a.g);
+   va_end (a.g);
+ }
+-/* { dg-final { scan-tree-dump "f8: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f8: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f8: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { powerpc*-*-linux* && ilp32 } } } } */
+ /* { dg-final { scan-tree-dump "f8: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f8: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump "f8: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump "f8: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f8: va_list escapes 1, needs to save all GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f8: va_list escapes 1, needs to save all GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ 
+@@ -151,11 +151,11 @@ f10 (int i, ...)
+   x = va_arg (a.h[1], long);
+   va_end (a.h[1]);
+ }
+-/* { dg-final { scan-tree-dump "f10: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f10: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f10: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { powerpc*-*-linux* && ilp32 } } } } */
+ /* { dg-final { scan-tree-dump "f10: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f10: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump "f10: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump "f10: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f10: va_list escapes 1, needs to save all GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f10: va_list escapes 1, needs to save all GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ 
+@@ -167,11 +167,11 @@ f11 (int i, ...)
+   bar (i);
+   va_end (a.h[1]);
+ }
+-/* { dg-final { scan-tree-dump "f11: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f11: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f11: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { powerpc*-*-linux* && ilp32 } } } } */
+ /* { dg-final { scan-tree-dump "f11: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f11: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump "f11: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump "f11: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f11: va_list escapes 1, needs to save all GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f11: va_list escapes 1, needs to save all GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ 
+@@ -183,11 +183,11 @@ f12 (int i, ...)
+   foo (i, a.h[1]);
+   va_end (a.h[1]);
+ }
+-/* { dg-final { scan-tree-dump "f12: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f12: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f12: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target { powerpc*-*-linux* && ilp32 } } } } */
+ /* { dg-final { scan-tree-dump "f12: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f12: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump "f12: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump "f12: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f12: va_list escapes 1, needs to save all GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f12: va_list escapes 1, needs to save all GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ /* { dg-final { cleanup-tree-dump "stdarg" } } */
+diff --git a/gcc/testsuite/gcc.dg/tree-ssa/stdarg-4.c b/gcc/testsuite/gcc.dg/tree-ssa/stdarg-4.c
+index d0e47e1..2d2d6d0 100644
+--- a/gcc/testsuite/gcc.dg/tree-ssa/stdarg-4.c
++++ b/gcc/testsuite/gcc.dg/tree-ssa/stdarg-4.c
+@@ -23,11 +23,11 @@ f1 (int i, ...)
+     x = va_arg (ap, long);
+   va_end (ap);
+ }
+-/* { dg-final { scan-tree-dump "f1: va_list escapes 0, needs to save all GPR units and 0 FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f1: va_list escapes 0, needs to save all GPR units and 0 FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { x32 || { ! { ia32 } } } } } } } */
+ /* { dg-final { scan-tree-dump "f1: va_list escapes 0, needs to save all GPR units and 0 FPR units" "stdarg" { target { powerpc*-*-linux* && ilp32 } } } } */
+ /* { dg-final { scan-tree-dump "f1: va_list escapes 0, needs to save all GPR units and 1" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f1: va_list escapes 0, needs to save all GPR units and 0 FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump "f1: va_list escapes \[01\], needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump "f1: va_list escapes \[01\], needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f1: va_list escapes \[01\], needs to save all GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f1: va_list escapes \[01\], needs to save all GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ 
+@@ -40,11 +40,11 @@ f2 (int i, ...)
+     d = va_arg (ap, double);
+   va_end (ap);
+ }
+-/* { dg-final { scan-tree-dump "f2: va_list escapes 0, needs to save 0 GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f2: va_list escapes 0, needs to save 0 GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { x32 || { ! { ia32 } } } } } } } */
+ /* { dg-final { scan-tree-dump "f2: va_list escapes 0, needs to save 0 GPR units and all FPR units" "stdarg" { target { powerpc*-*-linux* && { powerpc_fprs && ilp32 } } } } } */
+ /* { dg-final { scan-tree-dump "f2: va_list escapes 0, needs to save all GPR units and 2" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f2: va_list escapes 0, needs to save 0 GPR units and all FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump "f2: va_list escapes \[01\], needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump "f2: va_list escapes \[01\], needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f2: va_list escapes \[01\], needs to save all GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f2: va_list escapes \[01\], needs to save all GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ 
+@@ -63,11 +63,11 @@ f3 (int i, ...)
+       bar (x);
+     }
+ }
+-/* { dg-final { scan-tree-dump "f3: va_list escapes 0, needs to save \[148\] GPR units and 0 FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f3: va_list escapes 0, needs to save \[148\] GPR units and 0 FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f3: va_list escapes 0, needs to save \[148\] GPR units and 0 FPR units" "stdarg" { target { powerpc*-*-linux* && ilp32 } } } } */
+ /* { dg-final { scan-tree-dump "f3: va_list escapes 0, needs to save 8 GPR units and 1" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f3: va_list escapes 0, needs to save 1 GPR units and 0 FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump "f3: va_list escapes 0, needs to save \[148\] GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump "f3: va_list escapes 0, needs to save \[148\] GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f3: va_list escapes 0, needs to save \[148\] GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f3: va_list escapes 0, needs to save \[148\] GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ 
+@@ -84,11 +84,11 @@ f4 (int i, ...)
+       bar (d + 2.5);
+     }
+ }
+-/* { dg-final { scan-tree-dump "f4: va_list escapes 0, needs to save 0 GPR units and \[1-9\]\[0-9\]* FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f4: va_list escapes 0, needs to save 0 GPR units and \[1-9\]\[0-9\]* FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f4: va_list escapes 0, needs to save 0 GPR units and \[1-9\]\[0-9\]* FPR units" "stdarg" { target { powerpc*-*-linux* && { powerpc_fprs && ilp32 } } } } } */
+ /* { dg-final { scan-tree-dump "f4: va_list escapes 0, needs to save 8 GPR units and 2" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f4: va_list escapes 0, needs to save 0 GPR units and 1 FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { scan-tree-dump "f4: va_list escapes 0, needs to save \[148\] GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } } */
++/* { dg-final { scan-tree-dump "f4: va_list escapes 0, needs to save \[148\] GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f4: va_list escapes 0, needs to save \[148\] GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f4: va_list escapes 0, needs to save \[148\] GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+ /* { dg-final { cleanup-tree-dump "stdarg" } } */
+diff --git a/gcc/testsuite/gcc.dg/tree-ssa/stdarg-5.c b/gcc/testsuite/gcc.dg/tree-ssa/stdarg-5.c
+index 08f2787..2de9e82 100644
+--- a/gcc/testsuite/gcc.dg/tree-ssa/stdarg-5.c
++++ b/gcc/testsuite/gcc.dg/tree-ssa/stdarg-5.c
+@@ -22,7 +22,7 @@ f1 (int i, ...)
+     s1 = va_arg (ap, struct S1);
+   va_end (ap);
+ }
+-/* { dg-final { scan-tree-dump "f1: va_list escapes 0, needs to save 0 GPR units and 0 FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f1: va_list escapes 0, needs to save 0 GPR units and 0 FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f1: va_list escapes 0, needs to save all GPR units and 1" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f1: va_list escapes 0, needs to save all GPR units and 0 FPR units" "stdarg" { target s390*-*-linux* } } } */
+ 
+@@ -35,7 +35,7 @@ f2 (int i, ...)
+     s2 = va_arg (ap, struct S2);
+   va_end (ap);
+ }
+-/* { dg-final { scan-tree-dump "f2: va_list escapes 0, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f2: va_list escapes 0, needs to save all GPR units and all FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f2: va_list escapes 0, needs to save all GPR units and 1" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f2: va_list escapes 0, needs to save all GPR units and 0 FPR units" "stdarg" { target s390*-*-linux* } } } */
+ 
+@@ -53,7 +53,7 @@ f3 (int i, ...)
+       bar (s1.i);
+     }
+ }
+-/* { dg-final { scan-tree-dump "f3: va_list escapes 0, needs to save 0 GPR units and 0 FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f3: va_list escapes 0, needs to save 0 GPR units and 0 FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f3: va_list escapes 0, needs to save 32 GPR units and 1" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f3: va_list escapes 0, needs to save 1 GPR units and 0 FPR units" "stdarg" { target s390*-*-linux* } } } */
+ 
+@@ -71,7 +71,7 @@ f4 (int i, ...)
+       bar (s2.i);
+     }
+ }
+-/* { dg-final { scan-tree-dump "f4: va_list escapes 0, needs to save 16 GPR units and 16 FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f4: va_list escapes 0, needs to save 16 GPR units and 16 FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f4: va_list escapes 0, needs to save 24 GPR units and 1" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f4: va_list escapes 0, needs to save 2 GPR units and 0 FPR units" "stdarg" { target s390*-*-linux* } } } */
+ 
+@@ -85,7 +85,7 @@ f5 (int i, ...)
+   va_end (ap);
+   bar (__real__ ci + __imag__ ci);
+ }
+-/* { dg-final { scan-tree-dump "f5: va_list escapes 0, needs to save 16 GPR units and 0 FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f5: va_list escapes 0, needs to save 16 GPR units and 0 FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f5: va_list escapes 0, needs to save 32 GPR units and 1" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f5: va_list escapes 0, needs to save (4|2) GPR units and 0 FPR units" "stdarg" { target s390*-*-linux* } } } */
+ 
+@@ -99,7 +99,7 @@ f6 (int i, ...)
+   va_end (ap);
+   bar (__real__ ci + __imag__ cd);
+ }
+-/* { dg-final { scan-tree-dump "f6: va_list escapes 0, needs to save 8 GPR units and 32 FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f6: va_list escapes 0, needs to save 8 GPR units and 32 FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f6: va_list escapes 0, needs to save 32 GPR units and 3" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f6: va_list escapes 0, needs to save (3|2) GPR units and 0 FPR units" "stdarg" { target s390*-*-linux* } } } */
+ 
+@@ -113,7 +113,7 @@ f7 (int i, ...)
+   va_end (ap);
+   bar (__real__ cd + __imag__ cd);
+ }
+-/* { dg-final { scan-tree-dump "f7: va_list escapes 0, needs to save 0 GPR units and 64 FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && lp64 } } } } */
++/* { dg-final { scan-tree-dump "f7: va_list escapes 0, needs to save 0 GPR units and 64 FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "f7: va_list escapes 0, needs to save 32 GPR units and 2" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f7: va_list escapes 0, needs to save 2 GPR units and 0 FPR units" "stdarg" { target s390*-*-linux* } } } */
+ /* { dg-final { cleanup-tree-dump "stdarg" } } */
+diff --git a/gcc/testsuite/gcc.dg/tree-ssa/update-unroll-1.c b/gcc/testsuite/gcc.dg/tree-ssa/update-unroll-1.c
+index d911dd8..a933102 100644
+--- a/gcc/testsuite/gcc.dg/tree-ssa/update-unroll-1.c
++++ b/gcc/testsuite/gcc.dg/tree-ssa/update-unroll-1.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ /* { dg-options "-O1 -fprefetch-loop-arrays -march=athlon -fdump-tree-aprefetch-blocks" } */
+ 
+ int a[10000];
+diff --git a/gcc/testsuite/gcc.dg/unroll-1.c b/gcc/testsuite/gcc.dg/unroll-1.c
+index 5ff07e2..e703289 100644
+--- a/gcc/testsuite/gcc.dg/unroll-1.c
++++ b/gcc/testsuite/gcc.dg/unroll-1.c
+@@ -1,7 +1,7 @@
+ /* PR optimization/8599 */
+ /* { dg-do run } */
+ /* { dg-options "-O2 -funroll-loops" } */
+-/* { dg-options "-mtune=k6 -O2 -funroll-loops" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-mtune=k6 -O2 -funroll-loops" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ 
+ extern void abort (void);
+diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/x86_64/x86_64-costmodel-vect.exp b/gcc/testsuite/gcc.dg/vect/costmodel/x86_64/x86_64-costmodel-vect.exp
+index ff3650c..1a22e7d 100644
+--- a/gcc/testsuite/gcc.dg/vect/costmodel/x86_64/x86_64-costmodel-vect.exp
++++ b/gcc/testsuite/gcc.dg/vect/costmodel/x86_64/x86_64-costmodel-vect.exp
+@@ -22,7 +22,7 @@ load_lib gcc-dg.exp
+ 
+ # Exit immediately if this isn't a x86 target.
+ if { (![istarget x86_64-*-*] && ![istarget i?86-*-*])
+-     || ![is-effective-target lp64] } then {
++     || [is-effective-target ia32] } then {
+   return
+ }
+ 
+diff --git a/gcc/testsuite/gcc.misc-tests/i386-pf-3dnow-1.c b/gcc/testsuite/gcc.misc-tests/i386-pf-3dnow-1.c
+index ffb2e79..638749a 100644
+--- a/gcc/testsuite/gcc.misc-tests/i386-pf-3dnow-1.c
++++ b/gcc/testsuite/gcc.misc-tests/i386-pf-3dnow-1.c
+@@ -1,8 +1,7 @@
+ /* Test that the correct data prefetch instructions are generated for i386
+    variants that use 3DNow! prefetch instructions.  */
+ 
+-/* { dg-do compile { target i?86-*-* x86_64-*-*} } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ extern void exit (int);
+ 
+diff --git a/gcc/testsuite/gcc.misc-tests/i386-pf-athlon-1.c b/gcc/testsuite/gcc.misc-tests/i386-pf-athlon-1.c
+index 8d5ad1e..d793437 100644
+--- a/gcc/testsuite/gcc.misc-tests/i386-pf-athlon-1.c
++++ b/gcc/testsuite/gcc.misc-tests/i386-pf-athlon-1.c
+@@ -2,8 +2,7 @@
+    variants that use 3DNow! prefetchw or SSE prefetch instructions with
+    locality hints.  */
+ 
+-/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ extern void exit (int);
+ 
+diff --git a/gcc/testsuite/gcc.misc-tests/i386-pf-none-1.c b/gcc/testsuite/gcc.misc-tests/i386-pf-none-1.c
+index d87a210..04e814d 100644
+--- a/gcc/testsuite/gcc.misc-tests/i386-pf-none-1.c
++++ b/gcc/testsuite/gcc.misc-tests/i386-pf-none-1.c
+@@ -1,8 +1,7 @@
+ /* Test that data prefetch instructions are not generated for i386 variants
+    that do not support those instructions.  */
+ 
+-/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ extern void exit (int);
+ 
+diff --git a/gcc/testsuite/gcc.misc-tests/i386-pf-sse-1.c b/gcc/testsuite/gcc.misc-tests/i386-pf-sse-1.c
+index fb47c9d..3707c70 100644
+--- a/gcc/testsuite/gcc.misc-tests/i386-pf-sse-1.c
++++ b/gcc/testsuite/gcc.misc-tests/i386-pf-sse-1.c
+@@ -1,8 +1,7 @@
+ /* Test that the correct data prefetch instructions are generated for i386
+    variants that use SSE prefetch instructions.  */
+ 
+-/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ extern void exit (int);
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/20000609-1.c b/gcc/testsuite/gcc.target/i386/20000609-1.c
+index e094bba..a083a5d 100644
+--- a/gcc/testsuite/gcc.target/i386/20000609-1.c
++++ b/gcc/testsuite/gcc.target/i386/20000609-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do run } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O1 -ffast-math -march=i686" } */
+ 
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/20000720-1.c b/gcc/testsuite/gcc.target/i386/20000720-1.c
+index 076a22b..84e136c 100644
+--- a/gcc/testsuite/gcc.target/i386/20000720-1.c
++++ b/gcc/testsuite/gcc.target/i386/20000720-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-mpreferred-stack-boundary=2 -march=i586 -O2 -fomit-frame-pointer" } */
+ 
+ extern void *foo(void *a, const void *b, unsigned c);
+diff --git a/gcc/testsuite/gcc.target/i386/20000724-1.c b/gcc/testsuite/gcc.target/i386/20000724-1.c
+index b3be437..cbcd4f1 100644
+--- a/gcc/testsuite/gcc.target/i386/20000724-1.c
++++ b/gcc/testsuite/gcc.target/i386/20000724-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do run { target *-*-linux* } } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -fomit-frame-pointer" } */
+ 
+ extern void abort (void);
+diff --git a/gcc/testsuite/gcc.target/i386/20011107-1.c b/gcc/testsuite/gcc.target/i386/20011107-1.c
+index 3bf84e5..c1cfe88 100644
+--- a/gcc/testsuite/gcc.target/i386/20011107-1.c
++++ b/gcc/testsuite/gcc.target/i386/20011107-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -mtune=k6" } */
+ 
+ void
+diff --git a/gcc/testsuite/gcc.target/i386/20011119-1.c b/gcc/testsuite/gcc.target/i386/20011119-1.c
+index 4dd657e..9e85f6f 100644
+--- a/gcc/testsuite/gcc.target/i386/20011119-1.c
++++ b/gcc/testsuite/gcc.target/i386/20011119-1.c
+@@ -1,6 +1,6 @@
+ /* Test for reload failing to eliminate from argp to sp.  */
+ /* { dg-do run } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-require-effective-target nonpic } */
+ /* { dg-options "-O2 -fomit-frame-pointer" } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/20020201-3.c b/gcc/testsuite/gcc.target/i386/20020201-3.c
+index da700c1..9d72654 100644
+--- a/gcc/testsuite/gcc.target/i386/20020201-3.c
++++ b/gcc/testsuite/gcc.target/i386/20020201-3.c
+@@ -1,7 +1,7 @@
+ /* This testcase ICEd because a SFmode variable was given a MMX register
+    for which there is no movsf exists.  */
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -march=i686 -mmmx -fno-strict-aliasing" } */
+ 
+ struct A { unsigned int a, b; };
+diff --git a/gcc/testsuite/gcc.target/i386/20020218-1.c b/gcc/testsuite/gcc.target/i386/20020218-1.c
+index 13a835e..4d3d256 100644
+--- a/gcc/testsuite/gcc.target/i386/20020218-1.c
++++ b/gcc/testsuite/gcc.target/i386/20020218-1.c
+@@ -1,6 +1,6 @@
+ /* Verify that X86-64 only SSE registers aren't restored on IA-32.  */
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -msse" } */
+ /* { dg-final { scan-assembler-not "xmm8" } } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/20020729-1.c b/gcc/testsuite/gcc.target/i386/20020729-1.c
+index d4ef9bf..7e1abaf 100644
+--- a/gcc/testsuite/gcc.target/i386/20020729-1.c
++++ b/gcc/testsuite/gcc.target/i386/20020729-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -march=k6" } */
+ 
+ static inline void *
+diff --git a/gcc/testsuite/gcc.target/i386/20030926-1.c b/gcc/testsuite/gcc.target/i386/20030926-1.c
+index 0425f24..ebde340 100644
+--- a/gcc/testsuite/gcc.target/i386/20030926-1.c
++++ b/gcc/testsuite/gcc.target/i386/20030926-1.c
+@@ -1,7 +1,7 @@
+ /* PR optimization/11741  */
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -minline-all-stringops" } */
+-/* { dg-options "-O2 -minline-all-stringops -march=pentium4" { target ilp32 } } */
++/* { dg-options "-O2 -minline-all-stringops -march=pentium4" { target ia32 } } */
+ 
+ extern void *memcpy (void *, const void *, __SIZE_TYPE__);
+ extern __SIZE_TYPE__ strlen (const char *);
+diff --git a/gcc/testsuite/gcc.target/i386/20060125-1.c b/gcc/testsuite/gcc.target/i386/20060125-1.c
+index f445b7e..ed9dcce 100644
+--- a/gcc/testsuite/gcc.target/i386/20060125-1.c
++++ b/gcc/testsuite/gcc.target/i386/20060125-1.c
+@@ -1,6 +1,6 @@
+ /* PR rtl-optimization/25703 */
+ /* { dg-do run } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -mtune=i486" } */
+ 
+ extern void abort (void);
+diff --git a/gcc/testsuite/gcc.target/i386/20060125-2.c b/gcc/testsuite/gcc.target/i386/20060125-2.c
+index 55ef839..1747a63 100644
+--- a/gcc/testsuite/gcc.target/i386/20060125-2.c
++++ b/gcc/testsuite/gcc.target/i386/20060125-2.c
+@@ -1,6 +1,6 @@
+ /* PR rtl-optimization/25703 */
+ /* { dg-do run } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -mtune=pentiumpro" } */
+ 
+ extern void abort (void);
+diff --git a/gcc/testsuite/gcc.target/i386/20060512-1.c b/gcc/testsuite/gcc.target/i386/20060512-1.c
+index ae432e7..374d18a 100644
+--- a/gcc/testsuite/gcc.target/i386/20060512-1.c
++++ b/gcc/testsuite/gcc.target/i386/20060512-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do run } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-std=gnu99 -msse2 -mpreferred-stack-boundary=4" } */
+ /* { dg-require-effective-target sse2 } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/20060512-2.c b/gcc/testsuite/gcc.target/i386/20060512-2.c
+index fe1af56..d3a779c 100644
+--- a/gcc/testsuite/gcc.target/i386/20060512-2.c
++++ b/gcc/testsuite/gcc.target/i386/20060512-2.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-std=gnu99 -mpreferred-stack-boundary=4" } */
+ int
+ outer_function (int x, int y)
+diff --git a/gcc/testsuite/gcc.target/i386/20060512-3.c b/gcc/testsuite/gcc.target/i386/20060512-3.c
+index 4b62b16..3370b9e 100644
+--- a/gcc/testsuite/gcc.target/i386/20060512-3.c
++++ b/gcc/testsuite/gcc.target/i386/20060512-3.c
+@@ -1,5 +1,5 @@
+ /* { dg-do run } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-require-effective-target sse2 } */
+ /* { dg-options "-std=gnu99 -msse2 -mstackrealign -mpreferred-stack-boundary=4" } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/20060512-4.c b/gcc/testsuite/gcc.target/i386/20060512-4.c
+index ee7b8a4..bf76937 100644
+--- a/gcc/testsuite/gcc.target/i386/20060512-4.c
++++ b/gcc/testsuite/gcc.target/i386/20060512-4.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-mstackrealign -mpreferred-stack-boundary=4" } */
+ int
+ outer_function (int x, int y)
+diff --git a/gcc/testsuite/gcc.target/i386/387-1.c b/gcc/testsuite/gcc.target/i386/387-1.c
+index 83af71f..c4ea1e7 100644
+--- a/gcc/testsuite/gcc.target/i386/387-1.c
++++ b/gcc/testsuite/gcc.target/i386/387-1.c
+@@ -1,6 +1,6 @@
+ /* Verify that -mno-fancy-math-387 works.  */
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-skip-if "" { i?86-*-* x86_64-*-* } { "-march=*" } { "-march=i386" } } */
+ /* { dg-options "-O -ffast-math -mfpmath=387 -mno-fancy-math-387 -march=i386" } */
+ /* { dg-final { scan-assembler "call\t(.*)sin" } } */
+diff --git a/gcc/testsuite/gcc.target/i386/387-2.c b/gcc/testsuite/gcc.target/i386/387-2.c
+index bd6dbcd..8d5dba1 100644
+--- a/gcc/testsuite/gcc.target/i386/387-2.c
++++ b/gcc/testsuite/gcc.target/i386/387-2.c
+@@ -1,6 +1,6 @@
+ /* Verify that -march overrides -mno-fancy-math-387.  */
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-skip-if "" { i?86-*-* x86_64-*-* } { "-march=*" } { "-march=i686" } } */
+ /* { dg-options "-O -ffast-math -mfpmath=387 -march=i686 -mno-fancy-math-387" } */
+ /* { dg-final { scan-assembler "fsin" } } */
+diff --git a/gcc/testsuite/gcc.target/i386/387-5.c b/gcc/testsuite/gcc.target/i386/387-5.c
+index 027799a..a39f77a 100644
+--- a/gcc/testsuite/gcc.target/i386/387-5.c
++++ b/gcc/testsuite/gcc.target/i386/387-5.c
+@@ -1,6 +1,6 @@
+ /* Verify that -mno-fancy-math-387 works.  */
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-skip-if "" { i?86-*-* x86_64-*-* } { "-march=*" } { "-march=i386" } } */
+ /* { dg-options "-O -ffast-math -mfpmath=387 -mno-fancy-math-387 -march=i386" } */
+ /* { dg-final { scan-assembler "call\t(.*)atan" } } */
+diff --git a/gcc/testsuite/gcc.target/i386/387-6.c b/gcc/testsuite/gcc.target/i386/387-6.c
+index 7b254d1..f9506ba 100644
+--- a/gcc/testsuite/gcc.target/i386/387-6.c
++++ b/gcc/testsuite/gcc.target/i386/387-6.c
+@@ -1,6 +1,6 @@
+ /* Verify that -march overrides -mno-fancy-math-387.  */
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-skip-if "" { i?86-*-* x86_64-*-* } { "-march=*" } { "-march=i686" } } */
+ /* { dg-options "-O -ffast-math -mfpmath=387 -march=i686 -mno-fancy-math-387" } */
+ /* { dg-final { scan-assembler "fpatan" } } */
+diff --git a/gcc/testsuite/gcc.target/i386/980312-1.c b/gcc/testsuite/gcc.target/i386/980312-1.c
+index 72cdd5e..3a125f2 100644
+--- a/gcc/testsuite/gcc.target/i386/980312-1.c
++++ b/gcc/testsuite/gcc.target/i386/980312-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do link } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -march=pentiumpro" } */
+ 
+ extern __inline  double
+diff --git a/gcc/testsuite/gcc.target/i386/980313-1.c b/gcc/testsuite/gcc.target/i386/980313-1.c
+index 3b5263c..8698aa6 100644
+--- a/gcc/testsuite/gcc.target/i386/980313-1.c
++++ b/gcc/testsuite/gcc.target/i386/980313-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do link } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -march=pentiumpro" } */
+ 
+ extern __inline  double
+diff --git a/gcc/testsuite/gcc.target/i386/990117-1.c b/gcc/testsuite/gcc.target/i386/990117-1.c
+index 3a40e7f..a89dad1 100644
+--- a/gcc/testsuite/gcc.target/i386/990117-1.c
++++ b/gcc/testsuite/gcc.target/i386/990117-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -march=pentiumpro" } */
+ 
+ extern __inline  double
+diff --git a/gcc/testsuite/gcc.target/i386/990424-1.c b/gcc/testsuite/gcc.target/i386/990424-1.c
+index 95628e1..dd29139 100644
+--- a/gcc/testsuite/gcc.target/i386/990424-1.c
++++ b/gcc/testsuite/gcc.target/i386/990424-1.c
+@@ -2,7 +2,7 @@
+    with stdcall functions.  */
+ 
+ /* { dg-do run } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options -mpreferred-stack-boundary=4 } */
+ 
+ void __attribute__((stdcall)) foo(int a, int b, int c);
+diff --git a/gcc/testsuite/gcc.target/i386/990524-1.c b/gcc/testsuite/gcc.target/i386/990524-1.c
+index 7d8205c..295ffac 100644
+--- a/gcc/testsuite/gcc.target/i386/990524-1.c
++++ b/gcc/testsuite/gcc.target/i386/990524-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -march=pentiumpro" } */
+ 
+ typedef struct t_anim_info {
+diff --git a/gcc/testsuite/gcc.target/i386/991129-1.c b/gcc/testsuite/gcc.target/i386/991129-1.c
+index d0d58e8..038979a 100644
+--- a/gcc/testsuite/gcc.target/i386/991129-1.c
++++ b/gcc/testsuite/gcc.target/i386/991129-1.c
+@@ -1,7 +1,7 @@
+ /* Test against a problem in push_reload.  */
+ 
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2" } */
+ 
+ unsigned long foo (unsigned long long x, unsigned long y)
+diff --git a/gcc/testsuite/gcc.target/i386/991214-1.c b/gcc/testsuite/gcc.target/i386/991214-1.c
+index 3d9a72e..74b603d 100644
+--- a/gcc/testsuite/gcc.target/i386/991214-1.c
++++ b/gcc/testsuite/gcc.target/i386/991214-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2" } */
+ 
+ /* Test against a problem with the combiner substituting explicit hard reg
+diff --git a/gcc/testsuite/gcc.target/i386/991230-1.c b/gcc/testsuite/gcc.target/i386/991230-1.c
+index a57cc98..2c9f011 100644
+--- a/gcc/testsuite/gcc.target/i386/991230-1.c
++++ b/gcc/testsuite/gcc.target/i386/991230-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do run } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O -ffast-math -mtune=i486" } */
+ 
+ /* Test that floating point greater-than tests are compiled correctly with
+diff --git a/gcc/testsuite/gcc.target/i386/addr-sel-1.c b/gcc/testsuite/gcc.target/i386/addr-sel-1.c
+index 9cc820f..27623ff 100644
+--- a/gcc/testsuite/gcc.target/i386/addr-sel-1.c
++++ b/gcc/testsuite/gcc.target/i386/addr-sel-1.c
+@@ -2,7 +2,7 @@
+ /* Origin: Lev Makhlis <lmakhlis@bmc.com> */
+ 
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-require-effective-target nonpic } */
+ /* { dg-options "-O2 -mtune=i686" } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/aggregate-ret1.c b/gcc/testsuite/gcc.target/i386/aggregate-ret1.c
+index 1cd314b..6d46dc5 100644
+--- a/gcc/testsuite/gcc.target/i386/aggregate-ret1.c
++++ b/gcc/testsuite/gcc.target/i386/aggregate-ret1.c
+@@ -3,7 +3,7 @@
+    not pop the stack for the implicit pointer arg when returning a large
+    structure in memory.  */
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ 
+ struct foo {
+   int a;
+diff --git a/gcc/testsuite/gcc.target/i386/aggregate-ret2.c b/gcc/testsuite/gcc.target/i386/aggregate-ret2.c
+index 50aa0bb..16e0109 100644
+--- a/gcc/testsuite/gcc.target/i386/aggregate-ret2.c
++++ b/gcc/testsuite/gcc.target/i386/aggregate-ret2.c
+@@ -3,7 +3,7 @@
+    pops the stack for the implicit pointer arg when returning a large
+    structure in memory.  */
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ 
+ struct foo {
+   int a;
+diff --git a/gcc/testsuite/gcc.target/i386/align-main-3.c b/gcc/testsuite/gcc.target/i386/align-main-3.c
+index d2f88d8..6f8c758 100644
+--- a/gcc/testsuite/gcc.target/i386/align-main-3.c
++++ b/gcc/testsuite/gcc.target/i386/align-main-3.c
+@@ -1,5 +1,5 @@
+ /* Test for stack alignment with sibcall optimization.  */
+-/* { dg-do compile { target { *-*-linux* && ilp32 } } } */
++/* { dg-do compile { target { *-*-linux* && ia32 } } } */
+ /* { dg-options "-O2 -mpreferred-stack-boundary=4 -mincoming-stack-boundary=2" } */
+ /* { dg-final { scan-assembler "andl\[\\t \]*\\$-16,\[\\t \]*%\[re\]?sp" } } */
+ /* { dg-final { scan-assembler "call\[\\t \]*foo" } } */
+diff --git a/gcc/testsuite/gcc.target/i386/amd64-abi-1.c b/gcc/testsuite/gcc.target/i386/amd64-abi-1.c
+index d3df77a..6aa7063 100644
+--- a/gcc/testsuite/gcc.target/i386/amd64-abi-1.c
++++ b/gcc/testsuite/gcc.target/i386/amd64-abi-1.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-mno-sse" } */
+ 
+ double foo(void) { return 0; }	/* { dg-error "SSE disabled" } */
+diff --git a/gcc/testsuite/gcc.target/i386/amd64-abi-2.c b/gcc/testsuite/gcc.target/i386/amd64-abi-2.c
+index fefc88a..acc2a9e 100644
+--- a/gcc/testsuite/gcc.target/i386/amd64-abi-2.c
++++ b/gcc/testsuite/gcc.target/i386/amd64-abi-2.c
+@@ -1,6 +1,5 @@
+ /* PR target/26223 */
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-mno-80387" } */
+ long double foo(long double x) { return x; } /* { dg-error "x87 disabled" } */
+ long double bar(long double x) { return x; }
+diff --git a/gcc/testsuite/gcc.target/i386/amd64-abi-4.c b/gcc/testsuite/gcc.target/i386/amd64-abi-4.c
+index 8f32029..e88fde6 100644
+--- a/gcc/testsuite/gcc.target/i386/amd64-abi-4.c
++++ b/gcc/testsuite/gcc.target/i386/amd64-abi-4.c
+@@ -1,5 +1,4 @@
+-/* { dg-do run } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do run { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mno-sse" } */
+ 
+ #include <stdarg.h>
+diff --git a/gcc/testsuite/gcc.target/i386/amd64-abi-5.c b/gcc/testsuite/gcc.target/i386/amd64-abi-5.c
+index e4ba1fd..da2a14e 100644
+--- a/gcc/testsuite/gcc.target/i386/amd64-abi-5.c
++++ b/gcc/testsuite/gcc.target/i386/amd64-abi-5.c
+@@ -1,5 +1,4 @@
+-/* { dg-do run } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do run { target { ! { ia32 } } } } */
+ /* { dg-options "-O2" } */
+ 
+ #include <stdarg.h>
+diff --git a/gcc/testsuite/gcc.target/i386/amd64-abi-6.c b/gcc/testsuite/gcc.target/i386/amd64-abi-6.c
+index 255b547..6d076ad 100644
+--- a/gcc/testsuite/gcc.target/i386/amd64-abi-6.c
++++ b/gcc/testsuite/gcc.target/i386/amd64-abi-6.c
+@@ -1,5 +1,4 @@
+-/* { dg-do run } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do run { target { ! { ia32 } } } } */
+ /* { dg-options "-O2" } */
+ 
+ #include <stdarg.h>
+diff --git a/gcc/testsuite/gcc.target/i386/asm-1.c b/gcc/testsuite/gcc.target/i386/asm-1.c
+index 348dc32..999c576 100644
+--- a/gcc/testsuite/gcc.target/i386/asm-1.c
++++ b/gcc/testsuite/gcc.target/i386/asm-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-m32" } */
+ 
+ register unsigned int EAX asm ("r14"); /* { dg-error "register name" } */
+diff --git a/gcc/testsuite/gcc.target/i386/asm-3.c b/gcc/testsuite/gcc.target/i386/asm-3.c
+index 6c23237..ec37898 100644
+--- a/gcc/testsuite/gcc.target/i386/asm-3.c
++++ b/gcc/testsuite/gcc.target/i386/asm-3.c
+@@ -1,6 +1,6 @@
+ /* PR inline-asm/6806 */
+ /* { dg-do run } */
+-/* { dg-skip-if "" { ilp32 && { ! nonpic } } { "*" } { "" } } */
++/* { dg-skip-if "" { ia32 && { ! nonpic } } { "*" } { "" } } */
+ /* { dg-options "-O2" } */
+ 
+ extern void abort (void);
+diff --git a/gcc/testsuite/gcc.target/i386/asm-5.c b/gcc/testsuite/gcc.target/i386/asm-5.c
+index 966a824..d412980 100644
+--- a/gcc/testsuite/gcc.target/i386/asm-5.c
++++ b/gcc/testsuite/gcc.target/i386/asm-5.c
+@@ -1,6 +1,6 @@
+ /* PR inline-asm/11676 */
+ /* { dg-do run } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2" } */
+ 
+ extern void abort (void);
+diff --git a/gcc/testsuite/gcc.target/i386/attributes-error.c b/gcc/testsuite/gcc.target/i386/attributes-error.c
+index 1a5b0ea..405eda5 100644
+--- a/gcc/testsuite/gcc.target/i386/attributes-error.c
++++ b/gcc/testsuite/gcc.target/i386/attributes-error.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ 
+ void foo1(int i, int j) __attribute__((fastcall, cdecl)); /* { dg-error "not compatible" } */
+ void foo2(int i, int j) __attribute__((fastcall, stdcall)); /* { dg-error "not compatible" } */
+diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvtsd2si-2.c b/gcc/testsuite/gcc.target/i386/avx-vcvtsd2si-2.c
+index a5b04fa..f462c63 100644
+--- a/gcc/testsuite/gcc.target/i386/avx-vcvtsd2si-2.c
++++ b/gcc/testsuite/gcc.target/i386/avx-vcvtsd2si-2.c
+@@ -1,6 +1,5 @@
+-/* { dg-do run } */
++/* { dg-do run { target { ! { ia32 } } } } */
+ /* { dg-require-effective-target avx } */
+-/* { dg-require-effective-target lp64 } */
+ /* { dg-options "-O2 -mavx" } */
+ 
+ #define CHECK_H "avx-check.h"
+diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvtsi2sd-2.c b/gcc/testsuite/gcc.target/i386/avx-vcvtsi2sd-2.c
+index 49096cf..36f411e 100644
+--- a/gcc/testsuite/gcc.target/i386/avx-vcvtsi2sd-2.c
++++ b/gcc/testsuite/gcc.target/i386/avx-vcvtsi2sd-2.c
+@@ -1,6 +1,5 @@
+-/* { dg-do run } */
++/* { dg-do run { target { ! { ia32 } } } } */
+ /* { dg-require-effective-target avx } */
+-/* { dg-require-effective-target lp64 } */
+ /* { dg-options "-O2 -mavx" } */
+ 
+ #define CHECK_H "avx-check.h"
+diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvtsi2ss-2.c b/gcc/testsuite/gcc.target/i386/avx-vcvtsi2ss-2.c
+index 765c455..8dc0b35 100644
+--- a/gcc/testsuite/gcc.target/i386/avx-vcvtsi2ss-2.c
++++ b/gcc/testsuite/gcc.target/i386/avx-vcvtsi2ss-2.c
+@@ -1,6 +1,5 @@
+-/* { dg-do run } */
++/* { dg-do run { target { ! { ia32 } } } } */
+ /* { dg-require-effective-target avx } */
+-/* { dg-require-effective-target lp64 } */
+ /* { dg-options "-O2 -mavx" } */
+ 
+ #define CHECK_H "avx-check.h"
+diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvtss2si-2.c b/gcc/testsuite/gcc.target/i386/avx-vcvtss2si-2.c
+index 5160b8d..b9afab7 100644
+--- a/gcc/testsuite/gcc.target/i386/avx-vcvtss2si-2.c
++++ b/gcc/testsuite/gcc.target/i386/avx-vcvtss2si-2.c
+@@ -1,6 +1,5 @@
+-/* { dg-do run } */
++/* { dg-do run { target { ! { ia32 } } } } */
+ /* { dg-require-effective-target avx } */
+-/* { dg-require-effective-target lp64 } */
+ /* { dg-options "-O2 -mavx" } */
+ 
+ #define CHECK_H "avx-check.h"
+diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvttsd2si-2.c b/gcc/testsuite/gcc.target/i386/avx-vcvttsd2si-2.c
+index dcf487a..84bdb9f 100644
+--- a/gcc/testsuite/gcc.target/i386/avx-vcvttsd2si-2.c
++++ b/gcc/testsuite/gcc.target/i386/avx-vcvttsd2si-2.c
+@@ -1,6 +1,5 @@
+-/* { dg-do run } */
++/* { dg-do run { target { ! { ia32 } } } } */
+ /* { dg-require-effective-target avx } */
+-/* { dg-require-effective-target lp64 } */
+ /* { dg-options "-O2 -mavx" } */
+ 
+ #define CHECK_H "avx-check.h"
+diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvttss2si-2.c b/gcc/testsuite/gcc.target/i386/avx-vcvttss2si-2.c
+index 14b0721..b3c68ea 100644
+--- a/gcc/testsuite/gcc.target/i386/avx-vcvttss2si-2.c
++++ b/gcc/testsuite/gcc.target/i386/avx-vcvttss2si-2.c
+@@ -1,6 +1,5 @@
+-/* { dg-do run } */
++/* { dg-do run { target { ! { ia32 } } } } */
+ /* { dg-require-effective-target avx } */
+-/* { dg-require-effective-target lp64 } */
+ /* { dg-options "-O2 -mavx" } */
+ 
+ #define CHECK_H "avx-check.h"
+diff --git a/gcc/testsuite/gcc.target/i386/avx-vinsertps-3.c b/gcc/testsuite/gcc.target/i386/avx-vinsertps-3.c
+index 9397729..515ee41 100644
+--- a/gcc/testsuite/gcc.target/i386/avx-vinsertps-3.c
++++ b/gcc/testsuite/gcc.target/i386/avx-vinsertps-3.c
+@@ -1,4 +1,4 @@
+-/* { dg-do run { target ilp32 } } */
++/* { dg-do run { target ia32 } } */
+ /* { dg-require-effective-target avx } */
+ /* { dg-options "-O2 -mfpmath=sse -mavx -mtune=geode" } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovd-2.c b/gcc/testsuite/gcc.target/i386/avx-vmovd-2.c
+index 3c3732b..02b0d22 100644
+--- a/gcc/testsuite/gcc.target/i386/avx-vmovd-2.c
++++ b/gcc/testsuite/gcc.target/i386/avx-vmovd-2.c
+@@ -1,6 +1,5 @@
+ /* { dg-do run } */
+ /* { dg-require-effective-target avx } */
+-/* { dg-require-effective-target lp64 } */
+ /* { dg-options "-O2 -mavx" } */
+ 
+ #define CHECK_H "avx-check.h"
+diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovq-2.c b/gcc/testsuite/gcc.target/i386/avx-vmovq-2.c
+index cf0f4eb..8306d39 100644
+--- a/gcc/testsuite/gcc.target/i386/avx-vmovq-2.c
++++ b/gcc/testsuite/gcc.target/i386/avx-vmovq-2.c
+@@ -1,6 +1,5 @@
+-/* { dg-do run } */
++/* { dg-do run { target { ! { ia32 } } } } */
+ /* { dg-require-effective-target avx } */
+-/* { dg-require-effective-target lp64 } */
+ /* { dg-options "-O2 -mavx" } */
+ 
+ #define CHECK_H "avx-check.h"
+diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovq-3.c b/gcc/testsuite/gcc.target/i386/avx-vmovq-3.c
+index 26944d1..a6d6247 100644
+--- a/gcc/testsuite/gcc.target/i386/avx-vmovq-3.c
++++ b/gcc/testsuite/gcc.target/i386/avx-vmovq-3.c
+@@ -1,6 +1,5 @@
+-/* { dg-do run } */
++/* { dg-do run { target { ! { ia32 } } } } */
+ /* { dg-require-effective-target avx } */
+-/* { dg-require-effective-target lp64 } */
+ /* { dg-options "-O2 -mavx" } */
+ 
+ #define CHECK_H "avx-check.h"
+diff --git a/gcc/testsuite/gcc.target/i386/avx-vpextrq-1.c b/gcc/testsuite/gcc.target/i386/avx-vpextrq-1.c
+index 1ffe007..59e70b2 100644
+--- a/gcc/testsuite/gcc.target/i386/avx-vpextrq-1.c
++++ b/gcc/testsuite/gcc.target/i386/avx-vpextrq-1.c
+@@ -1,6 +1,5 @@
+-/* { dg-do run } */
++/* { dg-do run { target { ! { ia32 } } } } */
+ /* { dg-require-effective-target avx } */
+-/* { dg-require-effective-target lp64 } */
+ /* { dg-options "-O2 -mavx" } */
+ 
+ #define CHECK_H "avx-check.h"
+diff --git a/gcc/testsuite/gcc.target/i386/avx-vpinsrq-1.c b/gcc/testsuite/gcc.target/i386/avx-vpinsrq-1.c
+index 3b9d26a..595fc1b 100644
+--- a/gcc/testsuite/gcc.target/i386/avx-vpinsrq-1.c
++++ b/gcc/testsuite/gcc.target/i386/avx-vpinsrq-1.c
+@@ -1,6 +1,5 @@
+-/* { dg-do run } */
++/* { dg-do run { target { ! { ia32 } } } } */
+ /* { dg-require-effective-target avx } */
+-/* { dg-require-effective-target lp64 } */
+ /* { dg-options "-O2 -mavx" } */
+ 
+ #define CHECK_H "avx-check.h"
+diff --git a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-16.c b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-16.c
+index ad46d35..c728e25 100644
+--- a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-16.c
++++ b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-16.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target lp64 } } */
+ /* { dg-options "-O2 -mavx -mabi=ms -mtune=generic -dp" } */
+ 
+ typedef float __m256 __attribute__ ((__vector_size__ (32), __may_alias__));
+diff --git a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-17.c b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-17.c
+index 5b5c64b..8dfe3d0 100644
+--- a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-17.c
++++ b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-17.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target lp64 } } */
+ /* { dg-options "-O2 -mavx -mabi=ms -mtune=generic -dp" } */
+ 
+ typedef float __m256 __attribute__ ((__vector_size__ (32), __may_alias__));
+diff --git a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-18.c b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-18.c
+index 541f77d..ea7e91a 100644
+--- a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-18.c
++++ b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-18.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target lp64 } } */
+ /* { dg-options "-O0 -mavx -mabi=ms -mtune=generic -dp" } */
+ 
+ typedef float __m256 __attribute__ ((__vector_size__ (32), __may_alias__));
+diff --git a/gcc/testsuite/gcc.target/i386/bitfield1.c b/gcc/testsuite/gcc.target/i386/bitfield1.c
+index 1590396..00b7bfd 100644
+--- a/gcc/testsuite/gcc.target/i386/bitfield1.c
++++ b/gcc/testsuite/gcc.target/i386/bitfield1.c
+@@ -1,6 +1,6 @@
+ // Test for bitfield alignment in structs on IA-32
+ // { dg-do run }
+-// { dg-require-effective-target ilp32 }
++// { dg-require-effective-target ia32 }
+ // { dg-options "-O2" }
+ // { dg-options "-mno-align-double -mno-ms-bitfields" { target i?86-*-interix* i?86-*-cygwin* i?86-*-mingw*} }
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/bitfield2.c b/gcc/testsuite/gcc.target/i386/bitfield2.c
+index d665fcb..e400598 100644
+--- a/gcc/testsuite/gcc.target/i386/bitfield2.c
++++ b/gcc/testsuite/gcc.target/i386/bitfield2.c
+@@ -1,6 +1,6 @@
+ // Test for bitfield alignment in structs on IA-32
+ // { dg-do run }
+-// { dg-require-effective-target ilp32 }
++// { dg-require-effective-target ia32 }
+ // { dg-options "-O2" }
+ // { dg-options "-mno-align-double -mno-ms-bitfields" { target i?86-*-interix* i?86-*-cygwin* i?86-*-mingw* } }
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/bmi-2.c b/gcc/testsuite/gcc.target/i386/bmi-2.c
+index 4f8c14f..56f7387 100644
+--- a/gcc/testsuite/gcc.target/i386/bmi-2.c
++++ b/gcc/testsuite/gcc.target/i386/bmi-2.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 }  } } } */
+ /* { dg-options "-O2 -mbmi " } */
+ /* { dg-final { scan-assembler "andn\[^\\n]*(%|)rax" } } */
+ /* { dg-final { scan-assembler "bextr\[^\\n]*(%|)rax" } } */
+diff --git a/gcc/testsuite/gcc.target/i386/bmi-5.c b/gcc/testsuite/gcc.target/i386/bmi-5.c
+index 906bf21..546a593 100644
+--- a/gcc/testsuite/gcc.target/i386/bmi-5.c
++++ b/gcc/testsuite/gcc.target/i386/bmi-5.c
+@@ -1,5 +1,4 @@
+-/* { dg-do link } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do link { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mbmi" } */
+ 
+ #include <x86intrin.h>
+diff --git a/gcc/testsuite/gcc.target/i386/builtin-copysign.c b/gcc/testsuite/gcc.target/i386/builtin-copysign.c
+index c20a0b6..175b931 100644
+--- a/gcc/testsuite/gcc.target/i386/builtin-copysign.c
++++ b/gcc/testsuite/gcc.target/i386/builtin-copysign.c
+@@ -11,6 +11,4 @@ MODE test5##CEXT(MODE a, MODE b) { return __builtin_copysign##CEXT(a, b); }
+ TEST_SET (float, f)
+ TEST_SET (double, )
+ TEST_SET (long double, l)
+-#if defined (__LP64__)
+ TEST_SET (__float128, q)
+-#endif
+diff --git a/gcc/testsuite/gcc.target/i386/builtin-unreachable.c b/gcc/testsuite/gcc.target/i386/builtin-unreachable.c
+index 802cf16..91923a2 100644
+--- a/gcc/testsuite/gcc.target/i386/builtin-unreachable.c
++++ b/gcc/testsuite/gcc.target/i386/builtin-unreachable.c
+@@ -1,7 +1,7 @@
+ /* This should return 1 without setting up a stack frame or
+    jumping.  */
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -fomit-frame-pointer" } */
+ int h (char *p)
+ {
+diff --git a/gcc/testsuite/gcc.target/i386/cleanup-2.c b/gcc/testsuite/gcc.target/i386/cleanup-2.c
+index 2bd1802..36dd80d 100644
+--- a/gcc/testsuite/gcc.target/i386/cleanup-2.c
++++ b/gcc/testsuite/gcc.target/i386/cleanup-2.c
+@@ -1,5 +1,4 @@
+-/* { dg-do run { target *-*-linux* } } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do run { target { *-*-linux* && { ! { ia32 } } } } } */
+ /* { dg-options "-fexceptions -fnon-call-exceptions -fasynchronous-unwind-tables -O2" } */
+ /* Test complex CFA value expressions.  */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/clobbers.c b/gcc/testsuite/gcc.target/i386/clobbers.c
+index 17987db..1a70688 100644
+--- a/gcc/testsuite/gcc.target/i386/clobbers.c
++++ b/gcc/testsuite/gcc.target/i386/clobbers.c
+@@ -16,7 +16,7 @@ int main ()
+ 	   Ditto for any x86 system that is ilp32 && pic.
+ 	*/
+ #if !(defined (__MACH__))
+-#if ! defined (__PIC__) || defined (__LP64__)
++#if ! defined (__PIC__) || defined (__x86_64__)
+         __asm__ ("movl $1,%0\n\txorl %%ebx,%%ebx" : "=r" (i) : : "ebx");
+         if (i != 1)
+                 abort ();
+diff --git a/gcc/testsuite/gcc.target/i386/cmov8.c b/gcc/testsuite/gcc.target/i386/cmov8.c
+index 639fb62..2d95c25 100644
+--- a/gcc/testsuite/gcc.target/i386/cmov8.c
++++ b/gcc/testsuite/gcc.target/i386/cmov8.c
+@@ -1,6 +1,6 @@
+ /* PR target/36936 */
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -march=i686" } */
+ /* { dg-final { scan-assembler "cmov\[^8\]" } } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/cmpxchg16b-1.c b/gcc/testsuite/gcc.target/i386/cmpxchg16b-1.c
+index fd266f5..a78017a 100644
+--- a/gcc/testsuite/gcc.target/i386/cmpxchg16b-1.c
++++ b/gcc/testsuite/gcc.target/i386/cmpxchg16b-1.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mcx16" } */
+ 
+ typedef int TItype __attribute__ ((mode (TI)));
+diff --git a/gcc/testsuite/gcc.target/i386/compress-float-387-pic.c b/gcc/testsuite/gcc.target/i386/compress-float-387-pic.c
+index fa69eed..e4d71c2 100644
+--- a/gcc/testsuite/gcc.target/i386/compress-float-387-pic.c
++++ b/gcc/testsuite/gcc.target/i386/compress-float-387-pic.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-require-effective-target fpic } */
+ /* { dg-options "-O2 -march=pentium4 -mtune=prescott -mfpmath=387 -fpic" } */
+ double foo (double x) {
+diff --git a/gcc/testsuite/gcc.target/i386/compress-float-387.c b/gcc/testsuite/gcc.target/i386/compress-float-387.c
+index bed2986..03a834d 100644
+--- a/gcc/testsuite/gcc.target/i386/compress-float-387.c
++++ b/gcc/testsuite/gcc.target/i386/compress-float-387.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -march=pentium4 -mtune=prescott -mfpmath=387" } */
+ double foo (double x) {
+   return x + 1.75;
+diff --git a/gcc/testsuite/gcc.target/i386/compress-float-sse-pic.c b/gcc/testsuite/gcc.target/i386/compress-float-sse-pic.c
+index 2c9be7c..ef024dd 100644
+--- a/gcc/testsuite/gcc.target/i386/compress-float-sse-pic.c
++++ b/gcc/testsuite/gcc.target/i386/compress-float-sse-pic.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-require-effective-target fpic } */
+ /* { dg-options "-O2 -march=pentium4 -mtune=prescott -mfpmath=sse -fpic" } */
+ double foo (double x) {
+diff --git a/gcc/testsuite/gcc.target/i386/compress-float-sse.c b/gcc/testsuite/gcc.target/i386/compress-float-sse.c
+index 48db611..c56be13 100644
+--- a/gcc/testsuite/gcc.target/i386/compress-float-sse.c
++++ b/gcc/testsuite/gcc.target/i386/compress-float-sse.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -march=pentium4 -mtune=prescott -mfpmath=sse" } */
+ double foo (double x) {
+   return x + 1.75;
+diff --git a/gcc/testsuite/gcc.target/i386/crc32-2.c b/gcc/testsuite/gcc.target/i386/crc32-2.c
+index e7af9ab..678cfd5 100644
+--- a/gcc/testsuite/gcc.target/i386/crc32-2.c
++++ b/gcc/testsuite/gcc.target/i386/crc32-2.c
+@@ -1,6 +1,6 @@
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -mcrc32" } */
+-/* { dg-final { scan-assembler "crc32q\[^\\n\]*rax" { target lp64 } } } */
++/* { dg-final { scan-assembler "crc32q\[^\\n\]*rax" { target { ! { ia32 } } } } } */
+ 
+ unsigned long long
+ crc32d (unsigned long long x, unsigned long long y)
+diff --git a/gcc/testsuite/gcc.target/i386/crc32-3.c b/gcc/testsuite/gcc.target/i386/crc32-3.c
+index e77d7d9..7518a45 100644
+--- a/gcc/testsuite/gcc.target/i386/crc32-3.c
++++ b/gcc/testsuite/gcc.target/i386/crc32-3.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -mcrc32" } */
+ /* { dg-final { scan-assembler "__builtin_ia32_crc32di" } } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/divmod-7.c b/gcc/testsuite/gcc.target/i386/divmod-7.c
+index 20a4cd3..de4a1fb 100644
+--- a/gcc/testsuite/gcc.target/i386/divmod-7.c
++++ b/gcc/testsuite/gcc.target/i386/divmod-7.c
+@@ -1,6 +1,5 @@
+-/* { dg-do compile } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -m8bit-idiv" } */
+-/* { dg-require-effective-target lp64 } */
+ 
+ extern void abort (void);
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/divmod-8.c b/gcc/testsuite/gcc.target/i386/divmod-8.c
+index 5192b98..eb09a6d 100644
+--- a/gcc/testsuite/gcc.target/i386/divmod-8.c
++++ b/gcc/testsuite/gcc.target/i386/divmod-8.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -m8bit-idiv" } */
+ 
+ extern void foo (long long, long long, long long, long long,
+diff --git a/gcc/testsuite/gcc.target/i386/fastcall-sseregparm.c b/gcc/testsuite/gcc.target/i386/fastcall-sseregparm.c
+index 1a55a3d..3f33f6b 100644
+--- a/gcc/testsuite/gcc.target/i386/fastcall-sseregparm.c
++++ b/gcc/testsuite/gcc.target/i386/fastcall-sseregparm.c
+@@ -1,6 +1,6 @@
+ /* { dg-do run } */
+ /* { dg-options "-mpreferred-stack-boundary=4 -msse" } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-require-effective-target sse } */
+ 
+ #include "sse-check.h"
+diff --git a/gcc/testsuite/gcc.target/i386/fma3-builtin.c b/gcc/testsuite/gcc.target/i386/fma3-builtin.c
+index ba8af55..2d9c5c7 100644
+--- a/gcc/testsuite/gcc.target/i386/fma3-builtin.c
++++ b/gcc/testsuite/gcc.target/i386/fma3-builtin.c
+@@ -1,8 +1,7 @@
+ /* Test that the compiler properly generates floating point multiply
+    and add instructions FMA3 systems.  */
+ 
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mfma -mno-fma4" } */
+ 
+ #ifndef __FP_FAST_FMAF
+diff --git a/gcc/testsuite/gcc.target/i386/fma3-fma.c b/gcc/testsuite/gcc.target/i386/fma3-fma.c
+index 1cedba8..f18f97b 100644
+--- a/gcc/testsuite/gcc.target/i386/fma3-fma.c
++++ b/gcc/testsuite/gcc.target/i386/fma3-fma.c
+@@ -1,8 +1,7 @@
+ /* Test that the compiler properly optimizes floating point multiply
+    and add instructions FMA3 systems.  */
+ 
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mfma -mno-fma4" } */
+ 
+ extern void exit (int);
+diff --git a/gcc/testsuite/gcc.target/i386/fma4-256-vector.c b/gcc/testsuite/gcc.target/i386/fma4-256-vector.c
+index 1bd2ce4..edaa21a 100644
+--- a/gcc/testsuite/gcc.target/i386/fma4-256-vector.c
++++ b/gcc/testsuite/gcc.target/i386/fma4-256-vector.c
+@@ -1,8 +1,7 @@
+ /* Test that the compiler properly optimizes floating point multiply and add
+    instructions vector into vfmaddps on FMA4 systems.  */
+ 
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mfma4 -ftree-vectorize -mtune=generic" } */
+ 
+ extern void exit (int);
+diff --git a/gcc/testsuite/gcc.target/i386/fma4-builtin.c b/gcc/testsuite/gcc.target/i386/fma4-builtin.c
+index 5659cf4..7135cc9 100644
+--- a/gcc/testsuite/gcc.target/i386/fma4-builtin.c
++++ b/gcc/testsuite/gcc.target/i386/fma4-builtin.c
+@@ -1,8 +1,7 @@
+ /* Test that the compiler properly generates floating point multiply
+    and add instructions FMA4 systems.  */
+ 
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mfma4" } */
+ 
+ #ifndef __FP_FAST_FMAF
+diff --git a/gcc/testsuite/gcc.target/i386/fma4-fma-2.c b/gcc/testsuite/gcc.target/i386/fma4-fma-2.c
+index 23f6ec1..c15be1e 100644
+--- a/gcc/testsuite/gcc.target/i386/fma4-fma-2.c
++++ b/gcc/testsuite/gcc.target/i386/fma4-fma-2.c
+@@ -2,8 +2,7 @@
+    and add instructions into vfmaddss, vfmsubss, vfnmaddss,
+    vfnmsubss on FMA4 systems.  */
+ 
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -funsafe-math-optimizations -mfma4" } */
+ 
+ extern void exit (int);
+diff --git a/gcc/testsuite/gcc.target/i386/fma4-fma.c b/gcc/testsuite/gcc.target/i386/fma4-fma.c
+index cb90691..63b35dc 100644
+--- a/gcc/testsuite/gcc.target/i386/fma4-fma.c
++++ b/gcc/testsuite/gcc.target/i386/fma4-fma.c
+@@ -2,8 +2,7 @@
+    and add instructions into vfmaddss, vfmsubss, vfnmaddss,
+    vfnmsubss on FMA4 systems.  */
+ 
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mfma4" } */
+ 
+ extern void exit (int);
+diff --git a/gcc/testsuite/gcc.target/i386/fma4-vector-2.c b/gcc/testsuite/gcc.target/i386/fma4-vector-2.c
+index 2f3ec96..d8b0d08 100644
+--- a/gcc/testsuite/gcc.target/i386/fma4-vector-2.c
++++ b/gcc/testsuite/gcc.target/i386/fma4-vector-2.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mfma4 -ftree-vectorize -mtune=generic" } */
+ 
+ float r[256], s[256];
+diff --git a/gcc/testsuite/gcc.target/i386/fma4-vector.c b/gcc/testsuite/gcc.target/i386/fma4-vector.c
+index da12780..db5ffdd 100644
+--- a/gcc/testsuite/gcc.target/i386/fma4-vector.c
++++ b/gcc/testsuite/gcc.target/i386/fma4-vector.c
+@@ -1,8 +1,7 @@
+ /* Test that the compiler properly optimizes floating point multiply and add
+    instructions vector into vfmaddps on FMA4 systems.  */
+ 
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mfma4 -ftree-vectorize -mtune=generic" } */
+ 
+ extern void exit (int);
+diff --git a/gcc/testsuite/gcc.target/i386/funcspec-1.c b/gcc/testsuite/gcc.target/i386/funcspec-1.c
+index bd8e67d..6eceac2 100644
+--- a/gcc/testsuite/gcc.target/i386/funcspec-1.c
++++ b/gcc/testsuite/gcc.target/i386/funcspec-1.c
+@@ -2,7 +2,7 @@
+    32-bit, which does not generate SSE2 by default, but still generate 387 code
+    for a function that doesn't use attribute((option)).  */
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-skip-if "" { i?86-*-* x86_64-*-* } { "-march=*" } { "-march=i386" } } */
+ /* { dg-options "-O3 -ftree-vectorize -march=i386" } */
+ /* { dg-final { scan-assembler "addps\[ \t\]" } } */
+diff --git a/gcc/testsuite/gcc.target/i386/funcspec-10.c b/gcc/testsuite/gcc.target/i386/funcspec-10.c
+index 9526e7d..de39ff0 100644
+--- a/gcc/testsuite/gcc.target/i386/funcspec-10.c
++++ b/gcc/testsuite/gcc.target/i386/funcspec-10.c
+@@ -1,6 +1,6 @@
+ /* PR target/36936 */
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -march=i686" } */
+ /* { dg-final { scan-assembler-not "cmov" } } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/funcspec-11.c b/gcc/testsuite/gcc.target/i386/funcspec-11.c
+index 065ca3c..7c39f4c 100644
+--- a/gcc/testsuite/gcc.target/i386/funcspec-11.c
++++ b/gcc/testsuite/gcc.target/i386/funcspec-11.c
+@@ -1,6 +1,6 @@
+ /* PR target/36936 */
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -march=i386" } */
+ /* { dg-final { scan-assembler "cmov" } } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/funcspec-2.c b/gcc/testsuite/gcc.target/i386/funcspec-2.c
+index c132fc9..88c14b2 100644
+--- a/gcc/testsuite/gcc.target/i386/funcspec-2.c
++++ b/gcc/testsuite/gcc.target/i386/funcspec-2.c
+@@ -1,6 +1,5 @@
+ /* Test whether using target specific options, we can generate FMA4 code.  */
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -march=k8" } */
+ 
+ extern void exit (int);
+diff --git a/gcc/testsuite/gcc.target/i386/funcspec-5.c b/gcc/testsuite/gcc.target/i386/funcspec-5.c
+index 1e18dcf..8dd17e5 100644
+--- a/gcc/testsuite/gcc.target/i386/funcspec-5.c
++++ b/gcc/testsuite/gcc.target/i386/funcspec-5.c
+@@ -1,7 +1,7 @@
+ /* Test whether all of the 32-bit function specific options are accepted
+    without error.  */
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ 
+ extern void test_abm (void)			__attribute__((__target__("abm")));
+ extern void test_aes (void)			__attribute__((__target__("aes")));
+diff --git a/gcc/testsuite/gcc.target/i386/funcspec-6.c b/gcc/testsuite/gcc.target/i386/funcspec-6.c
+index 92a3cb5..62818d9 100644
+--- a/gcc/testsuite/gcc.target/i386/funcspec-6.c
++++ b/gcc/testsuite/gcc.target/i386/funcspec-6.c
+@@ -1,7 +1,6 @@
+ /* Test whether all of the 64-bit function specific options are accepted
+    without error.  */
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ 
+ extern void test_abm (void)			__attribute__((__target__("abm")));
+ extern void test_aes (void)			__attribute__((__target__("aes")));
+diff --git a/gcc/testsuite/gcc.target/i386/gcc-have-sync-compare-and-swap-1.c b/gcc/testsuite/gcc.target/i386/gcc-have-sync-compare-and-swap-1.c
+index d20a717..6d6ce99 100644
+--- a/gcc/testsuite/gcc.target/i386/gcc-have-sync-compare-and-swap-1.c
++++ b/gcc/testsuite/gcc.target/i386/gcc-have-sync-compare-and-swap-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do preprocess } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-skip-if "" { i?86-*-* x86_64-*-* } { "-march=*" } { "-march=i386" } } */
+ /* { dg-options "-march=i386" } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/gcc-have-sync-compare-and-swap-2.c b/gcc/testsuite/gcc.target/i386/gcc-have-sync-compare-and-swap-2.c
+index 01a49b6..08c4e0b 100644
+--- a/gcc/testsuite/gcc.target/i386/gcc-have-sync-compare-and-swap-2.c
++++ b/gcc/testsuite/gcc.target/i386/gcc-have-sync-compare-and-swap-2.c
+@@ -1,5 +1,5 @@
+ /* { dg-do preprocess } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-skip-if "" { i?86-*-* x86_64-*-* } { "-march=*" } { "-march=i486" } } */
+ /* { dg-options "-march=i486" } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/gcc-have-sync-compare-and-swap-3.c b/gcc/testsuite/gcc.target/i386/gcc-have-sync-compare-and-swap-3.c
+index bc5a5598..40dd9357 100644
+--- a/gcc/testsuite/gcc.target/i386/gcc-have-sync-compare-and-swap-3.c
++++ b/gcc/testsuite/gcc.target/i386/gcc-have-sync-compare-and-swap-3.c
+@@ -1,5 +1,5 @@
+ /* { dg-do preprocess } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-march=i586" } */
+ 
+ #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
+diff --git a/gcc/testsuite/gcc.target/i386/gcc-have-sync-compare-and-swap-4.c b/gcc/testsuite/gcc.target/i386/gcc-have-sync-compare-and-swap-4.c
+index 2792869..ab250dd 100644
+--- a/gcc/testsuite/gcc.target/i386/gcc-have-sync-compare-and-swap-4.c
++++ b/gcc/testsuite/gcc.target/i386/gcc-have-sync-compare-and-swap-4.c
+@@ -1,5 +1,4 @@
+-/* { dg-do preprocess } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do preprocess { target { ! { ia32 } } } } */
+ /* { dg-options "-mcx16" } */
+ 
+ #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
+diff --git a/gcc/testsuite/gcc.target/i386/incoming-1.c b/gcc/testsuite/gcc.target/i386/incoming-1.c
+index 86e98a7..c59b208 100644
+--- a/gcc/testsuite/gcc.target/i386/incoming-1.c
++++ b/gcc/testsuite/gcc.target/i386/incoming-1.c
+@@ -1,5 +1,5 @@
+ /* PR middle-end/37009 */
+-/* { dg-do compile { target { { ! *-*-darwin* } && ilp32 } } } */
++/* { dg-do compile { target { { ! *-*-darwin* } && ia32 } } } */
+ /* { dg-options "-w -msse2 -mpreferred-stack-boundary=2" } */
+ 
+ #include <emmintrin.h>
+diff --git a/gcc/testsuite/gcc.target/i386/incoming-10.c b/gcc/testsuite/gcc.target/i386/incoming-10.c
+index 31d9e61..1fb9ef4 100644
+--- a/gcc/testsuite/gcc.target/i386/incoming-10.c
++++ b/gcc/testsuite/gcc.target/i386/incoming-10.c
+@@ -1,5 +1,5 @@
+ /* PR target/40838 */
+-/* { dg-do compile { target { { ! *-*-darwin* } && ilp32 } } } */
++/* { dg-do compile { target { { ! *-*-darwin* } && ia32 } } } */
+ /* { dg-options "-w -mstackrealign -fomit-frame-pointer -O3 -march=barcelona -mpreferred-stack-boundary=4" } */
+ 
+ struct s {
+diff --git a/gcc/testsuite/gcc.target/i386/incoming-11.c b/gcc/testsuite/gcc.target/i386/incoming-11.c
+index e5787af..a7b7db5 100644
+--- a/gcc/testsuite/gcc.target/i386/incoming-11.c
++++ b/gcc/testsuite/gcc.target/i386/incoming-11.c
+@@ -1,5 +1,5 @@
+ /* PR target/40838 */
+-/* { dg-do compile { target { { ! *-*-darwin* } && ilp32 } } } */
++/* { dg-do compile { target { { ! *-*-darwin* } && ia32 } } } */
+ /* { dg-options "-w -mstackrealign -fomit-frame-pointer -O3 -march=barcelona -mpreferred-stack-boundary=4" } */
+ 
+ void g();
+diff --git a/gcc/testsuite/gcc.target/i386/incoming-12.c b/gcc/testsuite/gcc.target/i386/incoming-12.c
+index d7ef103..21f3f01 100644
+--- a/gcc/testsuite/gcc.target/i386/incoming-12.c
++++ b/gcc/testsuite/gcc.target/i386/incoming-12.c
+@@ -1,5 +1,5 @@
+ /* PR target/40838 */
+-/* { dg-do compile { target { { ! *-*-darwin* } && ilp32 } } } */
++/* { dg-do compile { target { { ! *-*-darwin* } && ia32 } } } */
+ /* { dg-options "-w -mstackrealign -O2 -msse2 -mpreferred-stack-boundary=4" } */
+ 
+ typedef int v4si __attribute__ ((vector_size (16)));
+diff --git a/gcc/testsuite/gcc.target/i386/incoming-13.c b/gcc/testsuite/gcc.target/i386/incoming-13.c
+index bbc8993..cad47a9 100644
+--- a/gcc/testsuite/gcc.target/i386/incoming-13.c
++++ b/gcc/testsuite/gcc.target/i386/incoming-13.c
+@@ -1,5 +1,5 @@
+ /* PR target/40838 */
+-/* { dg-do compile { target { { ! *-*-darwin* } && ilp32 } } } */
++/* { dg-do compile { target { { ! *-*-darwin* } && ia32 } } } */
+ /* { dg-options "-w -mstackrealign -O2 -mpreferred-stack-boundary=4" } */
+ 
+ extern double y(double *s3);
+diff --git a/gcc/testsuite/gcc.target/i386/incoming-14.c b/gcc/testsuite/gcc.target/i386/incoming-14.c
+index d27179d..03ef50b 100644
+--- a/gcc/testsuite/gcc.target/i386/incoming-14.c
++++ b/gcc/testsuite/gcc.target/i386/incoming-14.c
+@@ -1,5 +1,5 @@
+ /* PR target/40838 */
+-/* { dg-do compile { target { { ! *-*-darwin* } && ilp32 } } } */
++/* { dg-do compile { target { { ! *-*-darwin* } && ia32 } } } */
+ /* { dg-options "-w -mstackrealign -O2 -mpreferred-stack-boundary=4" } */
+ 
+ extern int y(int *s3);
+diff --git a/gcc/testsuite/gcc.target/i386/incoming-15.c b/gcc/testsuite/gcc.target/i386/incoming-15.c
+index e6a1749..897f3bc 100644
+--- a/gcc/testsuite/gcc.target/i386/incoming-15.c
++++ b/gcc/testsuite/gcc.target/i386/incoming-15.c
+@@ -1,5 +1,5 @@
+ /* PR target/40838 */
+-/* { dg-do compile { target { { ! *-*-darwin* } && ilp32 } } } */
++/* { dg-do compile { target { { ! *-*-darwin* } && ia32 } } } */
+ /* { dg-options "-w -mstackrealign -O2 -mpreferred-stack-boundary=4" } */
+ 
+ extern long long y(long long *s3);
+diff --git a/gcc/testsuite/gcc.target/i386/incoming-2.c b/gcc/testsuite/gcc.target/i386/incoming-2.c
+index 2947d33..4fc5629 100644
+--- a/gcc/testsuite/gcc.target/i386/incoming-2.c
++++ b/gcc/testsuite/gcc.target/i386/incoming-2.c
+@@ -1,5 +1,5 @@
+ /* PR middle-end/37009 */
+-/* { dg-do compile { target { { ! *-*-darwin* } && ilp32 } } } */
++/* { dg-do compile { target { { ! *-*-darwin* } && ia32 } } } */
+ /* { dg-options "-w -msse2 -mpreferred-stack-boundary=2" } */
+ 
+ #include <emmintrin.h>
+diff --git a/gcc/testsuite/gcc.target/i386/incoming-3.c b/gcc/testsuite/gcc.target/i386/incoming-3.c
+index 1edbfda..1d39b03 100644
+--- a/gcc/testsuite/gcc.target/i386/incoming-3.c
++++ b/gcc/testsuite/gcc.target/i386/incoming-3.c
+@@ -1,5 +1,5 @@
+ /* PR middle-end/37009 */
+-/* { dg-do compile { target { { ! *-*-darwin* } && ilp32 } } } */
++/* { dg-do compile { target { { ! *-*-darwin* } && ia32 } } } */
+ /* { dg-options "-w -msse2 -mpreferred-stack-boundary=2" } */
+ 
+ #include <emmintrin.h>
+diff --git a/gcc/testsuite/gcc.target/i386/incoming-4.c b/gcc/testsuite/gcc.target/i386/incoming-4.c
+index 80c169c..c3be961 100644
+--- a/gcc/testsuite/gcc.target/i386/incoming-4.c
++++ b/gcc/testsuite/gcc.target/i386/incoming-4.c
+@@ -1,5 +1,5 @@
+ /* PR middle-end/37009 */
+-/* { dg-do compile { target { { ! *-*-darwin* } && ilp32 } } } */
++/* { dg-do compile { target { { ! *-*-darwin* } && ia32 } } } */
+ /* { dg-options "-w -msse2 -mpreferred-stack-boundary=2" } */
+ 
+ #include <stdarg.h>
+diff --git a/gcc/testsuite/gcc.target/i386/incoming-5.c b/gcc/testsuite/gcc.target/i386/incoming-5.c
+index f083d40..9bbecdb 100644
+--- a/gcc/testsuite/gcc.target/i386/incoming-5.c
++++ b/gcc/testsuite/gcc.target/i386/incoming-5.c
+@@ -1,5 +1,5 @@
+ /* PR middle-end/37009 */
+-/* { dg-do compile { target { { ! *-*-darwin* } && ilp32 } } } */
++/* { dg-do compile { target { { ! *-*-darwin* } && ia32 } } } */
+ /* { dg-options "-m32 -mincoming-stack-boundary=2 -mpreferred-stack-boundary=2" } */
+ 
+ extern void bar (double *);
+diff --git a/gcc/testsuite/gcc.target/i386/incoming-6.c b/gcc/testsuite/gcc.target/i386/incoming-6.c
+index 5cc4ab3..a2448ec 100644
+--- a/gcc/testsuite/gcc.target/i386/incoming-6.c
++++ b/gcc/testsuite/gcc.target/i386/incoming-6.c
+@@ -1,5 +1,5 @@
+ /* PR target/40838 */
+-/* { dg-do compile { target { { ! *-*-darwin* } && ilp32 } } } */
++/* { dg-do compile { target { { ! *-*-darwin* } && ia32 } } } */
+ /* { dg-options "-w -mstackrealign -O2 -msse2 -mpreferred-stack-boundary=4" } */
+ 
+ typedef int v4si __attribute__ ((vector_size (16)));
+diff --git a/gcc/testsuite/gcc.target/i386/incoming-7.c b/gcc/testsuite/gcc.target/i386/incoming-7.c
+index cdd6037..0b8bbd5 100644
+--- a/gcc/testsuite/gcc.target/i386/incoming-7.c
++++ b/gcc/testsuite/gcc.target/i386/incoming-7.c
+@@ -1,5 +1,5 @@
+ /* PR target/40838 */
+-/* { dg-do compile { target { { ! *-*-darwin* } && ilp32 } } } */
++/* { dg-do compile { target { { ! *-*-darwin* } && ia32 } } } */
+ /* { dg-options "-w -mstackrealign -O2 -msse2 -mpreferred-stack-boundary=4" } */
+ 
+ typedef int v4si __attribute__ ((vector_size (16)));
+diff --git a/gcc/testsuite/gcc.target/i386/incoming-8.c b/gcc/testsuite/gcc.target/i386/incoming-8.c
+index 2dd8800..298ce02 100644
+--- a/gcc/testsuite/gcc.target/i386/incoming-8.c
++++ b/gcc/testsuite/gcc.target/i386/incoming-8.c
+@@ -1,5 +1,5 @@
+ /* PR target/40838 */
+-/* { dg-do compile { target { { ! *-*-darwin* } && ilp32 } } } */
++/* { dg-do compile { target { { ! *-*-darwin* } && ia32 } } } */
+ /* { dg-options "-w -mstackrealign -O3 -msse2 -mpreferred-stack-boundary=4" } */
+ 
+ float
+diff --git a/gcc/testsuite/gcc.target/i386/incoming-9.c b/gcc/testsuite/gcc.target/i386/incoming-9.c
+index e43cbd6..1786937 100644
+--- a/gcc/testsuite/gcc.target/i386/incoming-9.c
++++ b/gcc/testsuite/gcc.target/i386/incoming-9.c
+@@ -1,5 +1,5 @@
+ /* PR target/40838 */
+-/* { dg-do compile { target { { ! *-*-darwin* } && ilp32 } } } */
++/* { dg-do compile { target { { ! *-*-darwin* } && ia32 } } } */
+ /* { dg-options "-w -mstackrealign -O3 -mno-sse -mpreferred-stack-boundary=4" } */
+ 
+ float
+diff --git a/gcc/testsuite/gcc.target/i386/lea.c b/gcc/testsuite/gcc.target/i386/lea.c
+index f8f967e..bba345e 100644
+--- a/gcc/testsuite/gcc.target/i386/lea.c
++++ b/gcc/testsuite/gcc.target/i386/lea.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-skip-if "" { i?86-*-* x86_64-*-* } { "-march=*" } { "-march=pentiumpro" } } */
+ /* { dg-options "-O2 -march=pentiumpro" } */
+ /* { dg-final { scan-assembler "leal" } } */
+diff --git a/gcc/testsuite/gcc.target/i386/local.c b/gcc/testsuite/gcc.target/i386/local.c
+index 4cb5c81..872fd4d 100644
+--- a/gcc/testsuite/gcc.target/i386/local.c
++++ b/gcc/testsuite/gcc.target/i386/local.c
+@@ -1,7 +1,7 @@
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -funit-at-a-time" } */
+-/* { dg-final { scan-assembler "magic\[^\\n\]*eax" { target ilp32 } } } */
+-/* { dg-final { scan-assembler "magic\[^\\n\]*edi" { target lp64 } } } */
++/* { dg-final { scan-assembler "magic\[^\\n\]*eax" { target ia32 } } } */
++/* { dg-final { scan-assembler "magic\[^\\n\]*edi" { target { ! { ia32 } } } } } */
+ 
+ /* Verify that local calling convention is used.  */
+ static t(int) __attribute__ ((noinline));
+diff --git a/gcc/testsuite/gcc.target/i386/loop-1.c b/gcc/testsuite/gcc.target/i386/loop-1.c
+index 30cfd68..1af62f2 100644
+--- a/gcc/testsuite/gcc.target/i386/loop-1.c
++++ b/gcc/testsuite/gcc.target/i386/loop-1.c
+@@ -1,6 +1,6 @@
+ /* PR optimization/9888 */
+ /* { dg-do run } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-mtune=k6 -O3" } */
+ 
+ /* Verify that GCC doesn't emit out of range 'loop' instructions.  */
+diff --git a/gcc/testsuite/gcc.target/i386/loop-2.c b/gcc/testsuite/gcc.target/i386/loop-2.c
+index cf44d30..eec7163 100644
+--- a/gcc/testsuite/gcc.target/i386/loop-2.c
++++ b/gcc/testsuite/gcc.target/i386/loop-2.c
+@@ -1,7 +1,7 @@
+ /* PR optimization/9888 */
+ /* Originator: Jim Bray <jb@as220.org> */
+ /* { dg-do run } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-mtune=k6 -Os" } */
+ 
+ enum reload_type
+diff --git a/gcc/testsuite/gcc.target/i386/loop-3.c b/gcc/testsuite/gcc.target/i386/loop-3.c
+index 782512f..4fcd390 100644
+--- a/gcc/testsuite/gcc.target/i386/loop-3.c
++++ b/gcc/testsuite/gcc.target/i386/loop-3.c
+@@ -2,7 +2,7 @@
+ /* Originator: Tim McGrath <misty-@charter.net> */
+ /* Testcase contributed by Eric Botcazou <ebotcazou@libertysurf.fr> */
+ /* { dg-do run } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-mtune=k6 -O3 -ffast-math -funroll-loops" } */
+ 
+ extern void *memset (void *, int, __SIZE_TYPE__);
+diff --git a/gcc/testsuite/gcc.target/i386/max-stack-align.c b/gcc/testsuite/gcc.target/i386/max-stack-align.c
+index fa80508..9f37a63 100644
+--- a/gcc/testsuite/gcc.target/i386/max-stack-align.c
++++ b/gcc/testsuite/gcc.target/i386/max-stack-align.c
+@@ -1,6 +1,5 @@
+-/* { dg-do compile } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-fomit-frame-pointer" } */
+-/* { dg-require-effective-target lp64 } */
+ 
+ void foo()
+ {
+diff --git a/gcc/testsuite/gcc.target/i386/memcpy-1.c b/gcc/testsuite/gcc.target/i386/memcpy-1.c
+index 51797e18..bc6f95a 100644
+--- a/gcc/testsuite/gcc.target/i386/memcpy-1.c
++++ b/gcc/testsuite/gcc.target/i386/memcpy-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -march=pentiumpro -minline-all-stringops" } */
+ /* { dg-final { scan-assembler "rep" } } */
+ /* { dg-final { scan-assembler "movs" } } */
+diff --git a/gcc/testsuite/gcc.target/i386/movbe-2.c b/gcc/testsuite/gcc.target/i386/movbe-2.c
+index d898f20..b322f77 100644
+--- a/gcc/testsuite/gcc.target/i386/movbe-2.c
++++ b/gcc/testsuite/gcc.target/i386/movbe-2.c
+@@ -15,5 +15,5 @@ bar ()
+   return __builtin_bswap64 (x);
+ }
+ 
+-/* { dg-final { scan-assembler-times "movbe\[ \t\]" 4 { target ilp32 } } } */
+-/* { dg-final { scan-assembler-times "movbe\[ \t\]" 2 { target lp64 } } } */
++/* { dg-final { scan-assembler-times "movbe\[ \t\]" 4 { target ia32 } } } */
++/* { dg-final { scan-assembler-times "movbe\[ \t\]" 2 { target { ! { ia32 } } } } } */
+diff --git a/gcc/testsuite/gcc.target/i386/movq-2.c b/gcc/testsuite/gcc.target/i386/movq-2.c
+index 4a1accb..37194b8 100644
+--- a/gcc/testsuite/gcc.target/i386/movq-2.c
++++ b/gcc/testsuite/gcc.target/i386/movq-2.c
+@@ -1,7 +1,7 @@
+ /* PR target/25199 */
+ /* { dg-do compile } */
+ /* { dg-options "-Os -mtune=pentium4" } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ 
+ struct S
+ {
+diff --git a/gcc/testsuite/gcc.target/i386/movq.c b/gcc/testsuite/gcc.target/i386/movq.c
+index ac0dfa2..53cb421 100644
+--- a/gcc/testsuite/gcc.target/i386/movq.c
++++ b/gcc/testsuite/gcc.target/i386/movq.c
+@@ -1,6 +1,6 @@
+ /* { dg-do compile }
+ /* { dg-options "-Os -march=pentium4 -mtune=prescott" } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ 
+ register char foo asm("edi");
+ char x;
+diff --git a/gcc/testsuite/gcc.target/i386/nrv1.c b/gcc/testsuite/gcc.target/i386/nrv1.c
+index 5cd8b06..a028236 100644
+--- a/gcc/testsuite/gcc.target/i386/nrv1.c
++++ b/gcc/testsuite/gcc.target/i386/nrv1.c
+@@ -1,7 +1,7 @@
+ /* Verify that gimple-level NRV is occurring even for SSA_NAMEs.  *./
+ /* { dg-do compile } */
+ /* { dg-options "-O -fdump-tree-optimized" } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ 
+ _Complex double foo (_Complex double x)
+ {
+diff --git a/gcc/testsuite/gcc.target/i386/pad-4.c b/gcc/testsuite/gcc.target/i386/pad-4.c
+index ad6b029..91bf0db 100644
+--- a/gcc/testsuite/gcc.target/i386/pad-4.c
++++ b/gcc/testsuite/gcc.target/i386/pad-4.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-require-effective-target fpic } */
+ /* { dg-options "-O2 -fomit-frame-pointer -march=atom -fPIC" } */
+ /* { dg-final { scan-assembler-times "nop" 8 } } */
+diff --git a/gcc/testsuite/gcc.target/i386/pad-5a.c b/gcc/testsuite/gcc.target/i386/pad-5a.c
+index d29e628..7aa04db 100644
+--- a/gcc/testsuite/gcc.target/i386/pad-5a.c
++++ b/gcc/testsuite/gcc.target/i386/pad-5a.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -fomit-frame-pointer -march=atom" } */
+ /* { dg-final { scan-assembler-times "nop" 2 } } */
+ /* { dg-final { scan-assembler-not "rep" } } */
+diff --git a/gcc/testsuite/gcc.target/i386/pad-5b.c b/gcc/testsuite/gcc.target/i386/pad-5b.c
+index 1d95bf3..e4bb861 100644
+--- a/gcc/testsuite/gcc.target/i386/pad-5b.c
++++ b/gcc/testsuite/gcc.target/i386/pad-5b.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -fomit-frame-pointer -march=atom" } */
+ /* { dg-final { scan-assembler-times "nop" 4 } } */
+ /* { dg-final { scan-assembler-not "rep" } } */
+diff --git a/gcc/testsuite/gcc.target/i386/pad-6a.c b/gcc/testsuite/gcc.target/i386/pad-6a.c
+index e2db5ad..532e38f 100644
+--- a/gcc/testsuite/gcc.target/i386/pad-6a.c
++++ b/gcc/testsuite/gcc.target/i386/pad-6a.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -fomit-frame-pointer -march=atom" } */
+ /* { dg-final { scan-assembler-times "nop" 4 } } */
+ /* { dg-final { scan-assembler-not "rep" } } */
+diff --git a/gcc/testsuite/gcc.target/i386/pad-6b.c b/gcc/testsuite/gcc.target/i386/pad-6b.c
+index d8f9bec..5cb64ff 100644
+--- a/gcc/testsuite/gcc.target/i386/pad-6b.c
++++ b/gcc/testsuite/gcc.target/i386/pad-6b.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -fomit-frame-pointer -march=atom" } */
+ /* { dg-final { scan-assembler-times "nop" 6 } } */
+ /* { dg-final { scan-assembler-not "rep" } } */
+diff --git a/gcc/testsuite/gcc.target/i386/pad-7.c b/gcc/testsuite/gcc.target/i386/pad-7.c
+index 8904eca..65c18ff 100644
+--- a/gcc/testsuite/gcc.target/i386/pad-7.c
++++ b/gcc/testsuite/gcc.target/i386/pad-7.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -fomit-frame-pointer -march=atom" } */
+ /* { dg-final { scan-assembler-not "nop" } } */
+ /* { dg-final { scan-assembler-not "rep" } } */
+diff --git a/gcc/testsuite/gcc.target/i386/pad-9.c b/gcc/testsuite/gcc.target/i386/pad-9.c
+index 69e3344..dd6d3b3 100644
+--- a/gcc/testsuite/gcc.target/i386/pad-9.c
++++ b/gcc/testsuite/gcc.target/i386/pad-9.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -fomit-frame-pointer -march=atom" } */
+ /* { dg-final { scan-assembler-times "nop" 4 } } */
+ /* { dg-final { scan-assembler-not "rep" } } */
+diff --git a/gcc/testsuite/gcc.target/i386/pentium4-not-mull.c b/gcc/testsuite/gcc.target/i386/pentium4-not-mull.c
+index a846aae..c840c47 100644
+--- a/gcc/testsuite/gcc.target/i386/pentium4-not-mull.c
++++ b/gcc/testsuite/gcc.target/i386/pentium4-not-mull.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-skip-if "" { i?86-*-* x86_64-*-* } { "-march=*" } { "-march=pentium4" } } */
+ /* { dg-options "-O2 -march=pentium4" } */
+ /* { dg-final { scan-assembler-not "imull" } } */
+diff --git a/gcc/testsuite/gcc.target/i386/pic-1.c b/gcc/testsuite/gcc.target/i386/pic-1.c
+index bdf6267..af2424b 100644
+--- a/gcc/testsuite/gcc.target/i386/pic-1.c
++++ b/gcc/testsuite/gcc.target/i386/pic-1.c
+@@ -1,6 +1,6 @@
+ /* PR target/8340 */
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-require-effective-target fpic } */
+ /* { dg-skip-if "No Windows PIC" { *-*-mingw* *-*-cygwin } { "*" } { "" } } */
+ /* { dg-options "-fPIC" } */
+diff --git a/gcc/testsuite/gcc.target/i386/pr12092-1.c b/gcc/testsuite/gcc.target/i386/pr12092-1.c
+index d85807e..c230c84 100644
+--- a/gcc/testsuite/gcc.target/i386/pr12092-1.c
++++ b/gcc/testsuite/gcc.target/i386/pr12092-1.c
+@@ -1,7 +1,7 @@
+ /* PR rtl-optimization/12092  */
+ /* Test case reduced by Andrew Pinski <pinskia@physics.uc.edu> */
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -mtune=i486 -march=pentium4 -fprefetch-loop-arrays" } */
+ 
+ void DecodeAC(int index,int *matrix)
+diff --git a/gcc/testsuite/gcc.target/i386/pr12329.c b/gcc/testsuite/gcc.target/i386/pr12329.c
+index 601480c..e7b43a7 100644
+--- a/gcc/testsuite/gcc.target/i386/pr12329.c
++++ b/gcc/testsuite/gcc.target/i386/pr12329.c
+@@ -1,5 +1,5 @@
+ /* { dg-do run } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2" } */
+ 
+ extern void abort (void);
+diff --git a/gcc/testsuite/gcc.target/i386/pr21518.c b/gcc/testsuite/gcc.target/i386/pr21518.c
+index b42d9c9..52cbed6 100644
+--- a/gcc/testsuite/gcc.target/i386/pr21518.c
++++ b/gcc/testsuite/gcc.target/i386/pr21518.c
+@@ -1,6 +1,6 @@
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fPIC -fno-tree-pre" } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-require-effective-target fpic } */
+ 
+ extern void __attribute__ ((regparm (3)))
+diff --git a/gcc/testsuite/gcc.target/i386/pr22362.c b/gcc/testsuite/gcc.target/i386/pr22362.c
+index a7c78b1..04d6b27 100644
+--- a/gcc/testsuite/gcc.target/i386/pr22362.c
++++ b/gcc/testsuite/gcc.target/i386/pr22362.c
+@@ -1,7 +1,7 @@
+ /* PR target/22362 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2" } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ 
+ register unsigned int reg0 __asm__ ("esi");
+ register unsigned int reg1 __asm__ ("edi");
+diff --git a/gcc/testsuite/gcc.target/i386/pr22585.c b/gcc/testsuite/gcc.target/i386/pr22585.c
+index 9ba2da5..e5f027c 100644
+--- a/gcc/testsuite/gcc.target/i386/pr22585.c
++++ b/gcc/testsuite/gcc.target/i386/pr22585.c
+@@ -2,7 +2,7 @@
+ /* Testcase reduced by Volker Reichelt */
+ /* { dg-do compile } */
+ /* { dg-options "-march=i386 -O -ffast-math" } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ 
+ int
+ foo (long double d, int i)
+diff --git a/gcc/testsuite/gcc.target/i386/pr23098.c b/gcc/testsuite/gcc.target/i386/pr23098.c
+index d91bf2a..66ab0e1 100644
+--- a/gcc/testsuite/gcc.target/i386/pr23098.c
++++ b/gcc/testsuite/gcc.target/i386/pr23098.c
+@@ -2,7 +2,7 @@
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fPIC" } */
+ /* { dg-final { scan-assembler-not "\.LC\[0-9\]" { xfail *-*-vxworks* } } } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-require-effective-target fpic } */
+ 
+ double foo (float);
+diff --git a/gcc/testsuite/gcc.target/i386/pr25196.c b/gcc/testsuite/gcc.target/i386/pr25196.c
+index c3b69b8..6ebdee1 100644
+--- a/gcc/testsuite/gcc.target/i386/pr25196.c
++++ b/gcc/testsuite/gcc.target/i386/pr25196.c
+@@ -1,5 +1,5 @@
+ /* { dg-do run } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-march=i386 -O3 -fomit-frame-pointer" } */
+ 
+ /* For this test case, we used to do an invalid load motion after
+diff --git a/gcc/testsuite/gcc.target/i386/pr25293.c b/gcc/testsuite/gcc.target/i386/pr25293.c
+index 6217da2..94923ab 100644
+--- a/gcc/testsuite/gcc.target/i386/pr25293.c
++++ b/gcc/testsuite/gcc.target/i386/pr25293.c
+@@ -1,7 +1,7 @@
+ /* PR target/25293 */
+ /* { dg-do compile } */
+ /* { dg-options "-mpreferred-stack-boundary=2 -mtune=i586 -O2 -fomit-frame-pointer -g" } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ 
+ struct T { unsigned short t1, t2, t3, t4, t5, t6, t7; };
+ struct S { struct T s1; unsigned short s2, s3; };
+diff --git a/gcc/testsuite/gcc.target/i386/pr25654.c b/gcc/testsuite/gcc.target/i386/pr25654.c
+index 2d7ef22..d53a297 100644
+--- a/gcc/testsuite/gcc.target/i386/pr25654.c
++++ b/gcc/testsuite/gcc.target/i386/pr25654.c
+@@ -1,5 +1,5 @@
+ /* { dg-do run } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -mpreferred-stack-boundary=2 -march=i686 -frename-registers" } */
+ 
+ extern void abort (void) __attribute__((noreturn));
+diff --git a/gcc/testsuite/gcc.target/i386/pr26449.c b/gcc/testsuite/gcc.target/i386/pr26449.c
+index 7a61296..4a976ff 100644
+--- a/gcc/testsuite/gcc.target/i386/pr26449.c
++++ b/gcc/testsuite/gcc.target/i386/pr26449.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O1 -ftree-vectorize -march=pentium4 -std=c99" } */
+ 
+ void matmul_i4 (int bbase_yn, int xcount)
+diff --git a/gcc/testsuite/gcc.target/i386/pr26778.c b/gcc/testsuite/gcc.target/i386/pr26778.c
+index 6f6f277..f871b5d 100644
+--- a/gcc/testsuite/gcc.target/i386/pr26778.c
++++ b/gcc/testsuite/gcc.target/i386/pr26778.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -march=pentium3" } */
+ 
+ typedef union {
+diff --git a/gcc/testsuite/gcc.target/i386/pr26826.c b/gcc/testsuite/gcc.target/i386/pr26826.c
+index 8adab3a..062e173 100644
+--- a/gcc/testsuite/gcc.target/i386/pr26826.c
++++ b/gcc/testsuite/gcc.target/i386/pr26826.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O -fomit-frame-pointer -march=i586" } */
+ 
+ void foo(char* p, char c, int i)
+diff --git a/gcc/testsuite/gcc.target/i386/pr27266.c b/gcc/testsuite/gcc.target/i386/pr27266.c
+index 73e7c59..8735780 100644
+--- a/gcc/testsuite/gcc.target/i386/pr27266.c
++++ b/gcc/testsuite/gcc.target/i386/pr27266.c
+@@ -2,7 +2,7 @@
+    The testcase below used to trigger an ICE.  */
+ 
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-march=pentium" } */
+ 
+ signed long long sll;
+diff --git a/gcc/testsuite/gcc.target/i386/pr29978.c b/gcc/testsuite/gcc.target/i386/pr29978.c
+index 8c0bf9f..e27bbdc 100644
+--- a/gcc/testsuite/gcc.target/i386/pr29978.c
++++ b/gcc/testsuite/gcc.target/i386/pr29978.c
+@@ -13,4 +13,4 @@ f (long long v)
+ }
+ 
+ /* Verify there are no redundant jumps jl .L2; jle .L2 */
+-/* { dg-final { scan-assembler-not "jl\[^e\]*\\.L" { target ilp32 } } } */
++/* { dg-final { scan-assembler-not "jl\[^e\]*\\.L" { target ia32 } } } */
+diff --git a/gcc/testsuite/gcc.target/i386/pr30505.c b/gcc/testsuite/gcc.target/i386/pr30505.c
+index 9f8fc42..3cebbe6 100644
+--- a/gcc/testsuite/gcc.target/i386/pr30505.c
++++ b/gcc/testsuite/gcc.target/i386/pr30505.c
+@@ -1,6 +1,6 @@
+ /* PR inline-asm/30505 */
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2" } */
+ 
+ unsigned long long a, c;
+diff --git a/gcc/testsuite/gcc.target/i386/pr30961-1.c b/gcc/testsuite/gcc.target/i386/pr30961-1.c
+index c225943..c7c5e53 100644
+--- a/gcc/testsuite/gcc.target/i386/pr30961-1.c
++++ b/gcc/testsuite/gcc.target/i386/pr30961-1.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2" } */
+ 
+ double
+diff --git a/gcc/testsuite/gcc.target/i386/pr31628.c b/gcc/testsuite/gcc.target/i386/pr31628.c
+index 121d9c6..eece2a0 100644
+--- a/gcc/testsuite/gcc.target/i386/pr31628.c
++++ b/gcc/testsuite/gcc.target/i386/pr31628.c
+@@ -1,6 +1,6 @@
+ /* { dg-do run } */
+ /* { dg-options "-O2 -fPIC" } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-require-effective-target fpic } */
+ 
+ typedef int tt, *lptt;
+diff --git a/gcc/testsuite/gcc.target/i386/pr32000-2.c b/gcc/testsuite/gcc.target/i386/pr32000-2.c
+index 6f10560..374b23f 100644
+--- a/gcc/testsuite/gcc.target/i386/pr32000-2.c
++++ b/gcc/testsuite/gcc.target/i386/pr32000-2.c
+@@ -1,5 +1,5 @@
+ /* { dg-do run } */
+-/* { dg-skip-if "" { ! { ilp32 && dfp } } { "*" } { "" } } */
++/* { dg-skip-if "" { ! { ia32 && dfp } } { "*" } { "" } } */
+ /* { dg-options "-O -msse2 -std=gnu99 -mpreferred-stack-boundary=2" } */
+ /* { dg-require-effective-target sse2 } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/pr32661-1.c b/gcc/testsuite/gcc.target/i386/pr32661-1.c
+index 9411c28..39cd8f9 100644
+--- a/gcc/testsuite/gcc.target/i386/pr32661-1.c
++++ b/gcc/testsuite/gcc.target/i386/pr32661-1.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -fomit-frame-pointer" } */
+ 
+ typedef long long __m128i __attribute__ ((__vector_size__ (16)));
+diff --git a/gcc/testsuite/gcc.target/i386/pr32708-2.c b/gcc/testsuite/gcc.target/i386/pr32708-2.c
+index dc31c42..f28caf9 100644
+--- a/gcc/testsuite/gcc.target/i386/pr32708-2.c
++++ b/gcc/testsuite/gcc.target/i386/pr32708-2.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mtune=k8" } */
+ 
+ typedef long long __v2di __attribute__ ((__vector_size__ (16)));
+diff --git a/gcc/testsuite/gcc.target/i386/pr32708-3.c b/gcc/testsuite/gcc.target/i386/pr32708-3.c
+index dae9a52..77e50b2 100644
+--- a/gcc/testsuite/gcc.target/i386/pr32708-3.c
++++ b/gcc/testsuite/gcc.target/i386/pr32708-3.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mtune=core2" } */
+ 
+ typedef long long __v2di __attribute__ ((__vector_size__ (16)));
+diff --git a/gcc/testsuite/gcc.target/i386/pr34256.c b/gcc/testsuite/gcc.target/i386/pr34256.c
+index e207ece..4ce7e30 100644
+--- a/gcc/testsuite/gcc.target/i386/pr34256.c
++++ b/gcc/testsuite/gcc.target/i386/pr34256.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -fomit-frame-pointer -march=core2" } */
+ 
+ #include <mmintrin.h>
+diff --git a/gcc/testsuite/gcc.target/i386/pr34312.c b/gcc/testsuite/gcc.target/i386/pr34312.c
+index 846c285..876ac40 100644
+--- a/gcc/testsuite/gcc.target/i386/pr34312.c
++++ b/gcc/testsuite/gcc.target/i386/pr34312.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-require-effective-target fpic } */
+ /* { dg-options "-O2 -march=pentium-m -fpic" } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/pr34522.c b/gcc/testsuite/gcc.target/i386/pr34522.c
+index c79745b..eb1e03a 100644
+--- a/gcc/testsuite/gcc.target/i386/pr34522.c
++++ b/gcc/testsuite/gcc.target/i386/pr34522.c
+@@ -1,6 +1,6 @@
+ /* { dg-options "-O2" } */
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ 
+ int test(long long a, long long b)
+ {
+diff --git a/gcc/testsuite/gcc.target/i386/pr35160.c b/gcc/testsuite/gcc.target/i386/pr35160.c
+index 12394ec..259c2a3 100644
+--- a/gcc/testsuite/gcc.target/i386/pr35160.c
++++ b/gcc/testsuite/gcc.target/i386/pr35160.c
+@@ -1,6 +1,6 @@
+ /* PR inline-asm/35160 */
+ /* { dg-do run } */
+-/* { dg-skip-if "" { ilp32 && { ! nonpic } } { "*" } { "" } } */
++/* { dg-skip-if "" { ia32 && { ! nonpic } } { "*" } { "" } } */
+ /* { dg-options "-O2" } */
+ 
+ extern void abort (void);
+diff --git a/gcc/testsuite/gcc.target/i386/pr35281.c b/gcc/testsuite/gcc.target/i386/pr35281.c
+index 70e93cb..efd5c3d 100644
+--- a/gcc/testsuite/gcc.target/i386/pr35281.c
++++ b/gcc/testsuite/gcc.target/i386/pr35281.c
+@@ -1,6 +1,6 @@
+ /* { dg-options "-O2" } */
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ 
+ unsigned long long a;
+ unsigned int b;
+diff --git a/gcc/testsuite/gcc.target/i386/pr36246.c b/gcc/testsuite/gcc.target/i386/pr36246.c
+index 4f3e155..51b8c34 100644
+--- a/gcc/testsuite/gcc.target/i386/pr36246.c
++++ b/gcc/testsuite/gcc.target/i386/pr36246.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -fomit-frame-pointer -mtune=generic" } */
+ 
+ typedef long long __m128i __attribute__ ((__vector_size__ (16), __may_alias__));
+diff --git a/gcc/testsuite/gcc.target/i386/pr36786.c b/gcc/testsuite/gcc.target/i386/pr36786.c
+index 692518e..6b62e80 100644
+--- a/gcc/testsuite/gcc.target/i386/pr36786.c
++++ b/gcc/testsuite/gcc.target/i386/pr36786.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ 
+ typedef int DItype __attribute__ ((mode (DI)));
+ typedef unsigned int UDItype __attribute__ ((mode (DI)));
+diff --git a/gcc/testsuite/gcc.target/i386/pr37275.c b/gcc/testsuite/gcc.target/i386/pr37275.c
+index 070dab5..cf74887 100644
+--- a/gcc/testsuite/gcc.target/i386/pr37275.c
++++ b/gcc/testsuite/gcc.target/i386/pr37275.c
+@@ -1,5 +1,5 @@
+ /* PR middle-end/37275 */
+-/* { dg-do compile { target ilp32 } } */
++/* { dg-do compile { target ia32 } } */
+ /* { dg-options "-g -dA -O2 -march=i686 -fstack-protector" } */
+ /* { dg-require-visibility "" } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/pr37843-3.c b/gcc/testsuite/gcc.target/i386/pr37843-3.c
+index ed6478e..56f1170 100644
+--- a/gcc/testsuite/gcc.target/i386/pr37843-3.c
++++ b/gcc/testsuite/gcc.target/i386/pr37843-3.c
+@@ -1,5 +1,5 @@
+ /* Test for stack alignment with sibcall optimization.  */
+-/* { dg-do compile { target { ilp32 && nonpic } } } */
++/* { dg-do compile { target { ia32 && nonpic } } } */
+ /* { dg-options "-O2 -msse2 -mpreferred-stack-boundary=4 -mstackrealign" } */
+ /* { dg-require-effective-target sse2 } */
+ /* { dg-final { scan-assembler-not "andl\[\\t \]*\\$-16,\[\\t \]*%\[re\]?sp" } } */
+diff --git a/gcc/testsuite/gcc.target/i386/pr37843-4.c b/gcc/testsuite/gcc.target/i386/pr37843-4.c
+index f5e024c..f70692f 100644
+--- a/gcc/testsuite/gcc.target/i386/pr37843-4.c
++++ b/gcc/testsuite/gcc.target/i386/pr37843-4.c
+@@ -1,5 +1,5 @@
+ /* Test for stack alignment with sibcall optimization.  */
+-/* { dg-do compile { target { ilp32 && nonpic } } } */
++/* { dg-do compile { target { ia32 && nonpic } } } */
+ /* { dg-options "-O2 -msse2 -mpreferred-stack-boundary=4 -mstackrealign" } */
+ /* { dg-require-effective-target sse2 } */
+ /* { dg-final { scan-assembler-not "andl\[\\t \]*\\$-16,\[\\t \]*%\[re\]?sp" } } */
+diff --git a/gcc/testsuite/gcc.target/i386/pr39082-1.c b/gcc/testsuite/gcc.target/i386/pr39082-1.c
+index 0a788d1..f2a1fdf 100644
+--- a/gcc/testsuite/gcc.target/i386/pr39082-1.c
++++ b/gcc/testsuite/gcc.target/i386/pr39082-1.c
+@@ -1,6 +1,5 @@
+ /* PR target/39082 */
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2" } */
+ 
+ union un
+diff --git a/gcc/testsuite/gcc.target/i386/pr39431.c b/gcc/testsuite/gcc.target/i386/pr39431.c
+index 756bdb9..0db7d56 100644
+--- a/gcc/testsuite/gcc.target/i386/pr39431.c
++++ b/gcc/testsuite/gcc.target/i386/pr39431.c
+@@ -1,7 +1,7 @@
+ /* PR target/39431 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2" } */
+-/* { dg-options "-O2 -march=i686 -fpic" { target { ilp32 && fpic } } } */
++/* { dg-options "-O2 -march=i686 -fpic" { target { ia32 && fpic } } } */
+ 
+ extern void bar (char *, int);
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/pr39496.c b/gcc/testsuite/gcc.target/i386/pr39496.c
+index e4132a1..e14c875 100644
+--- a/gcc/testsuite/gcc.target/i386/pr39496.c
++++ b/gcc/testsuite/gcc.target/i386/pr39496.c
+@@ -1,5 +1,5 @@
+ /* PR target/39496 */
+-/* { dg-do compile { target { { i?86-*-linux* x86_64-*-linux* } && ilp32 } } } */
++/* { dg-do compile { target { { i?86-*-linux* x86_64-*-linux* } && ia32 } } } */
+ /* { dg-options "-O0 -fverbose-asm -fno-omit-frame-pointer -mtune=i686 -msse2 -mfpmath=sse" } */
+ /* Verify that {foo,bar}{,2}param are all passed on the stack, using
+    normal calling conventions, when not optimizing.  */
+diff --git a/gcc/testsuite/gcc.target/i386/pr39543-2.c b/gcc/testsuite/gcc.target/i386/pr39543-2.c
+index 04e980e..7f4e5a4 100644
+--- a/gcc/testsuite/gcc.target/i386/pr39543-2.c
++++ b/gcc/testsuite/gcc.target/i386/pr39543-2.c
+@@ -1,7 +1,7 @@
+ /* PR inline-asm/39543 */
+ /* { dg-do compile } */
+ /* { dg-options "-O3" } */
+-/* { dg-skip-if "" { ilp32 && { ! nonpic } } { "*" } { "" } } */
++/* { dg-skip-if "" { ia32 && { ! nonpic } } { "*" } { "" } } */
+ 
+ float __attribute__ ((aligned (16))) s0[128];
+ const float s1 = 0.707;
+diff --git a/gcc/testsuite/gcc.target/i386/pr39911.c b/gcc/testsuite/gcc.target/i386/pr39911.c
+index fe63ff0..8a78c0a 100644
+--- a/gcc/testsuite/gcc.target/i386/pr39911.c
++++ b/gcc/testsuite/gcc.target/i386/pr39911.c
+@@ -33,11 +33,13 @@ bar3 ()
+   asm volatile ("mov%z0 %1, %0": "=r" (foo): "ir" (-23));
+   asm volatile ("add%z0 %1, %0": "+r" (foo): "ir" (23));
+ 
++#ifndef __x86_64__
+   if (sizeof (void *) == sizeof (int))
+     {
+       asm volatile ("pop%z0 %0": "=m" (foo));
+       asm volatile ("pop%z0 %0": "=r" (foo));
+     }
++#endif
+ }
+ 
+ void
+diff --git a/gcc/testsuite/gcc.target/i386/pr40718.c b/gcc/testsuite/gcc.target/i386/pr40718.c
+index f6029ed..1df3548 100644
+--- a/gcc/testsuite/gcc.target/i386/pr40718.c
++++ b/gcc/testsuite/gcc.target/i386/pr40718.c
+@@ -1,5 +1,5 @@
+ /* { dg-do run } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O1 -foptimize-sibling-calls" } */
+ 
+ void abort (void);
+diff --git a/gcc/testsuite/gcc.target/i386/pr40906-1.c b/gcc/testsuite/gcc.target/i386/pr40906-1.c
+index 77e7c9b..e1c3771 100644
+--- a/gcc/testsuite/gcc.target/i386/pr40906-1.c
++++ b/gcc/testsuite/gcc.target/i386/pr40906-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do run } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -fomit-frame-pointer -fno-asynchronous-unwind-tables -mpush-args -mno-accumulate-outgoing-args" } */
+ 
+ void abort (void);
+diff --git a/gcc/testsuite/gcc.target/i386/pr40906-2.c b/gcc/testsuite/gcc.target/i386/pr40906-2.c
+index f0eda00..5a7bd6c 100644
+--- a/gcc/testsuite/gcc.target/i386/pr40906-2.c
++++ b/gcc/testsuite/gcc.target/i386/pr40906-2.c
+@@ -1,5 +1,5 @@
+ /* { dg-do run } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -Wno-psabi -fomit-frame-pointer -fno-asynchronous-unwind-tables -mpush-args -mno-accumulate-outgoing-args -m128bit-long-double" } */
+ 
+ void abort (void);
+diff --git a/gcc/testsuite/gcc.target/i386/pr40906-3.c b/gcc/testsuite/gcc.target/i386/pr40906-3.c
+index d83833f..ac7d183 100644
+--- a/gcc/testsuite/gcc.target/i386/pr40906-3.c
++++ b/gcc/testsuite/gcc.target/i386/pr40906-3.c
+@@ -1,5 +1,5 @@
+ /* { dg-do run { target *-*-linux* } } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-require-effective-target sse2 } */
+ /* { dg-options "-O2 -fomit-frame-pointer -fno-asynchronous-unwind-tables -msse2 -mpush-args -mno-accumulate-outgoing-args" } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/pr40934.c b/gcc/testsuite/gcc.target/i386/pr40934.c
+index 41f46f8..6511722 100644
+--- a/gcc/testsuite/gcc.target/i386/pr40934.c
++++ b/gcc/testsuite/gcc.target/i386/pr40934.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -march=i586 -ffast-math" } */
+ 
+ extern double host_frametime;
+diff --git a/gcc/testsuite/gcc.target/i386/pr41900.c b/gcc/testsuite/gcc.target/i386/pr41900.c
+index 55f712d..a23214c 100644
+--- a/gcc/testsuite/gcc.target/i386/pr41900.c
++++ b/gcc/testsuite/gcc.target/i386/pr41900.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -fomit-frame-pointer -mpreferred-stack-boundary=2" } */
+ 
+ int main ()
+diff --git a/gcc/testsuite/gcc.target/i386/pr42589.c b/gcc/testsuite/gcc.target/i386/pr42589.c
+index 1366ef5..863372b 100644
+--- a/gcc/testsuite/gcc.target/i386/pr42589.c
++++ b/gcc/testsuite/gcc.target/i386/pr42589.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-skip-if "" { i?86-*-* x86_64-*-* } { "-march=*" } { "-march=i486" } } */
+ /* { dg-options "-O2 -march=i486" } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/pr43662.c b/gcc/testsuite/gcc.target/i386/pr43662.c
+index 246c8aa..2896a1a 100644
+--- a/gcc/testsuite/gcc.target/i386/pr43662.c
++++ b/gcc/testsuite/gcc.target/i386/pr43662.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target lp64 } } */
+ /* { dg-options "-O2" } */
+ 
+ void __attribute__ ((ms_abi)) foo (void)
+diff --git a/gcc/testsuite/gcc.target/i386/pr43671.c b/gcc/testsuite/gcc.target/i386/pr43671.c
+index 958eaff..388cd65 100644
+--- a/gcc/testsuite/gcc.target/i386/pr43671.c
++++ b/gcc/testsuite/gcc.target/i386/pr43671.c
+@@ -1,5 +1,5 @@
+ /* { dg-do run } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-mtune=i686 -O1 -fpeel-loops -fschedule-insns2 -ftree-vectorize -fsched2-use-superblocks" } */
+ 
+ extern void abort ();
+diff --git a/gcc/testsuite/gcc.target/i386/pr43766.c b/gcc/testsuite/gcc.target/i386/pr43766.c
+index 731b780..8ac1613 100644
+--- a/gcc/testsuite/gcc.target/i386/pr43766.c
++++ b/gcc/testsuite/gcc.target/i386/pr43766.c
+@@ -1,6 +1,6 @@
+ /* { dg-do compile } */
+ /* { dg-options "-O2" } */
+-/* { dg-options "-O2 -msse -mregparm=3" { target ilp32 } } */
++/* { dg-options "-O2 -msse -mregparm=3" { target ia32 } } */
+ 
+ void p (int *a, int i)
+ {
+diff --git a/gcc/testsuite/gcc.target/i386/pr43869.c b/gcc/testsuite/gcc.target/i386/pr43869.c
+index fdc6461..4157db1 100644
+--- a/gcc/testsuite/gcc.target/i386/pr43869.c
++++ b/gcc/testsuite/gcc.target/i386/pr43869.c
+@@ -1,5 +1,4 @@
+-/* { dg-do run } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target lp64 } } */
+ 
+ int __attribute__((__noinline__))
+ bugged(float f1, float f2, float f3, float f4,
+diff --git a/gcc/testsuite/gcc.target/i386/pr44942.c b/gcc/testsuite/gcc.target/i386/pr44942.c
+index 4664f7e..d816484 100644
+--- a/gcc/testsuite/gcc.target/i386/pr44942.c
++++ b/gcc/testsuite/gcc.target/i386/pr44942.c
+@@ -1,5 +1,5 @@
+ /* PR target/44942 */
+-/* { dg-do run { target lp64 } } */
++/* { dg-do run { target { ! { ia32 } } } } */
+ 
+ #include <stdarg.h>
+ #include <emmintrin.h>
+diff --git a/gcc/testsuite/gcc.target/i386/pr44948-2a.c b/gcc/testsuite/gcc.target/i386/pr44948-2a.c
+index 120346e..d84d1a6 100644
+--- a/gcc/testsuite/gcc.target/i386/pr44948-2a.c
++++ b/gcc/testsuite/gcc.target/i386/pr44948-2a.c
+@@ -1,7 +1,7 @@
+ /* PR target/44948 */
+ /* { dg-do run } */
+ /* { dg-options "-O -Wno-psabi -mno-sse -mtune=generic" } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-require-effective-target sse2_runtime } */
+ /* { dg-additional-sources pr44948-2b.c } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/pr45234.c b/gcc/testsuite/gcc.target/i386/pr45234.c
+index b11096b..3996fa2 100644
+--- a/gcc/testsuite/gcc.target/i386/pr45234.c
++++ b/gcc/testsuite/gcc.target/i386/pr45234.c
+@@ -1,6 +1,6 @@
+ /* PR middle-end/45234 */
+ /* { dg-do compile } */
+-/* { dg-options "-march=i586" { target ilp32 } } */
++/* { dg-options "-march=i586" { target ia32 } } */
+ 
+ struct S { union { double b[4]; } a[18]; } s, a[5];
+ void foo (struct S);
+diff --git a/gcc/testsuite/gcc.target/i386/pr45336-2.c b/gcc/testsuite/gcc.target/i386/pr45336-2.c
+index 8347002..45d93b7 100644
+--- a/gcc/testsuite/gcc.target/i386/pr45336-2.c
++++ b/gcc/testsuite/gcc.target/i386/pr45336-2.c
+@@ -1,6 +1,5 @@
+ /* PR target/45336 */
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -msse4 -mtune=generic" } */
+ /* { dg-final { scan-assembler-not "movsbl" } } */
+ /* { dg-final { scan-assembler-not "movswl" } } */
+diff --git a/gcc/testsuite/gcc.target/i386/pr45336-4.c b/gcc/testsuite/gcc.target/i386/pr45336-4.c
+index 00c9319..c9850e5 100644
+--- a/gcc/testsuite/gcc.target/i386/pr45336-4.c
++++ b/gcc/testsuite/gcc.target/i386/pr45336-4.c
+@@ -1,6 +1,5 @@
+ /* PR target/45336 */
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -msse4 -mtune=generic" } */
+ /* { dg-final { scan-assembler "movsbq" } } */
+ /* { dg-final { scan-assembler "movswq" } } */
+diff --git a/gcc/testsuite/gcc.target/i386/pr45852.c b/gcc/testsuite/gcc.target/i386/pr45852.c
+index b0ba093..8b7bbfb 100644
+--- a/gcc/testsuite/gcc.target/i386/pr45852.c
++++ b/gcc/testsuite/gcc.target/i386/pr45852.c
+@@ -1,6 +1,6 @@
+ /* PR middle-end/45852 */
+ /* { dg-options "-O2 -mcmodel=small" } */
+-/* { dg-do compile { target { { i?86-*-linux* x86_64-*-linux* } && lp64 } } } */
++/* { dg-do compile { target { { i?86-*-linux* x86_64-*-linux* } && { ! { ia32 } } } } } */
+ /* { dg-require-visibility "" } */
+ 
+ struct S { int s; };
+diff --git a/gcc/testsuite/gcc.target/i386/pr46470.c b/gcc/testsuite/gcc.target/i386/pr46470.c
+index 256b57f..4035d1a 100644
+--- a/gcc/testsuite/gcc.target/i386/pr46470.c
++++ b/gcc/testsuite/gcc.target/i386/pr46470.c
+@@ -1,11 +1,11 @@
+ /* { dg-do compile } */
+ /* The pic register save adds unavoidable stack pointer references.  */
+-/* { dg-skip-if "" { ilp32 && { ! nonpic } }  { "*" } { "" } } */
++/* { dg-skip-if "" { ia32 && { ! nonpic } }  { "*" } { "" } } */
+ /* These options are selected to ensure 1 word needs to be allocated
+    on the stack to maintain alignment for the call.  This should be
+    transformed to push+pop.  We also want to force unwind info updates.  */
+ /* { dg-options "-Os -fomit-frame-pointer -fasynchronous-unwind-tables" } */
+-/* { dg-options "-Os -fomit-frame-pointer -mpreferred-stack-boundary=3 -fasynchronous-unwind-tables" { target ilp32 } } */
++/* { dg-options "-Os -fomit-frame-pointer -mpreferred-stack-boundary=3 -fasynchronous-unwind-tables" { target ia32 } } */
+ 
+ void f();
+ void g() { f(); f(); }
+diff --git a/gcc/testsuite/gcc.target/i386/pr49920.c b/gcc/testsuite/gcc.target/i386/pr49920.c
+index 416e7a4..ef2a185 100644
+--- a/gcc/testsuite/gcc.target/i386/pr49920.c
++++ b/gcc/testsuite/gcc.target/i386/pr49920.c
+@@ -1,6 +1,6 @@
+ /* { dg-do compile } */
+ /* { dg-options "-O2" } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ 
+ typedef __SIZE_TYPE__ size_t;
+ extern void *malloc (size_t);
+diff --git a/gcc/testsuite/gcc.target/i386/pr50712.c b/gcc/testsuite/gcc.target/i386/pr50712.c
+index f08a944..90cc75d 100644
+--- a/gcc/testsuite/gcc.target/i386/pr50712.c
++++ b/gcc/testsuite/gcc.target/i386/pr50712.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2" } */
+ 
+ typedef __builtin_va_list __va_list;
+diff --git a/gcc/testsuite/gcc.target/i386/pr9771-1.c b/gcc/testsuite/gcc.target/i386/pr9771-1.c
+index 37ec490..38586fe 100644
+--- a/gcc/testsuite/gcc.target/i386/pr9771-1.c
++++ b/gcc/testsuite/gcc.target/i386/pr9771-1.c
+@@ -1,6 +1,6 @@
+ /* PR rtl-optimization/9771 */
+ /* { dg-do run } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -fomit-frame-pointer -ffixed-ebp" } */
+ 
+ extern void abort(void);
+diff --git a/gcc/testsuite/gcc.target/i386/rdfsbase-1.c b/gcc/testsuite/gcc.target/i386/rdfsbase-1.c
+index c4808e9..2ed33cd 100644
+--- a/gcc/testsuite/gcc.target/i386/rdfsbase-1.c
++++ b/gcc/testsuite/gcc.target/i386/rdfsbase-1.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mfsgsbase" } */
+ /* { dg-final { scan-assembler "rdfsbase\[ \t]+(%|)eax" } } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/rdfsbase-2.c b/gcc/testsuite/gcc.target/i386/rdfsbase-2.c
+index 40b8f4a..f319cea 100644
+--- a/gcc/testsuite/gcc.target/i386/rdfsbase-2.c
++++ b/gcc/testsuite/gcc.target/i386/rdfsbase-2.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mfsgsbase" } */
+ /* { dg-final { scan-assembler "rdfsbase\[ \t]+(%|)rax" } } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/rdgsbase-1.c b/gcc/testsuite/gcc.target/i386/rdgsbase-1.c
+index 1e5a302..cb2a3d5 100644
+--- a/gcc/testsuite/gcc.target/i386/rdgsbase-1.c
++++ b/gcc/testsuite/gcc.target/i386/rdgsbase-1.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mfsgsbase" } */
+ /* { dg-final { scan-assembler "rdgsbase\[ \t]+(%|)eax" } } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/rdgsbase-2.c b/gcc/testsuite/gcc.target/i386/rdgsbase-2.c
+index 1321582..d514cd9 100644
+--- a/gcc/testsuite/gcc.target/i386/rdgsbase-2.c
++++ b/gcc/testsuite/gcc.target/i386/rdgsbase-2.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mfsgsbase" } */
+ /* { dg-final { scan-assembler "rdgsbase\[ \t]+(%|)rax" } } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/rdrand-3.c b/gcc/testsuite/gcc.target/i386/rdrand-3.c
+index c494d3b..de0e730 100644
+--- a/gcc/testsuite/gcc.target/i386/rdrand-3.c
++++ b/gcc/testsuite/gcc.target/i386/rdrand-3.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mrdrnd -dp" } */
+ /* { dg-final { scan-assembler-times "rdranddi_1" 1 } } */
+ /* { dg-final { scan-assembler-times "\\*movsicc_noc" 1 } } */
+diff --git a/gcc/testsuite/gcc.target/i386/regparm-stdcall.c b/gcc/testsuite/gcc.target/i386/regparm-stdcall.c
+index 144f5f9..fbb3be5 100644
+--- a/gcc/testsuite/gcc.target/i386/regparm-stdcall.c
++++ b/gcc/testsuite/gcc.target/i386/regparm-stdcall.c
+@@ -1,6 +1,6 @@
+ /* { dg-do run } */
+ /* { dg-options -mpreferred-stack-boundary=4 } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ 
+ extern void abort(void);
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/regparm.c b/gcc/testsuite/gcc.target/i386/regparm.c
+index 9db191c..4cfd110 100644
+--- a/gcc/testsuite/gcc.target/i386/regparm.c
++++ b/gcc/testsuite/gcc.target/i386/regparm.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-W -Wall" } */
+ 
+ /* Verify that GCC correctly detects non-matching regparm attributes.  */
+diff --git a/gcc/testsuite/gcc.target/i386/reload-1.c b/gcc/testsuite/gcc.target/i386/reload-1.c
+index f8075ac..9c6cd32 100644
+--- a/gcc/testsuite/gcc.target/i386/reload-1.c
++++ b/gcc/testsuite/gcc.target/i386/reload-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O3 -msse2 -fdump-rtl-csa" } */
+ /* { dg-skip-if "no stdint" { vxworks_kernel } } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/rotate-2.c b/gcc/testsuite/gcc.target/i386/rotate-2.c
+index 69a0625..71fd7ed 100644
+--- a/gcc/testsuite/gcc.target/i386/rotate-2.c
++++ b/gcc/testsuite/gcc.target/i386/rotate-2.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2" } */
+ 
+ typedef unsigned int UTItype __attribute__ ((mode (TI)));
+diff --git a/gcc/testsuite/gcc.target/i386/sibcall-5.c b/gcc/testsuite/gcc.target/i386/sibcall-5.c
+index f4127b9..7cf67db 100644
+--- a/gcc/testsuite/gcc.target/i386/sibcall-5.c
++++ b/gcc/testsuite/gcc.target/i386/sibcall-5.c
+@@ -1,6 +1,6 @@
+ /* Check that indirect sibcalls understand regparm.  */
+ /* { dg-do run } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2" } */
+ 
+ extern void abort (void);
+diff --git a/gcc/testsuite/gcc.target/i386/signbit-1.c b/gcc/testsuite/gcc.target/i386/signbit-1.c
+index 745796d..3f31f5e 100644
+--- a/gcc/testsuite/gcc.target/i386/signbit-1.c
++++ b/gcc/testsuite/gcc.target/i386/signbit-1.c
+@@ -1,6 +1,6 @@
+ /* PR optimization/8746 */
+ /* { dg-do run } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O1 -mtune=i586" } */
+ 
+ extern void abort (void);
+diff --git a/gcc/testsuite/gcc.target/i386/signbit-2.c b/gcc/testsuite/gcc.target/i386/signbit-2.c
+index c09bba3..bc8e4f8 100644
+--- a/gcc/testsuite/gcc.target/i386/signbit-2.c
++++ b/gcc/testsuite/gcc.target/i386/signbit-2.c
+@@ -1,6 +1,6 @@
+ /* PR optimization/8746 */
+ /* { dg-do run } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O1 -mtune=i586" } */
+ 
+ extern void abort (void);
+diff --git a/gcc/testsuite/gcc.target/i386/signbit-3.c b/gcc/testsuite/gcc.target/i386/signbit-3.c
+index dcd56b6..8f1de51 100644
+--- a/gcc/testsuite/gcc.target/i386/signbit-3.c
++++ b/gcc/testsuite/gcc.target/i386/signbit-3.c
+@@ -1,6 +1,6 @@
+ /* PR optimization/8746 */
+ /* { dg-do run } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O1 -mtune=i586" } */
+ 
+ extern void abort (void);
+diff --git a/gcc/testsuite/gcc.target/i386/sse-5.c b/gcc/testsuite/gcc.target/i386/sse-5.c
+index 934fad5..6d84f17 100644
+--- a/gcc/testsuite/gcc.target/i386/sse-5.c
++++ b/gcc/testsuite/gcc.target/i386/sse-5.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-skip-if "" { i?86-*-* x86_64-*-* } { "-march=*" } { "-march=i386" } } */
+ /* { dg-options "-Winline -Wno-psabi -O2 -march=i386" } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/sse-8.c b/gcc/testsuite/gcc.target/i386/sse-8.c
+index b6cb5c8..31e8c32 100644
+--- a/gcc/testsuite/gcc.target/i386/sse-8.c
++++ b/gcc/testsuite/gcc.target/i386/sse-8.c
+@@ -2,7 +2,7 @@
+ /* Origin: <Pawe Sikora <pluto@ds14.agh.edu.pl> */
+ 
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-march=pentium3" } */
+ 
+ int main() 
+diff --git a/gcc/testsuite/gcc.target/i386/sse-cvtsi2ss-2.c b/gcc/testsuite/gcc.target/i386/sse-cvtsi2ss-2.c
+index 6abc4d5..76ce912 100644
+--- a/gcc/testsuite/gcc.target/i386/sse-cvtsi2ss-2.c
++++ b/gcc/testsuite/gcc.target/i386/sse-cvtsi2ss-2.c
+@@ -1,5 +1,4 @@
+-/* { dg-do run } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do run { target { ! { ia32 } } } } */
+ /* { dg-require-effective-target sse } */
+ /* { dg-options "-O2 -msse" } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/sse-cvtss2si-2.c b/gcc/testsuite/gcc.target/i386/sse-cvtss2si-2.c
+index 44a5faf..909c388 100644
+--- a/gcc/testsuite/gcc.target/i386/sse-cvtss2si-2.c
++++ b/gcc/testsuite/gcc.target/i386/sse-cvtss2si-2.c
+@@ -1,5 +1,4 @@
+-/* { dg-do run } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do run { target { ! { ia32 } } } } */
+ /* { dg-require-effective-target sse } */
+ /* { dg-options "-O2 -msse" } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/sse-cvttss2si-2.c b/gcc/testsuite/gcc.target/i386/sse-cvttss2si-2.c
+index eb85223..cbfdddd 100644
+--- a/gcc/testsuite/gcc.target/i386/sse-cvttss2si-2.c
++++ b/gcc/testsuite/gcc.target/i386/sse-cvttss2si-2.c
+@@ -1,5 +1,4 @@
+-/* { dg-do run } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do run { target { ! { ia32 } } } } */
+ /* { dg-require-effective-target sse } */
+ /* { dg-options "-O2 -msse" } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/sse2-cvtsd2si-2.c b/gcc/testsuite/gcc.target/i386/sse2-cvtsd2si-2.c
+index 908e82f..a79a258 100644
+--- a/gcc/testsuite/gcc.target/i386/sse2-cvtsd2si-2.c
++++ b/gcc/testsuite/gcc.target/i386/sse2-cvtsd2si-2.c
+@@ -1,5 +1,4 @@
+-/* { dg-do run } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do run { target { ! { ia32 } } } } */
+ /* { dg-require-effective-target sse2 } */
+ /* { dg-options "-O2 -msse2" } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/sse2-cvtsi2sd-2.c b/gcc/testsuite/gcc.target/i386/sse2-cvtsi2sd-2.c
+index 7035c4e..ee047ba 100644
+--- a/gcc/testsuite/gcc.target/i386/sse2-cvtsi2sd-2.c
++++ b/gcc/testsuite/gcc.target/i386/sse2-cvtsi2sd-2.c
+@@ -1,5 +1,4 @@
+-/* { dg-do run } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do run { target { ! { ia32 } } } } */
+ /* { dg-require-effective-target sse2 } */
+ /* { dg-options "-O2 -msse2" } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/sse2-cvttsd2si-2.c b/gcc/testsuite/gcc.target/i386/sse2-cvttsd2si-2.c
+index 0284a73..cd913a1 100644
+--- a/gcc/testsuite/gcc.target/i386/sse2-cvttsd2si-2.c
++++ b/gcc/testsuite/gcc.target/i386/sse2-cvttsd2si-2.c
+@@ -1,5 +1,4 @@
+-/* { dg-do run } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do run { target { ! { ia32 } } } } */
+ /* { dg-require-effective-target sse2 } */
+ /* { dg-options "-O2 -msse2" } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/sse2-init-v2di-2.c b/gcc/testsuite/gcc.target/i386/sse2-init-v2di-2.c
+index db1fbd0..65127a0 100644
+--- a/gcc/testsuite/gcc.target/i386/sse2-init-v2di-2.c
++++ b/gcc/testsuite/gcc.target/i386/sse2-init-v2di-2.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -msse4 -march=core2 -dp" } */
+ 
+ #include <emmintrin.h>
+diff --git a/gcc/testsuite/gcc.target/i386/sse2-movq-2.c b/gcc/testsuite/gcc.target/i386/sse2-movq-2.c
+index edf16f4..e1e9b14 100644
+--- a/gcc/testsuite/gcc.target/i386/sse2-movq-2.c
++++ b/gcc/testsuite/gcc.target/i386/sse2-movq-2.c
+@@ -1,5 +1,4 @@
+-/* { dg-do run } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-require-effective-target sse2 } */
+ /* { dg-options "-O2 -msse2" } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/sse2-movq-3.c b/gcc/testsuite/gcc.target/i386/sse2-movq-3.c
+index 571fd6d..0a17e3e 100644
+--- a/gcc/testsuite/gcc.target/i386/sse2-movq-3.c
++++ b/gcc/testsuite/gcc.target/i386/sse2-movq-3.c
+@@ -1,5 +1,4 @@
+-/* { dg-do run } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do run { target { ! { ia32 } } } } */
+ /* { dg-require-effective-target sse2 } */
+ /* { dg-options "-O2 -msse2" } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-insertps-3.c b/gcc/testsuite/gcc.target/i386/sse4_1-insertps-3.c
+index 75a8073..7c71664 100644
+--- a/gcc/testsuite/gcc.target/i386/sse4_1-insertps-3.c
++++ b/gcc/testsuite/gcc.target/i386/sse4_1-insertps-3.c
+@@ -1,4 +1,4 @@
+-/* { dg-do run { target ilp32 } } */
++/* { dg-do run { target ia32 } } */
+ /* { dg-require-effective-target sse4 } */
+ /* { dg-options "-O2 -msse4.1 -mtune=geode" } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pextrq.c b/gcc/testsuite/gcc.target/i386/sse4_1-pextrq.c
+index b90f4e2..112dd37 100644
+--- a/gcc/testsuite/gcc.target/i386/sse4_1-pextrq.c
++++ b/gcc/testsuite/gcc.target/i386/sse4_1-pextrq.c
+@@ -1,5 +1,4 @@
+-/* { dg-do run } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do run { target { ! { ia32 } } } } */
+ /* { dg-require-effective-target sse4 } */
+ /* { dg-options "-O2 -msse4.1" } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pinsrq.c b/gcc/testsuite/gcc.target/i386/sse4_1-pinsrq.c
+index 1640439..1ed0987 100644
+--- a/gcc/testsuite/gcc.target/i386/sse4_1-pinsrq.c
++++ b/gcc/testsuite/gcc.target/i386/sse4_1-pinsrq.c
+@@ -1,5 +1,4 @@
+-/* { dg-do run } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do run { target { ! { ia32 } } } } */
+ /* { dg-require-effective-target sse4 } */
+ /* { dg-options "-O2 -msse4.1" } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/sse4_2-crc32q.c b/gcc/testsuite/gcc.target/i386/sse4_2-crc32q.c
+index 8209e99..f1f75d9 100644
+--- a/gcc/testsuite/gcc.target/i386/sse4_2-crc32q.c
++++ b/gcc/testsuite/gcc.target/i386/sse4_2-crc32q.c
+@@ -1,5 +1,4 @@
+-/* { dg-do run } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do run { target { ! { ia32 } } } } */
+ /* { dg-require-effective-target sse4 } */
+ /* { dg-options "-O2 -msse4.2" } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/sse4_2-popcntq.c b/gcc/testsuite/gcc.target/i386/sse4_2-popcntq.c
+index aa4d8a9..47cdf35 100644
+--- a/gcc/testsuite/gcc.target/i386/sse4_2-popcntq.c
++++ b/gcc/testsuite/gcc.target/i386/sse4_2-popcntq.c
+@@ -1,5 +1,4 @@
+-/* { dg-do run } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do run { target { ! { ia32 } } } } */
+ /* { dg-require-effective-target sse4 } */
+ /* { dg-options "-O2 -msse4.2" } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/ssefn-1.c b/gcc/testsuite/gcc.target/i386/ssefn-1.c
+index bea6cb2..f7b3709 100644
+--- a/gcc/testsuite/gcc.target/i386/ssefn-1.c
++++ b/gcc/testsuite/gcc.target/i386/ssefn-1.c
+@@ -2,7 +2,7 @@
+    Written by Paolo Bonzini, 25 January 2005 */
+ 
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-final { scan-assembler "movss" } } */
+ /* { dg-final { scan-assembler "mulss" } } */
+ /* { dg-final { scan-assembler-not "movsd" } } */
+diff --git a/gcc/testsuite/gcc.target/i386/ssefn-2.c b/gcc/testsuite/gcc.target/i386/ssefn-2.c
+index 09b920e..2549855 100644
+--- a/gcc/testsuite/gcc.target/i386/ssefn-2.c
++++ b/gcc/testsuite/gcc.target/i386/ssefn-2.c
+@@ -2,7 +2,7 @@
+    Written by Paolo Bonzini, 25 January 2005 */
+ 
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-final { scan-assembler "movss" } } */
+ /* { dg-final { scan-assembler "mulss" } } */
+ /* { dg-final { scan-assembler "movsd" } } */
+diff --git a/gcc/testsuite/gcc.target/i386/sseregparm-1.c b/gcc/testsuite/gcc.target/i386/sseregparm-1.c
+index 9d426b8..63bad7e 100644
+--- a/gcc/testsuite/gcc.target/i386/sseregparm-1.c
++++ b/gcc/testsuite/gcc.target/i386/sseregparm-1.c
+@@ -1,6 +1,6 @@
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -msse" } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ 
+ float essef(float) __attribute__((sseregparm));
+ double essed(double) __attribute__((sseregparm));
+diff --git a/gcc/testsuite/gcc.target/i386/sseregparm-2.c b/gcc/testsuite/gcc.target/i386/sseregparm-2.c
+index cca98ca..b5e521a 100644
+--- a/gcc/testsuite/gcc.target/i386/sseregparm-2.c
++++ b/gcc/testsuite/gcc.target/i386/sseregparm-2.c
+@@ -1,6 +1,6 @@
+ /* { dg-do compile } */
+ /* { dg-options "-mno-sse" } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ 
+ float essef(float) __attribute__((sseregparm));
+ double essed(double) __attribute__((sseregparm));
+diff --git a/gcc/testsuite/gcc.target/i386/sseregparm-3.c b/gcc/testsuite/gcc.target/i386/sseregparm-3.c
+index 9ee82af..5c16f43 100644
+--- a/gcc/testsuite/gcc.target/i386/sseregparm-3.c
++++ b/gcc/testsuite/gcc.target/i386/sseregparm-3.c
+@@ -1,6 +1,6 @@
+ /* { dg-do compile } */
+ /* { dg-options "-msse2 -O2" } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ 
+ /* Make sure we know that mysinfp returns in %xmm0.  */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/sseregparm-4.c b/gcc/testsuite/gcc.target/i386/sseregparm-4.c
+index a29cf06..47d66e3 100644
+--- a/gcc/testsuite/gcc.target/i386/sseregparm-4.c
++++ b/gcc/testsuite/gcc.target/i386/sseregparm-4.c
+@@ -1,6 +1,6 @@
+ /* { dg-do compile } */
+ /* { dg-options "-msse2 -O2" } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ 
+ /* Make sure we know that mysinfp returns in %xmm0.  */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/sseregparm-5.c b/gcc/testsuite/gcc.target/i386/sseregparm-5.c
+index 7423722..d0f4757 100644
+--- a/gcc/testsuite/gcc.target/i386/sseregparm-5.c
++++ b/gcc/testsuite/gcc.target/i386/sseregparm-5.c
+@@ -1,6 +1,6 @@
+ /* { dg-do compile } */
+ /* { dg-options "-msse2 -O2" } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ 
+ /* Make sure we know that mysinfp returns in %xmm0.  */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/sseregparm-6.c b/gcc/testsuite/gcc.target/i386/sseregparm-6.c
+index 6203b6b..a4a8363 100644
+--- a/gcc/testsuite/gcc.target/i386/sseregparm-6.c
++++ b/gcc/testsuite/gcc.target/i386/sseregparm-6.c
+@@ -1,6 +1,6 @@
+ /* { dg-do compile } */
+ /* { dg-options "-msse2 -O2" } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ 
+ /* Make sure we know that mysinfp returns in %xmm0.  */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/sseregparm-7.c b/gcc/testsuite/gcc.target/i386/sseregparm-7.c
+index 61267df..54b2573 100644
+--- a/gcc/testsuite/gcc.target/i386/sseregparm-7.c
++++ b/gcc/testsuite/gcc.target/i386/sseregparm-7.c
+@@ -1,6 +1,6 @@
+ /* { dg-do compile } */
+ /* { dg-options "-msse2 -O2" } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ 
+ /* Make sure we know that mysinfp returns in %xmm0.  */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/sseregparm-8.c b/gcc/testsuite/gcc.target/i386/sseregparm-8.c
+index 3a9d345..a7068df 100644
+--- a/gcc/testsuite/gcc.target/i386/sseregparm-8.c
++++ b/gcc/testsuite/gcc.target/i386/sseregparm-8.c
+@@ -1,6 +1,6 @@
+ /* { dg-do compile } */
+ /* { dg-options "-mno-sse" } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ 
+ float essef(float) __attribute__((sseregparm));
+ double essed(double) __attribute__((sseregparm));
+diff --git a/gcc/testsuite/gcc.target/i386/stack-realign.c b/gcc/testsuite/gcc.target/i386/stack-realign.c
+index ab9360f..a454418 100644
+--- a/gcc/testsuite/gcc.target/i386/stack-realign.c
++++ b/gcc/testsuite/gcc.target/i386/stack-realign.c
+@@ -1,5 +1,5 @@
+ /* { dg-do run } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-mstackrealign -O2" } */
+ 
+ extern void abort (void);
+diff --git a/gcc/testsuite/gcc.target/i386/stack-usage-realign.c b/gcc/testsuite/gcc.target/i386/stack-usage-realign.c
+index 03d9d41..c899606 100644
+--- a/gcc/testsuite/gcc.target/i386/stack-usage-realign.c
++++ b/gcc/testsuite/gcc.target/i386/stack-usage-realign.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-skip-if "no stack realignment" { *-*-darwin* } { "*" } { "" } } */
+ /* { dg-options "-fstack-usage -msse2 -mforce-drap" } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/stackalign/asm-1.c b/gcc/testsuite/gcc.target/i386/stackalign/asm-1.c
+index e4d4f20..dfe3968 100644
+--- a/gcc/testsuite/gcc.target/i386/stackalign/asm-1.c
++++ b/gcc/testsuite/gcc.target/i386/stackalign/asm-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-mpreferred-stack-boundary=2" } */
+ 
+ /* This case is to detect a compile time regression introduced in stack
+diff --git a/gcc/testsuite/gcc.target/i386/stackalign/longlong-1.c b/gcc/testsuite/gcc.target/i386/stackalign/longlong-1.c
+index 225d0c5..161d229 100644
+--- a/gcc/testsuite/gcc.target/i386/stackalign/longlong-1.c
++++ b/gcc/testsuite/gcc.target/i386/stackalign/longlong-1.c
+@@ -1,6 +1,6 @@
+ /* PR target/39137 */
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -mpreferred-stack-boundary=2" } */
+ /* Make sure dynamic stack realignment isn't performed just because there
+    are long long variables.  */
+diff --git a/gcc/testsuite/gcc.target/i386/stackalign/longlong-2.c b/gcc/testsuite/gcc.target/i386/stackalign/longlong-2.c
+index ae7f3ee..6ea83f9 100644
+--- a/gcc/testsuite/gcc.target/i386/stackalign/longlong-2.c
++++ b/gcc/testsuite/gcc.target/i386/stackalign/longlong-2.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile  { target { ! *-*-darwin* } } } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-O2 -mpreferred-stack-boundary=2" } */
+ /* { dg-final { scan-assembler-times "and\[lq\]?\[^\\n\]*-8,\[^\\n\]*sp" 2 } } */ 
+ /* { dg-final { scan-assembler-times "and\[lq\]?\[^\\n\]*-16,\[^\\n\]*sp" 2 } } */ 
+diff --git a/gcc/testsuite/gcc.target/i386/stackalign/return-1.c b/gcc/testsuite/gcc.target/i386/stackalign/return-1.c
+index c5b32e5..c9fcc12 100644
+--- a/gcc/testsuite/gcc.target/i386/stackalign/return-1.c
++++ b/gcc/testsuite/gcc.target/i386/stackalign/return-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-mpreferred-stack-boundary=2" } */
+ 
+ /* This compile only test is to detect an assertion failure in stack branch
+diff --git a/gcc/testsuite/gcc.target/i386/stackalign/return-2.c b/gcc/testsuite/gcc.target/i386/stackalign/return-2.c
+index 113e71b..d393913 100644
+--- a/gcc/testsuite/gcc.target/i386/stackalign/return-2.c
++++ b/gcc/testsuite/gcc.target/i386/stackalign/return-2.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-mpreferred-stack-boundary=2" } */
+ 
+ /* This compile only test is to detect an assertion failure in stack branch
+diff --git a/gcc/testsuite/gcc.target/i386/stackalign/return-3.c b/gcc/testsuite/gcc.target/i386/stackalign/return-3.c
+index dd2c2e8..e32547e 100644
+--- a/gcc/testsuite/gcc.target/i386/stackalign/return-3.c
++++ b/gcc/testsuite/gcc.target/i386/stackalign/return-3.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-skip-if "" { ! { ilp32 && dfp } } { "*" } { "" } } */
++/* { dg-skip-if "" { ! { ia32 && dfp } } { "*" } { "" } } */
+ /* { dg-options "-msse -std=gnu99 -mpreferred-stack-boundary=2" } */
+ /* { dg-require-effective-target sse } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/tailcall-1.c b/gcc/testsuite/gcc.target/i386/tailcall-1.c
+index e6ae990..9aae9d4 100644
+--- a/gcc/testsuite/gcc.target/i386/tailcall-1.c
++++ b/gcc/testsuite/gcc.target/i386/tailcall-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-require-effective-target nonpic } */
+ /* { dg-options "-O2" } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/tbm-2.c b/gcc/testsuite/gcc.target/i386/tbm-2.c
+index 447e0ab..fa3870a 100644
+--- a/gcc/testsuite/gcc.target/i386/tbm-2.c
++++ b/gcc/testsuite/gcc.target/i386/tbm-2.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mtbm" } */
+ /* { dg-final { scan-assembler "bextr\[^\\n]*(%|)rax" } } */
+ /* { dg-final { scan-assembler "blcfill\[^\\n]*(%|)rax" } } */
+diff --git a/gcc/testsuite/gcc.target/i386/udivmod-7.c b/gcc/testsuite/gcc.target/i386/udivmod-7.c
+index 14a065f..4a68a75 100644
+--- a/gcc/testsuite/gcc.target/i386/udivmod-7.c
++++ b/gcc/testsuite/gcc.target/i386/udivmod-7.c
+@@ -1,6 +1,5 @@
+-/* { dg-do compile } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -m8bit-idiv" } */
+-/* { dg-require-effective-target lp64 } */
+ 
+ extern void abort (void);
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/udivmod-8.c b/gcc/testsuite/gcc.target/i386/udivmod-8.c
+index 16459fc..bef4964 100644
+--- a/gcc/testsuite/gcc.target/i386/udivmod-8.c
++++ b/gcc/testsuite/gcc.target/i386/udivmod-8.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -m8bit-idiv" } */
+ 
+ extern void foo (unsigned long long, unsigned long long,
+diff --git a/gcc/testsuite/gcc.target/i386/unroll-1.c b/gcc/testsuite/gcc.target/i386/unroll-1.c
+index 8cf19c4..cc8132e 100644
+--- a/gcc/testsuite/gcc.target/i386/unroll-1.c
++++ b/gcc/testsuite/gcc.target/i386/unroll-1.c
+@@ -1,6 +1,6 @@
+ /* PR optimization/8599 */
+ /* { dg-do run } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ /* { dg-options "-mtune=k6 -O2 -funroll-loops" } */
+ 
+ extern void exit (int);
+diff --git a/gcc/testsuite/gcc.target/i386/vararg-1.c b/gcc/testsuite/gcc.target/i386/vararg-1.c
+index 9ed9ab0..a2db4b9 100644
+--- a/gcc/testsuite/gcc.target/i386/vararg-1.c
++++ b/gcc/testsuite/gcc.target/i386/vararg-1.c
+@@ -1,8 +1,8 @@
+ /* PR middle-end/36858 */
+ /* { dg-do run } */
+-/* { dg-options "-w" { target { lp64 } } } */
++/* { dg-options "-w" { target { ! { ia32 } } } } */
+ /* { dg-options "-w" { target { llp64 } } } */
+-/* { dg-options "-w -msse2 -mpreferred-stack-boundary=2" { target { ilp32 } } } */
++/* { dg-options "-w -msse2 -mpreferred-stack-boundary=2" { target { ia32 } } } */
+ /* { dg-require-effective-target sse2 } */
+ 
+ #include "sse2-check.h"
+diff --git a/gcc/testsuite/gcc.target/i386/vararg-2.c b/gcc/testsuite/gcc.target/i386/vararg-2.c
+index 8048012..bd5ad54 100644
+--- a/gcc/testsuite/gcc.target/i386/vararg-2.c
++++ b/gcc/testsuite/gcc.target/i386/vararg-2.c
+@@ -1,8 +1,8 @@
+ /* PR middle-end/36859 */
+ /* { dg-do run } */
+-/* { dg-options "-w" { target { lp64 } } } */
++/* { dg-options "-w" { target { ! { ia32 } } } } */
+ /* { dg-options "-w" { target { llp64 } } } */
+-/* { dg-options "-w -msse2 -mpreferred-stack-boundary=2" { target { ilp32 } } } */
++/* { dg-options "-w -msse2 -mpreferred-stack-boundary=2" { target { ia32 } } } */
+ /* { dg-require-effective-target sse2 } */
+ 
+ #include "sse2-check.h"
+diff --git a/gcc/testsuite/gcc.target/i386/vect8-ret.c b/gcc/testsuite/gcc.target/i386/vect8-ret.c
+index f2eb81b..c2e2106 100644
+--- a/gcc/testsuite/gcc.target/i386/vect8-ret.c
++++ b/gcc/testsuite/gcc.target/i386/vect8-ret.c
+@@ -1,4 +1,4 @@
+-/* { dg-do compile { target ilp32 } } */
++/* { dg-do compile { target ia32 } } */
+ /* { dg-options "-mmmx" { target i?86-*-solaris2.[89] *-*-vxworks* } } */
+ /* { dg-options "-mmmx -mvect8-ret-in-mem" } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/vectorize5.c b/gcc/testsuite/gcc.target/i386/vectorize5.c
+index 04f044f..2065e5d 100644
+--- a/gcc/testsuite/gcc.target/i386/vectorize5.c
++++ b/gcc/testsuite/gcc.target/i386/vectorize5.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -ftree-vectorize -mveclibabi=acml -ffast-math -mtune=generic" } */
+ 
+ double x[256];
+diff --git a/gcc/testsuite/gcc.target/i386/wmul-1.c b/gcc/testsuite/gcc.target/i386/wmul-1.c
+index 3497f71..4ef8385 100644
+--- a/gcc/testsuite/gcc.target/i386/wmul-1.c
++++ b/gcc/testsuite/gcc.target/i386/wmul-1.c
+@@ -1,6 +1,6 @@
+ /* { dg-do compile } */
+ /* { dg-options "-O2" } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ 
+ long long mac(const int *a, const int *b, long long sqr, long long *sum)
+ {
+diff --git a/gcc/testsuite/gcc.target/i386/wmul-2.c b/gcc/testsuite/gcc.target/i386/wmul-2.c
+index 51de269..0a82654 100644
+--- a/gcc/testsuite/gcc.target/i386/wmul-2.c
++++ b/gcc/testsuite/gcc.target/i386/wmul-2.c
+@@ -1,6 +1,6 @@
+ /* { dg-do compile } */
+ /* { dg-options "-O2" } */
+-/* { dg-require-effective-target ilp32 } */
++/* { dg-require-effective-target ia32 } */
+ 
+ void vec_mpy(int y[], const int x[], int scaler)
+ {
+diff --git a/gcc/testsuite/gcc.target/i386/wrfsbase-1.c b/gcc/testsuite/gcc.target/i386/wrfsbase-1.c
+index 4b84926..8b55ce6 100644
+--- a/gcc/testsuite/gcc.target/i386/wrfsbase-1.c
++++ b/gcc/testsuite/gcc.target/i386/wrfsbase-1.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mfsgsbase" } */
+ /* { dg-final { scan-assembler "wrfsbase\[ \t]+(%|)edi" } } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/wrfsbase-2.c b/gcc/testsuite/gcc.target/i386/wrfsbase-2.c
+index 5e1762d..5accd79 100644
+--- a/gcc/testsuite/gcc.target/i386/wrfsbase-2.c
++++ b/gcc/testsuite/gcc.target/i386/wrfsbase-2.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mfsgsbase" } */
+ /* { dg-final { scan-assembler "wrfsbase\[ \t]+(%|)rdi" } } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/wrgsbase-1.c b/gcc/testsuite/gcc.target/i386/wrgsbase-1.c
+index 15d2d7f..20cd945 100644
+--- a/gcc/testsuite/gcc.target/i386/wrgsbase-1.c
++++ b/gcc/testsuite/gcc.target/i386/wrgsbase-1.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mfsgsbase" } */
+ /* { dg-final { scan-assembler "wrgsbase\[ \t]+(%|)edi" } } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/wrgsbase-2.c b/gcc/testsuite/gcc.target/i386/wrgsbase-2.c
+index 0a33d77..52a3c34 100644
+--- a/gcc/testsuite/gcc.target/i386/wrgsbase-2.c
++++ b/gcc/testsuite/gcc.target/i386/wrgsbase-2.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mfsgsbase" } */
+ /* { dg-final { scan-assembler "wrgsbase\[ \t]+(%|)rdi" } } */
+ 
+diff --git a/gcc/testsuite/gcc.target/i386/xop-pcmov.c b/gcc/testsuite/gcc.target/i386/xop-pcmov.c
+index d6375b1..75ed433 100644
+--- a/gcc/testsuite/gcc.target/i386/xop-pcmov.c
++++ b/gcc/testsuite/gcc.target/i386/xop-pcmov.c
+@@ -1,8 +1,7 @@
+ /* Test that the compiler properly optimizes conditional floating point moves
+    into the pcmov instruction on XOP systems.  */
+ 
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mxop" } */
+ 
+ extern void exit (int);
+diff --git a/gcc/testsuite/gcc.target/i386/xop-pcmov2.c b/gcc/testsuite/gcc.target/i386/xop-pcmov2.c
+index 617da39..6b6bd21 100644
+--- a/gcc/testsuite/gcc.target/i386/xop-pcmov2.c
++++ b/gcc/testsuite/gcc.target/i386/xop-pcmov2.c
+@@ -1,8 +1,7 @@
+ /* Test that the compiler properly optimizes conditional floating point moves
+    into the pcmov instruction on XOP systems.  */
+ 
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mxop" } */
+ 
+ extern void exit (int);
+diff --git a/gcc/testsuite/gcc.target/i386/xop-rotate1-vector.c b/gcc/testsuite/gcc.target/i386/xop-rotate1-vector.c
+index e3ae644..f2b9eb8 100644
+--- a/gcc/testsuite/gcc.target/i386/xop-rotate1-vector.c
++++ b/gcc/testsuite/gcc.target/i386/xop-rotate1-vector.c
+@@ -1,8 +1,7 @@
+ /* Test that the compiler properly optimizes vector rotate instructions vector
+    into prot on XOP systems.  */
+ 
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mxop -ftree-vectorize" } */
+ 
+ extern void exit (int);
+diff --git a/gcc/testsuite/gcc.target/i386/xop-rotate2-vector.c b/gcc/testsuite/gcc.target/i386/xop-rotate2-vector.c
+index 9996279..11d4002 100644
+--- a/gcc/testsuite/gcc.target/i386/xop-rotate2-vector.c
++++ b/gcc/testsuite/gcc.target/i386/xop-rotate2-vector.c
+@@ -1,8 +1,7 @@
+ /* Test that the compiler properly optimizes vector rotate instructions vector
+    into prot on XOP systems.  */
+ 
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mxop -ftree-vectorize" } */
+ 
+ extern void exit (int);
+diff --git a/gcc/testsuite/gcc.target/i386/xop-rotate3-vector.c b/gcc/testsuite/gcc.target/i386/xop-rotate3-vector.c
+index 73d52f5..eb3c614 100644
+--- a/gcc/testsuite/gcc.target/i386/xop-rotate3-vector.c
++++ b/gcc/testsuite/gcc.target/i386/xop-rotate3-vector.c
+@@ -1,8 +1,7 @@
+ /* Test that the compiler properly optimizes vector rotate instructions vector
+    into prot on XOP systems.  */
+ 
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mxop -ftree-vectorize" } */
+ 
+ extern void exit (int);
+diff --git a/gcc/testsuite/gcc.target/i386/xop-shift1-vector.c b/gcc/testsuite/gcc.target/i386/xop-shift1-vector.c
+index eb84439..16b3a6b 100644
+--- a/gcc/testsuite/gcc.target/i386/xop-shift1-vector.c
++++ b/gcc/testsuite/gcc.target/i386/xop-shift1-vector.c
+@@ -1,8 +1,7 @@
+ /* Test that the compiler properly optimizes vector shift instructions into
+    psha/pshl on XOP systems.  */
+ 
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mxop -ftree-vectorize" } */
+ 
+ extern void exit (int);
+diff --git a/gcc/testsuite/gcc.target/i386/xop-shift2-vector.c b/gcc/testsuite/gcc.target/i386/xop-shift2-vector.c
+index e59c30d..1f1ed63 100644
+--- a/gcc/testsuite/gcc.target/i386/xop-shift2-vector.c
++++ b/gcc/testsuite/gcc.target/i386/xop-shift2-vector.c
+@@ -1,8 +1,7 @@
+ /* Test that the compiler properly optimizes vector shift instructions into
+    psha/pshl on XOP systems.  */
+ 
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mxop -ftree-vectorize" } */
+ 
+ extern void exit (int);
+diff --git a/gcc/testsuite/gcc.target/i386/xop-shift3-vector.c b/gcc/testsuite/gcc.target/i386/xop-shift3-vector.c
+index 2b9302d..de64178 100644
+--- a/gcc/testsuite/gcc.target/i386/xop-shift3-vector.c
++++ b/gcc/testsuite/gcc.target/i386/xop-shift3-vector.c
+@@ -1,8 +1,7 @@
+ /* Test that the compiler properly optimizes vector shift instructions into
+    psha/pshl on XOP systems.  */
+ 
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -mxop -ftree-vectorize" } */
+ 
+ extern void exit (int);
+diff --git a/gcc/testsuite/gcc.target/i386/zee.c b/gcc/testsuite/gcc.target/i386/zee.c
+index b46e890..1975b02 100644
+--- a/gcc/testsuite/gcc.target/i386/zee.c
++++ b/gcc/testsuite/gcc.target/i386/zee.c
+@@ -1,5 +1,4 @@
+-/* { dg-do compile } */
+-/* { dg-require-effective-target lp64 } */
++/* { dg-do compile { target { ! { ia32 } } } } */
+ /* { dg-options "-O2 -fzee" } */
+ /* { dg-final { scan-assembler-not "mov\[\\t \]+\(%\[\^,\]+\),\[\\t \]*\\1" } } */
+ int mask[100];
+diff --git a/gcc/testsuite/gfortran.dg/compiler-directive_2.f b/gcc/testsuite/gfortran.dg/compiler-directive_2.f
+index fcb1657..79169a8 100644
+--- a/gcc/testsuite/gfortran.dg/compiler-directive_2.f
++++ b/gcc/testsuite/gfortran.dg/compiler-directive_2.f
+@@ -1,5 +1,4 @@
+-! { dg-do compile { target i?86-*-* x86_64-*-* } }
+-! { dg-require-effective-target ilp32 }
++! { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } }
+ !
+ ! PR fortran/34112
+ !
+diff --git a/gcc/testsuite/gfortran.dg/g77/20010216-1.f b/gcc/testsuite/gfortran.dg/g77/20010216-1.f
+index 004d1d3..af2c03a 100644
+--- a/gcc/testsuite/gfortran.dg/g77/20010216-1.f
++++ b/gcc/testsuite/gfortran.dg/g77/20010216-1.f
+@@ -1,7 +1,7 @@
+ C Test for bug in reg-stack handling conditional moves.
+ C Reported by Tim Prince <tprince@computer.org>
+ C
+-C { dg-do run { target { { i[6789]86-*-* x86_64-*-* } && ilp32 } } }
++C { dg-do run { target { { i[6789]86-*-* x86_64-*-* } && ia32 } } }
+ C { dg-options "-ffast-math -march=pentiumpro" }
+ 
+       double precision function foo(x, y)
+diff --git a/gcc/testsuite/gfortran.dg/gomp/pr39152.f90 b/gcc/testsuite/gfortran.dg/gomp/pr39152.f90
+index ff088b5..385ebc7 100644
+--- a/gcc/testsuite/gfortran.dg/gomp/pr39152.f90
++++ b/gcc/testsuite/gfortran.dg/gomp/pr39152.f90
+@@ -1,4 +1,4 @@
+-! { dg-do compile { target { { i?86-*-* x86_64-*-* } && ilp32 } } }
++! { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } }
+ ! { dg-options "-march=i486 -fopenmp -mavx -O3 -funroll-all-loops" } 
+ 
+   call test_workshare
+diff --git a/gcc/testsuite/gfortran.dg/pr33794.f90 b/gcc/testsuite/gfortran.dg/pr33794.f90
+index a2425ce..740f1ea 100644
+--- a/gcc/testsuite/gfortran.dg/pr33794.f90
++++ b/gcc/testsuite/gfortran.dg/pr33794.f90
+@@ -1,5 +1,5 @@
+ ! { dg-do run }
+-! { dg-options "-O2 -ffast-math -mfpmath=387" { target { { i?86-*-* x86_64-*-* } && lp64 } } }
++! { dg-options "-O2 -ffast-math -mfpmath=387" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } }
+ ! { dg-options "-O2 -ffast-math" }
+ 
+ module scc_m
+diff --git a/gcc/testsuite/go.test/go-test.exp b/gcc/testsuite/go.test/go-test.exp
+index 19cc0df..ec33369 100644
+--- a/gcc/testsuite/go.test/go-test.exp
++++ b/gcc/testsuite/go.test/go-test.exp
+@@ -119,7 +119,7 @@ proc go-set-goarch { } {
+ 	}
+ 	"i?86-*-*" -
+ 	"x86_64-*-*" {
+-	    if [check_effective_target_ilp32] {
++	    if [check_effective_target_ia32] {
+ 		set goarch "386"
+ 	    } else {
+ 		set goarch "amd64"
+diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
+index 1b64cb6..7e55fec 100644
+--- a/gcc/testsuite/lib/target-supports.exp
++++ b/gcc/testsuite/lib/target-supports.exp
+@@ -1487,6 +1487,28 @@ proc check_effective_target_ilp32 { } {
+     }]
+ }
+ 
++# Return 1 if we're generating ia32 code using default options, 0
++# otherwise.
++
++proc check_effective_target_ia32 { } {
++    return [check_no_compiler_messages ia32 object {
++	int dummy[sizeof (int) == 4
++		  && sizeof (void *) == 4
++		  && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
++    }]
++}
++
++# Return 1 if we're generating x32 code using default options, 0
++# otherwise.
++
++proc check_effective_target_x32 { } {
++    return [check_no_compiler_messages x32 object {
++	int dummy[sizeof (int) == 4
++		  && sizeof (void *) == 4
++		  && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
++    }]
++}
++
+ # Return 1 if we're generating 32-bit or larger integers using default
+ # options, 0 otherwise.
+ 
+@@ -1688,7 +1710,8 @@ proc check_effective_target_vect_cmdline_needed { } {
+ 	if { [istarget alpha*-*-*]
+ 	     || [istarget ia64-*-*]
+ 	     || (([istarget x86_64-*-*] || [istarget i?86-*-*])
+-		 && [check_effective_target_lp64])
++		 && ([check_effective_target_x32]
++		     || [check_effective_target_lp64]))
+ 	     || ([istarget powerpc*-*-*]
+ 		 && ([check_effective_target_powerpc_spe]
+ 		     || [check_effective_target_powerpc_altivec]))
+diff --git a/gcc/testsuite/objc.dg/torture/forward-1.m b/gcc/testsuite/objc.dg/torture/forward-1.m
+index bccf4a1..b77ff28 100644
+--- a/gcc/testsuite/objc.dg/torture/forward-1.m
++++ b/gcc/testsuite/objc.dg/torture/forward-1.m
+@@ -1,6 +1,6 @@
+ /* { dg-do run } */
+ /* See if -forward::/-performv:: is able to work. */
+-/* { dg-xfail-run-if "PR36610" { ! { { i?86-*-* x86_64-*-* } && ilp32 } } { "-fgnu-runtime" } { "" } } */
++/* { dg-xfail-run-if "PR36610" { ! { { i?86-*-* x86_64-*-* } && ia32 } } { "-fgnu-runtime" } { "" } } */
+ /* { dg-skip-if "Needs OBJC2 Implementation" { *-*-darwin* && { lp64 } } { "-fnext-runtime" } { "" } } */
+ /* There is no implementation of forward: in the NeXT m64 libobjc/Object
+    neither have we implemented this in our extensions - so we have to skip it
+diff --git a/gcc/unwind-dw2.c b/gcc/unwind-dw2.c
+index 2ea9adb..3358073 100644
+--- a/gcc/unwind-dw2.c
++++ b/gcc/unwind-dw2.c
+@@ -55,12 +55,50 @@
+ #define DWARF_REG_TO_UNWIND_COLUMN(REGNO) (REGNO)
+ #endif
+ 
++#ifdef REG_VALUE_IN_UNWIND_CONTEXT
++typedef _Unwind_Word _Unwind_Context_Reg_Val;
++
++#ifndef ASSUME_EXTENDED_UNWIND_CONTEXT
++#define ASSUME_EXTENDED_UNWIND_CONTEXT 1
++#endif
++
++static inline _Unwind_Word
++_Unwind_Get_Unwind_Word (_Unwind_Context_Reg_Val val)
++{
++  return val;
++}
++
++static inline _Unwind_Context_Reg_Val
++_Unwind_Get_Unwind_Context_Reg_Val (_Unwind_Word val)
++{
++  return val;
++}
++#else
++typedef void *_Unwind_Context_Reg_Val;
++
++static inline _Unwind_Word
++_Unwind_Get_Unwind_Word (_Unwind_Context_Reg_Val val)
++{
++  return (_Unwind_Word) (_Unwind_Internal_Ptr) val;
++}
++
++static inline _Unwind_Context_Reg_Val
++_Unwind_Get_Unwind_Context_Reg_Val (_Unwind_Word val)
++{
++  return (_Unwind_Context_Reg_Val) (_Unwind_Internal_Ptr) val;
++}
++#endif
++
++#ifndef ASSUME_EXTENDED_UNWIND_CONTEXT
++#define ASSUME_EXTENDED_UNWIND_CONTEXT 0
++#endif
++
+ /* This is the register and unwind state for a particular frame.  This
+    provides the information necessary to unwind up past a frame and return
+    to its caller.  */
+ struct _Unwind_Context
+ {
+-  void *reg[DWARF_FRAME_REGISTERS+1];
++  _Unwind_Context_Reg_Val reg[DWARF_FRAME_REGISTERS+1];
+   void *cfa;
+   void *ra;
+   void *lsda;
+@@ -143,7 +181,8 @@ _Unwind_SetSignalFrame (struct _Unwind_Context *context, int val)
+ static inline _Unwind_Word
+ _Unwind_IsExtendedContext (struct _Unwind_Context *context)
+ {
+-  return context->flags & EXTENDED_CONTEXT_BIT;
++  return (ASSUME_EXTENDED_UNWIND_CONTEXT
++	  || (context->flags & EXTENDED_CONTEXT_BIT));
+ }
+ 
+ /* Get the value of register INDEX as saved in CONTEXT.  */
+@@ -152,7 +191,7 @@ inline _Unwind_Word
+ _Unwind_GetGR (struct _Unwind_Context *context, int index)
+ {
+   int size;
+-  void *ptr;
++  _Unwind_Context_Reg_Val val;
+ 
+ #ifdef DWARF_ZERO_REG
+   if (index == DWARF_ZERO_REG)
+@@ -162,18 +201,18 @@ _Unwind_GetGR (struct _Unwind_Context *context, int index)
+   index = DWARF_REG_TO_UNWIND_COLUMN (index);
+   gcc_assert (index < (int) sizeof(dwarf_reg_size_table));
+   size = dwarf_reg_size_table[index];
+-  ptr = context->reg[index];
++  val = context->reg[index];
+ 
+   if (_Unwind_IsExtendedContext (context) && context->by_value[index])
+-    return (_Unwind_Word) (_Unwind_Internal_Ptr) ptr;
++    return _Unwind_Get_Unwind_Word (val);
+ 
+   /* This will segfault if the register hasn't been saved.  */
+   if (size == sizeof(_Unwind_Ptr))
+-    return * (_Unwind_Ptr *) ptr;
++    return * (_Unwind_Ptr *) (_Unwind_Internal_Ptr) val;
+   else
+     {
+       gcc_assert (size == sizeof(_Unwind_Word));
+-      return * (_Unwind_Word *) ptr;
++      return * (_Unwind_Word *) (_Unwind_Internal_Ptr) val;
+     }
+ }
+ 
+@@ -205,11 +244,11 @@ _Unwind_SetGR (struct _Unwind_Context *context, int index, _Unwind_Word val)
+ 
+   if (_Unwind_IsExtendedContext (context) && context->by_value[index])
+     {
+-      context->reg[index] = (void *) (_Unwind_Internal_Ptr) val;
++      context->reg[index] = _Unwind_Get_Unwind_Context_Reg_Val (val);
+       return;
+     }
+ 
+-  ptr = context->reg[index];
++  ptr = (void *) (_Unwind_Internal_Ptr) context->reg[index];
+ 
+   if (size == sizeof(_Unwind_Ptr))
+     * (_Unwind_Ptr *) ptr = val;
+@@ -228,7 +267,7 @@ _Unwind_GetGRPtr (struct _Unwind_Context *context, int index)
+   index = DWARF_REG_TO_UNWIND_COLUMN (index);
+   if (_Unwind_IsExtendedContext (context) && context->by_value[index])
+     return &context->reg[index];
+-  return context->reg[index];
++  return (void *) (_Unwind_Internal_Ptr) context->reg[index];
+ }
+ 
+ /* Set the pointer to a register INDEX as saved in CONTEXT.  */
+@@ -239,7 +278,7 @@ _Unwind_SetGRPtr (struct _Unwind_Context *context, int index, void *p)
+   index = DWARF_REG_TO_UNWIND_COLUMN (index);
+   if (_Unwind_IsExtendedContext (context))
+     context->by_value[index] = 0;
+-  context->reg[index] = p;
++  context->reg[index] = (_Unwind_Context_Reg_Val) (_Unwind_Internal_Ptr) p;
+ }
+ 
+ /* Overwrite the saved value for register INDEX in CONTEXT with VAL.  */
+@@ -250,10 +289,11 @@ _Unwind_SetGRValue (struct _Unwind_Context *context, int index,
+ {
+   index = DWARF_REG_TO_UNWIND_COLUMN (index);
+   gcc_assert (index < (int) sizeof(dwarf_reg_size_table));
+-  gcc_assert (dwarf_reg_size_table[index] == sizeof (_Unwind_Ptr));
++  /* Return column size may be smaller than _Unwind_Context_Reg_Va.  */ 
++  gcc_assert (dwarf_reg_size_table[index] <= sizeof (_Unwind_Context_Reg_Val));
+ 
+   context->by_value[index] = 1;
+-  context->reg[index] = (void *) (_Unwind_Internal_Ptr) val;
++  context->reg[index] = _Unwind_Get_Unwind_Context_Reg_Val (val);
+ }
+ 
+ /* Return nonzero if register INDEX is stored by value rather than
+@@ -1213,7 +1253,8 @@ __frame_state_for (void *pc_target, struct frame_state *state_in)
+   int reg;
+ 
+   memset (&context, 0, sizeof (struct _Unwind_Context));
+-  context.flags = EXTENDED_CONTEXT_BIT;
++  if (!ASSUME_EXTENDED_UNWIND_CONTEXT)
++    context.flags = EXTENDED_CONTEXT_BIT;
+   context.ra = pc_target + 1;
+ 
+   if (uw_frame_state_for (&context, &fs) != _URC_NO_REASON)
+@@ -1451,7 +1492,8 @@ uw_init_context_1 (struct _Unwind_Context *context,
+ 
+   memset (context, 0, sizeof (struct _Unwind_Context));
+   context->ra = ra;
+-  context->flags = EXTENDED_CONTEXT_BIT;
++  if (!ASSUME_EXTENDED_UNWIND_CONTEXT)
++    context->flags = EXTENDED_CONTEXT_BIT;
+ 
+   code = uw_frame_state_for (context, &fs);
+   gcc_assert (code == _URC_NO_REASON);
+@@ -1524,8 +1566,8 @@ uw_install_context_1 (struct _Unwind_Context *current,
+ 
+   for (i = 0; i < DWARF_FRAME_REGISTERS; ++i)
+     {
+-      void *c = current->reg[i];
+-      void *t = target->reg[i];
++      void *c = (void *) (_Unwind_Internal_Ptr) current->reg[i];
++      void *t = (void *) (_Unwind_Internal_Ptr)target->reg[i];
+ 
+       gcc_assert (current->by_value[i] == 0);
+       if (target->by_value[i] && c)
+diff --git a/libgcc/ChangeLog.x32 b/libgcc/ChangeLog.x32
+new file mode 100644
+index 0000000..bceff21
+--- /dev/null
++++ b/libgcc/ChangeLog.x32
+@@ -0,0 +1,17 @@
++2011-11-10  H.J. Lu  <hongjiu.lu@intel.com>
++
++	PR other/48007
++	* config/i386/value-unwind.h: New.
++
++2011-11-08  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config/i386/morestack.S (X86_64_SAVE_NEW_STACK_BOUNDARY): New.
++	Use X86_64_SAVE_NEW_STACK_BOUNDARY to save the new stack boundary
++	for x86-64.  Properly check __x86_64__ and __LP64__.
++
++2011-10-08  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config/i386/64/sfp-machine.h (_FP_W_TYPE): Always use _WIN64
++	version.
++	(_FP_WS_TYPE): Likewise.
++	(_FP_I_TYPE): Likewise.
+diff --git a/libgcc/config/i386/64/sfp-machine.h b/libgcc/config/i386/64/sfp-machine.h
+index 5186c24..7a2a4be 100644
+--- a/libgcc/config/i386/64/sfp-machine.h
++++ b/libgcc/config/i386/64/sfp-machine.h
+@@ -1,14 +1,8 @@
+ #define _FP_W_TYPE_SIZE		64
+ 
+-#ifdef _WIN64
+- #define _FP_W_TYPE		unsigned long long
+- #define _FP_WS_TYPE		signed long long
+- #define _FP_I_TYPE		long long
+-#else
+- #define _FP_W_TYPE		unsigned long
+- #define _FP_WS_TYPE		signed long
+- #define _FP_I_TYPE		long
+-#endif
++#define _FP_W_TYPE		unsigned long long
++#define _FP_WS_TYPE		signed long long
++#define _FP_I_TYPE		long long
+ 
+ typedef int TItype __attribute__ ((mode (TI)));
+ typedef unsigned int UTItype __attribute__ ((mode (TI)));
+diff --git a/libgcc/config/i386/morestack.S b/libgcc/config/i386/morestack.S
+index 10fa1fd..c4e3ce4 100644
+--- a/libgcc/config/i386/morestack.S
++++ b/libgcc/config/i386/morestack.S
+@@ -354,7 +354,13 @@ __morestack:
+ 	# FIXME: The offset must match
+ 	# TARGET_THREAD_SPLIT_STACK_OFFSET in
+ 	# gcc/config/i386/linux64.h.
+-	movq	%rax,%fs:0x70		# Save the new stack boundary.
++	# Macro to save the new stack boundary.
++#ifdef __LP64__
++#define X86_64_SAVE_NEW_STACK_BOUNDARY(reg)	movq	%r##reg,%fs:0x70
++#else
++#define X86_64_SAVE_NEW_STACK_BOUNDARY(reg)	movl	%e##reg,%fs:0x40
++#endif
++	X86_64_SAVE_NEW_STACK_BOUNDARY (ax)
+ 
+ 	call	__morestack_unblock_signals
+ 
+@@ -392,7 +398,7 @@ __morestack:
+ 	subq	0(%rsp),%rax		# Subtract available space.
+ 	addq	$BACKOFF,%rax		# Back off 1024 bytes.
+ .LEHE0:
+-	movq	%rax,%fs:0x70		# Save the new stack boundary.
++	X86_64_SAVE_NEW_STACK_BOUNDARY (ax)
+ 
+ 	addq	$16,%rsp		# Remove values from stack.
+ 
+@@ -434,7 +440,7 @@ __morestack:
+ 	movq	%rbp,%rcx		# Get the stack pointer.
+ 	subq	%rax,%rcx		# Subtract available space.
+ 	addq	$BACKOFF,%rcx		# Back off 1024 bytes.
+-	movq	%rcx,%fs:0x70		# Save new stack boundary.
++	X86_64_SAVE_NEW_STACK_BOUNDARY (cx)
+ 	movq	(%rsp),%rdi		# Restore exception data for call.
+ #ifdef __PIC__
+ 	call	_Unwind_Resume@PLT	# Resume unwinding.
+@@ -477,7 +483,7 @@ __morestack:
+ 	.section .data.DW.ref.__gcc_personality_v0,"awG",@progbits,DW.ref.__gcc_personality_v0,comdat
+ 	.type	DW.ref.__gcc_personality_v0, @object
+ DW.ref.__gcc_personality_v0:
+-#ifndef __x86_64
++#ifndef __LP64__
+ 	.align 4
+ 	.size	DW.ref.__gcc_personality_v0, 4
+ 	.long	__gcc_personality_v0
+@@ -488,7 +494,7 @@ DW.ref.__gcc_personality_v0:
+ #endif
+ #endif
+ 
+-#ifdef __x86_64__
++#if defined __x86_64__ && defined __LP64__
+ 
+ # This entry point is used for the large model.  With this entry point
+ # the upper 32 bits of %r10 hold the argument size and the lower 32
+@@ -521,7 +527,7 @@ __morestack_large_model:
+        .size	__morestack_large_model, . - __morestack_large_model
+ #endif
+ 
+-#endif /* __x86_64__ */
++#endif /* __x86_64__ && __LP64__ */
+ 
+ # Initialize the stack test value when the program starts or when a
+ # new thread starts.  We don't know how large the main stack is, so we
+@@ -554,7 +560,7 @@ __stack_split_initialize:
+ #else /* defined(__x86_64__) */
+ 
+ 	leaq	-16000(%rsp),%rax	# We should have at least 16K.
+-	movq	%rax,%fs:0x70
++	X86_64_SAVE_NEW_STACK_BOUNDARY (ax)
+ 	movq	%rsp,%rdi
+ 	movq	$16000,%rsi
+ #ifdef __PIC__
+@@ -576,7 +582,7 @@ __stack_split_initialize:
+ 
+ 	.section	.ctors.65535,"aw",@progbits
+ 
+-#ifndef __x86_64__
++#ifndef __LP64__
+ 	.align	4
+ 	.long	__stack_split_initialize
+ 	.long	__morestack_load_mmap
+diff --git a/libgcc/config/i386/value-unwind.h b/libgcc/config/i386/value-unwind.h
+new file mode 100644
+index 0000000..0dceb5c
+--- /dev/null
++++ b/libgcc/config/i386/value-unwind.h
+@@ -0,0 +1,26 @@
++/* Store register values as _Unwind_Word type in DWARF2 EH unwind context.
++   Copyright (C) 2011
++   Free Software Foundation, Inc.
++
++   This file is part of GCC.
++
++   GCC is free software; you can redistribute it and/or modify it
++   under the terms of the GNU General Public License as published
++   by the Free Software Foundation; either version 3, or (at your
++   option) any later version.
++
++   GCC is distributed in the hope that it will be useful, but WITHOUT
++   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
++   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
++   License for more details.
++
++   You should have received a copy of the GNU General Public License and
++   a copy of the GCC Runtime Library Exception along with this program;
++   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
++   <http://www.gnu.org/licenses/>.  */
++
++/* Define this macro if the target stores register values as _Unwind_Word
++   type in unwind context.  Only enable it for x32.  */
++#if defined __x86_64 && !defined __LP64__
++# define REG_VALUE_IN_UNWIND_CONTEXT
++#endif
+diff --git a/libgomp/ChangeLog.x32 b/libgomp/ChangeLog.x32
+new file mode 100644
+index 0000000..476a1be
+--- /dev/null
++++ b/libgomp/ChangeLog.x32
+@@ -0,0 +1,12 @@
++2011-11-09  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* testsuite/lib/libgomp.exp (libgomp_init): Add -march=i486
++	for ia32 instead of ilp32.
++
++	* testsuite/libgomp.c/atomic-1.c: Require ia32 instead of ilp32.
++	* testsuite/libgomp.c/atomic-6.c: Likewise.
++
++2011-11-08  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config/linux/x86/futex.h: Check __x86_64__ instead of
++	__LP64__.
+diff --git a/libgomp/config/linux/x86/futex.h b/libgomp/config/linux/x86/futex.h
+index cb7461d..419f4d9 100644
+--- a/libgomp/config/linux/x86/futex.h
++++ b/libgomp/config/linux/x86/futex.h
+@@ -24,7 +24,7 @@
+ 
+ /* Provide target-specific access to the futex system call.  */
+ 
+-#ifdef __LP64__
++#ifdef __x86_64__
+ # ifndef SYS_futex
+ #  define SYS_futex	202
+ # endif
+@@ -138,7 +138,7 @@ futex_wake (int *addr, int count)
+     }
+ }
+ 
+-#endif /* __LP64__ */
++#endif /* __x86_64__ */
+ 
+ static inline void
+ cpu_relax (void)
+diff --git a/libgomp/testsuite/lib/libgomp.exp b/libgomp/testsuite/lib/libgomp.exp
+index 976543d..a75e22f 100644
+--- a/libgomp/testsuite/lib/libgomp.exp
++++ b/libgomp/testsuite/lib/libgomp.exp
+@@ -140,7 +140,7 @@ proc libgomp_init { args } {
+ 
+     # We use atomic operations in the testcases to validate results.
+     if { ([istarget i?86-*-*] || [istarget x86_64-*-*])
+-	 && [check_effective_target_ilp32] } {
++	 && [check_effective_target_ia32] } {
+ 	lappend ALWAYS_CFLAGS "additional_flags=-march=i486"
+     }
+ 
+diff --git a/libgomp/testsuite/libgomp.c/atomic-1.c b/libgomp/testsuite/libgomp.c/atomic-1.c
+index b2be8f0..4725b7d 100644
+--- a/libgomp/testsuite/libgomp.c/atomic-1.c
++++ b/libgomp/testsuite/libgomp.c/atomic-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do run } */
+-/* { dg-options "-O2 -march=pentium" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O2 -march=pentium" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ #ifdef __i386__
+ #include "cpuid.h"
+diff --git a/libgomp/testsuite/libgomp.c/atomic-6.c b/libgomp/testsuite/libgomp.c/atomic-6.c
+index 59baf7d..f8ab75e 100644
+--- a/libgomp/testsuite/libgomp.c/atomic-6.c
++++ b/libgomp/testsuite/libgomp.c/atomic-6.c
+@@ -1,7 +1,7 @@
+ /* PR middle-end/36106 */
+ /* { dg-options "-O2" } */
+ /* { dg-options "-O2 -mieee" { target alpha*-*-* } } */
+-/* { dg-options "-O2 -march=i586" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
++/* { dg-options "-O2 -march=i586" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+ 
+ #ifdef __i386__
+ # include "cpuid.h"
+diff --git a/libjava/ChangeLog.x32 b/libjava/ChangeLog.x32
+new file mode 100644
+index 0000000..681371a
+--- /dev/null
++++ b/libjava/ChangeLog.x32
+@@ -0,0 +1,10 @@
++2011-11-09  H.J. Lu  <hongjiu.lu@intel.com>
++
++	PR libgcj/49193
++	* configure.host (sysdeps_dir): Set to i386 for x86_64.
++
++	* sysdep/i386/locks.h (compare_and_swap): Call
++	__sync_bool_compare_and_swap.
++	(release_set): Call write_barrier ().
++
++	* sysdep/x86-64/locks.h: Removed.
+diff --git a/libjava/configure.host b/libjava/configure.host
+index 5b88478..9d4f2b6 100644
+--- a/libjava/configure.host
++++ b/libjava/configure.host
+@@ -132,7 +132,7 @@ case "${host}" in
+ 	slow_pthread_self=yes
+ 	;;
+   x86_64-*)
+-	sysdeps_dir=x86-64
++	sysdeps_dir=i386
+ 	# For 64-bit we always use SSE registers for arithmetic,
+ 	# which doesn't have the extra precision problems of the fpu.
+ 	# But be careful about 32-bit multilibs.
+@@ -279,7 +279,7 @@ EOF
+         slow_pthread_self=
+         ;;
+   i[34567]86-*-solaris2.1[0-9]* )
+-	sysdeps_dir=x86-64
++	sysdeps_dir=i386
+ 	DIVIDESPEC=-f%{m32:no-}%{!m32:%{!m64:no-}}%{m64:}use-divide-subroutine
+ 	;;
+   mips-sgi-irix6* )
+diff --git a/libjava/sysdep/i386/locks.h b/libjava/sysdep/i386/locks.h
+index 9d130b0..7b99f0b 100644
+--- a/libjava/sysdep/i386/locks.h
++++ b/libjava/sysdep/i386/locks.h
+@@ -1,6 +1,6 @@
+ /* locks.h - Thread synchronization primitives. X86/x86-64 implementation.
+ 
+-   Copyright (C) 2002  Free Software Foundation
++   Copyright (C) 2002, 2011  Free Software Foundation
+ 
+    This file is part of libgcj.
+ 
+@@ -23,19 +23,25 @@ compare_and_swap(volatile obj_addr_t *addr,
+ 		 obj_addr_t old,
+ 		 obj_addr_t new_val)
+ {
+-  char result;
+-#ifdef __x86_64__
+-  __asm__ __volatile__("lock; cmpxchgq %2, %0; setz %1"
+-	      : "=m"(*(addr)), "=q"(result)
+-	      : "r" (new_val), "a"(old), "m"(*addr)
+-	      : "memory");
+-#else
+-  __asm__ __volatile__("lock; cmpxchgl %2, %0; setz %1"
+-		       : "=m"(*addr), "=q"(result)
+-		       : "r" (new_val), "a"(old), "m"(*addr)
+-		       : "memory");
+-#endif
+-  return (bool) result;
++  return __sync_bool_compare_and_swap (addr, old, new_val);
++}
++
++// Ensure that subsequent instructions do not execute on stale
++// data that was loaded from memory before the barrier.
++// On X86/x86-64, the hardware ensures that reads are properly ordered.
++inline static void
++read_barrier()
++{
++}
++
++// Ensure that prior stores to memory are completed with respect to other
++// processors.
++inline static void
++write_barrier()
++{
++  /* x86-64/X86 does not reorder writes. We just need to ensure that
++     gcc also doesn't.  */
++  __asm__ __volatile__(" " : : : "memory");
+ }
+ 
+ // Set *addr to new_val with release semantics, i.e. making sure
+@@ -46,7 +52,7 @@ compare_and_swap(volatile obj_addr_t *addr,
+ inline static void
+ release_set(volatile obj_addr_t *addr, obj_addr_t new_val)
+ {
+-  __asm__ __volatile__(" " : : : "memory");
++  write_barrier ();
+   *(addr) = new_val;
+ }
+ 
+@@ -60,22 +66,4 @@ compare_and_swap_release(volatile obj_addr_t *addr,
+ {
+   return compare_and_swap(addr, old, new_val);
+ }
+-
+-// Ensure that subsequent instructions do not execute on stale
+-// data that was loaded from memory before the barrier.
+-// On X86/x86-64, the hardware ensures that reads are properly ordered.
+-inline static void
+-read_barrier()
+-{
+-}
+-
+-// Ensure that prior stores to memory are completed with respect to other
+-// processors.
+-inline static void
+-write_barrier()
+-{
+-  /* x86-64/X86 does not reorder writes. We just need to ensure that
+-     gcc also doesn't.  */
+-  __asm__ __volatile__(" " : : : "memory");
+-}
+ #endif
+diff --git a/libjava/sysdep/x86-64/locks.h b/libjava/sysdep/x86-64/locks.h
+deleted file mode 100644
+index fdc0a3e..0000000
+--- a/libjava/sysdep/x86-64/locks.h
++++ /dev/null
+@@ -1,83 +0,0 @@
+-/* locks.h - Thread synchronization primitives. X86/x86-64 implementation.
+-
+-   Copyright (C) 2002  Free Software Foundation
+-
+-   Contributed by Bo Thorsen <bo@suse.de>.
+-
+-   This file is part of libgcj.
+-
+-This software is copyrighted work licensed under the terms of the
+-Libgcj License.  Please consult the file "LIBGCJ_LICENSE" for
+-details.  */
+-
+-#ifndef __SYSDEP_LOCKS_H__
+-#define __SYSDEP_LOCKS_H__
+-
+-typedef size_t obj_addr_t;	/* Integer type big enough for object	*/
+-				/* address.				*/
+-
+-// Atomically replace *addr by new_val if it was initially equal to old.
+-// Return true if the comparison succeeded.
+-// Assumed to have acquire semantics, i.e. later memory operations
+-// cannot execute before the compare_and_swap finishes.
+-inline static bool
+-compare_and_swap(volatile obj_addr_t *addr,
+-		 obj_addr_t old,
+-		 obj_addr_t new_val)
+-{
+-  char result;
+-#ifdef __x86_64__
+-  __asm__ __volatile__("lock; cmpxchgq %2, %0; setz %1"
+-	      : "=m"(*(addr)), "=q"(result)
+-	      : "r" (new_val), "a"(old), "m"(*addr)
+-	      : "memory");
+-#else
+-  __asm__ __volatile__("lock; cmpxchgl %2, %0; setz %1"
+-		       : "=m"(*addr), "=q"(result)
+-		       : "r" (new_val), "a"(old), "m"(*addr)
+-		       : "memory");
+-#endif
+-  return (bool) result;
+-}
+-
+-// Set *addr to new_val with release semantics, i.e. making sure
+-// that prior loads and stores complete before this
+-// assignment.
+-// On X86/x86-64, the hardware shouldn't reorder reads and writes,
+-// so we just have to convince gcc not to do it either.
+-inline static void
+-release_set(volatile obj_addr_t *addr, obj_addr_t new_val)
+-{
+-  __asm__ __volatile__(" " : : : "memory");
+-  *(addr) = new_val;
+-}
+-
+-// Compare_and_swap with release semantics instead of acquire semantics.
+-// On many architecture, the operation makes both guarantees, so the
+-// implementation can be the same.
+-inline static bool
+-compare_and_swap_release(volatile obj_addr_t *addr,
+-			 obj_addr_t old,
+-			 obj_addr_t new_val)
+-{
+-  return compare_and_swap(addr, old, new_val);
+-}
+-
+-// Ensure that subsequent instructions do not execute on stale
+-// data that was loaded from memory before the barrier.
+-// On X86/x86-64, the hardware ensures that reads are properly ordered.
+-inline static void
+-read_barrier()
+-{
+-}
+-
+-// Ensure that prior stores to memory are completed with respect to other
+-// processors.
+-inline static void
+-write_barrier()
+-{
+-  /* x86-64/X86 does not reorder writes. We just need to ensure that
+-     gcc also doesn't.  */
+-  __asm__ __volatile__(" " : : : "memory");
+-}
+-#endif
+diff --git a/libstdc++-v3/ChangeLog.x32 b/libstdc++-v3/ChangeLog.x32
+new file mode 100644
+index 0000000..3a5cffb
+--- /dev/null
++++ b/libstdc++-v3/ChangeLog.x32
+@@ -0,0 +1,3 @@
++2011-11-09  H.J. Lu  <hongjiu.lu@intel.com>
++
++	* config/abi/post/x86_64-linux-gnu/x32/baseline_symbols.txt: Generated.
+diff --git a/libstdc++-v3/config/abi/post/x86_64-linux-gnu/x32/baseline_symbols.txt b/libstdc++-v3/config/abi/post/x86_64-linux-gnu/x32/baseline_symbols.txt
+new file mode 100644
+index 0000000..68ed545
+--- /dev/null
++++ b/libstdc++-v3/config/abi/post/x86_64-linux-gnu/x32/baseline_symbols.txt
+@@ -0,0 +1,3615 @@
++FUNC:_ZN10__cxxabiv116__enum_type_infoD0Ev@@CXXABI_1.3
++FUNC:_ZN10__cxxabiv116__enum_type_infoD1Ev@@CXXABI_1.3
++FUNC:_ZN10__cxxabiv116__enum_type_infoD2Ev@@CXXABI_1.3
++FUNC:_ZN10__cxxabiv117__array_type_infoD0Ev@@CXXABI_1.3
++FUNC:_ZN10__cxxabiv117__array_type_infoD1Ev@@CXXABI_1.3
++FUNC:_ZN10__cxxabiv117__array_type_infoD2Ev@@CXXABI_1.3
++FUNC:_ZN10__cxxabiv117__class_type_infoD0Ev@@CXXABI_1.3
++FUNC:_ZN10__cxxabiv117__class_type_infoD1Ev@@CXXABI_1.3
++FUNC:_ZN10__cxxabiv117__class_type_infoD2Ev@@CXXABI_1.3
++FUNC:_ZN10__cxxabiv117__pbase_type_infoD0Ev@@CXXABI_1.3
++FUNC:_ZN10__cxxabiv117__pbase_type_infoD1Ev@@CXXABI_1.3
++FUNC:_ZN10__cxxabiv117__pbase_type_infoD2Ev@@CXXABI_1.3
++FUNC:_ZN10__cxxabiv119__pointer_type_infoD0Ev@@CXXABI_1.3
++FUNC:_ZN10__cxxabiv119__pointer_type_infoD1Ev@@CXXABI_1.3
++FUNC:_ZN10__cxxabiv119__pointer_type_infoD2Ev@@CXXABI_1.3
++FUNC:_ZN10__cxxabiv120__function_type_infoD0Ev@@CXXABI_1.3
++FUNC:_ZN10__cxxabiv120__function_type_infoD1Ev@@CXXABI_1.3
++FUNC:_ZN10__cxxabiv120__function_type_infoD2Ev@@CXXABI_1.3
++FUNC:_ZN10__cxxabiv120__si_class_type_infoD0Ev@@CXXABI_1.3
++FUNC:_ZN10__cxxabiv120__si_class_type_infoD1Ev@@CXXABI_1.3
++FUNC:_ZN10__cxxabiv120__si_class_type_infoD2Ev@@CXXABI_1.3
++FUNC:_ZN10__cxxabiv121__vmi_class_type_infoD0Ev@@CXXABI_1.3
++FUNC:_ZN10__cxxabiv121__vmi_class_type_infoD1Ev@@CXXABI_1.3
++FUNC:_ZN10__cxxabiv121__vmi_class_type_infoD2Ev@@CXXABI_1.3
++FUNC:_ZN10__cxxabiv123__fundamental_type_infoD0Ev@@CXXABI_1.3
++FUNC:_ZN10__cxxabiv123__fundamental_type_infoD1Ev@@CXXABI_1.3
++FUNC:_ZN10__cxxabiv123__fundamental_type_infoD2Ev@@CXXABI_1.3
++FUNC:_ZN10__cxxabiv129__pointer_to_member_type_infoD0Ev@@CXXABI_1.3
++FUNC:_ZN10__cxxabiv129__pointer_to_member_type_infoD1Ev@@CXXABI_1.3
++FUNC:_ZN10__cxxabiv129__pointer_to_member_type_infoD2Ev@@CXXABI_1.3
++FUNC:_ZN10__gnu_norm15_List_node_base4hookEPS0_@@GLIBCXX_3.4
++FUNC:_ZN10__gnu_norm15_List_node_base4swapERS0_S1_@@GLIBCXX_3.4
++FUNC:_ZN10__gnu_norm15_List_node_base6unhookEv@@GLIBCXX_3.4
++FUNC:_ZN10__gnu_norm15_List_node_base7reverseEv@@GLIBCXX_3.4
++FUNC:_ZN10__gnu_norm15_List_node_base8transferEPS0_S1_@@GLIBCXX_3.4
++FUNC:_ZN11__gnu_debug19_Safe_iterator_base12_M_get_mutexEv@@GLIBCXX_3.4.9
++FUNC:_ZN11__gnu_debug19_Safe_iterator_base16_M_attach_singleEPNS_19_Safe_sequence_baseEb@@GLIBCXX_3.4.9
++FUNC:_ZN11__gnu_debug19_Safe_iterator_base16_M_detach_singleEv@@GLIBCXX_3.4.9
++FUNC:_ZN11__gnu_debug19_Safe_iterator_base9_M_attachEPNS_19_Safe_sequence_baseEb@@GLIBCXX_3.4
++FUNC:_ZN11__gnu_debug19_Safe_iterator_base9_M_detachEv@@GLIBCXX_3.4
++FUNC:_ZN11__gnu_debug19_Safe_sequence_base12_M_get_mutexEv@@GLIBCXX_3.4.9
++FUNC:_ZN11__gnu_debug19_Safe_sequence_base13_M_detach_allEv@@GLIBCXX_3.4
++FUNC:_ZN11__gnu_debug19_Safe_sequence_base18_M_detach_singularEv@@GLIBCXX_3.4
++FUNC:_ZN11__gnu_debug19_Safe_sequence_base22_M_revalidate_singularEv@@GLIBCXX_3.4
++FUNC:_ZN11__gnu_debug19_Safe_sequence_base7_M_swapERS0_@@GLIBCXX_3.4
++FUNC:_ZN14__gnu_parallel9_Settings3getEv@@GLIBCXX_3.4.10
++FUNC:_ZN14__gnu_parallel9_Settings3setERS0_@@GLIBCXX_3.4.10
++FUNC:_ZN9__gnu_cxx12__atomic_addEPVii@@GLIBCXX_3.4
++FUNC:_ZN9__gnu_cxx17__pool_alloc_base12_M_get_mutexEv@@GLIBCXX_3.4.2
++FUNC:_ZN9__gnu_cxx17__pool_alloc_base16_M_get_free_listEj@@GLIBCXX_3.4.2
++FUNC:_ZN9__gnu_cxx17__pool_alloc_base9_M_refillEj@@GLIBCXX_3.4.2
++FUNC:_ZN9__gnu_cxx18__exchange_and_addEPVii@@GLIBCXX_3.4
++FUNC:_ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE4fileEv@@GLIBCXX_3.4.2
++FUNC:_ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE4syncEv@@GLIBCXX_3.4.10
++FUNC:_ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE5uflowEv@@GLIBCXX_3.4.10
++FUNC:_ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsgetnEPci@@GLIBCXX_3.4.10
++FUNC:_ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsputnEPKci@@GLIBCXX_3.4.10
++FUNC:_ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@@GLIBCXX_3.4.10
++FUNC:_ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE7seekposESt4fposI11__mbstate_tESt13_Ios_Openmode@@GLIBCXX_3.4.10
++FUNC:_ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE8overflowEi@@GLIBCXX_3.4.10
++FUNC:_ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE9pbackfailEi@@GLIBCXX_3.4.10
++FUNC:_ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE9underflowEv@@GLIBCXX_3.4.10
++FUNC:_ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEEC1EP8_IO_FILE@@GLIBCXX_3.4.10
++FUNC:_ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEEC2EP8_IO_FILE@@GLIBCXX_3.4.10
++FUNC:_ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEED0Ev@@GLIBCXX_3.4.10
++FUNC:_ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEED1Ev@@GLIBCXX_3.4.10
++FUNC:_ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE4fileEv@@GLIBCXX_3.4.2
++FUNC:_ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE4syncEv@@GLIBCXX_3.4.10
++FUNC:_ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE5uflowEv@@GLIBCXX_3.4.10
++FUNC:_ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsgetnEPwi@@GLIBCXX_3.4.10
++FUNC:_ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsputnEPKwi@@GLIBCXX_3.4.10
++FUNC:_ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@@GLIBCXX_3.4.10
++FUNC:_ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE7seekposESt4fposI11__mbstate_tESt13_Ios_Openmode@@GLIBCXX_3.4.10
++FUNC:_ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE8overflowEj@@GLIBCXX_3.4.10
++FUNC:_ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE9pbackfailEj@@GLIBCXX_3.4.10
++FUNC:_ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE9underflowEv@@GLIBCXX_3.4.10
++FUNC:_ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEEC1EP8_IO_FILE@@GLIBCXX_3.4.10
++FUNC:_ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEEC2EP8_IO_FILE@@GLIBCXX_3.4.10
++FUNC:_ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEED0Ev@@GLIBCXX_3.4.10
++FUNC:_ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEED1Ev@@GLIBCXX_3.4.10
++FUNC:_ZN9__gnu_cxx27__verbose_terminate_handlerEv@@CXXABI_1.3
++FUNC:_ZN9__gnu_cxx6__poolILb0EE10_M_destroyEv@@GLIBCXX_3.4.4
++FUNC:_ZN9__gnu_cxx6__poolILb0EE13_M_initializeEv@@GLIBCXX_3.4.4
++FUNC:_ZN9__gnu_cxx6__poolILb0EE16_M_reclaim_blockEPcj@@GLIBCXX_3.4.4
++FUNC:_ZN9__gnu_cxx6__poolILb0EE16_M_reserve_blockEjj@@GLIBCXX_3.4.4
++FUNC:_ZN9__gnu_cxx6__poolILb1EE10_M_destroyEv@@GLIBCXX_3.4.4
++FUNC:_ZN9__gnu_cxx6__poolILb1EE13_M_initializeEPFvPvE@@GLIBCXX_3.4.4
++FUNC:_ZN9__gnu_cxx6__poolILb1EE13_M_initializeEv@@GLIBCXX_3.4.6
++FUNC:_ZN9__gnu_cxx6__poolILb1EE16_M_get_thread_idEv@@GLIBCXX_3.4.4
++FUNC:_ZN9__gnu_cxx6__poolILb1EE16_M_reclaim_blockEPcj@@GLIBCXX_3.4.4
++FUNC:_ZN9__gnu_cxx6__poolILb1EE16_M_reserve_blockEjj@@GLIBCXX_3.4.4
++FUNC:_ZN9__gnu_cxx6__poolILb1EE21_M_destroy_thread_keyEPv@@GLIBCXX_3.4.4
++FUNC:_ZN9__gnu_cxx9free_list6_M_getEj@@GLIBCXX_3.4.4
++FUNC:_ZN9__gnu_cxx9free_list8_M_clearEv@@GLIBCXX_3.4.4
++FUNC:_ZNK10__cxxabiv117__class_type_info10__do_catchEPKSt9type_infoPPvj@@CXXABI_1.3
++FUNC:_ZNK10__cxxabiv117__class_type_info11__do_upcastEPKS0_PKvRNS0_15__upcast_resultE@@CXXABI_1.3
++FUNC:_ZNK10__cxxabiv117__class_type_info11__do_upcastEPKS0_PPv@@CXXABI_1.3
++FUNC:_ZNK10__cxxabiv117__class_type_info12__do_dyncastEiNS0_10__sub_kindEPKS0_PKvS3_S5_RNS0_16__dyncast_resultE@@CXXABI_1.3
++FUNC:_ZNK10__cxxabiv117__class_type_info20__do_find_public_srcEiPKvPKS0_S2_@@CXXABI_1.3
++FUNC:_ZNK10__cxxabiv117__pbase_type_info10__do_catchEPKSt9type_infoPPvj@@CXXABI_1.3
++FUNC:_ZNK10__cxxabiv117__pbase_type_info15__pointer_catchEPKS0_PPvj@@CXXABI_1.3
++FUNC:_ZNK10__cxxabiv119__pointer_type_info14__is_pointer_pEv@@CXXABI_1.3
++FUNC:_ZNK10__cxxabiv119__pointer_type_info15__pointer_catchEPKNS_17__pbase_type_infoEPPvj@@CXXABI_1.3
++FUNC:_ZNK10__cxxabiv120__function_type_info15__is_function_pEv@@CXXABI_1.3
++FUNC:_ZNK10__cxxabiv120__si_class_type_info11__do_upcastEPKNS_17__class_type_infoEPKvRNS1_15__upcast_resultE@@CXXABI_1.3
++FUNC:_ZNK10__cxxabiv120__si_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@@CXXABI_1.3
++FUNC:_ZNK10__cxxabiv120__si_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@@CXXABI_1.3
++FUNC:_ZNK10__cxxabiv121__vmi_class_type_info11__do_upcastEPKNS_17__class_type_infoEPKvRNS1_15__upcast_resultE@@CXXABI_1.3
++FUNC:_ZNK10__cxxabiv121__vmi_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@@CXXABI_1.3
++FUNC:_ZNK10__cxxabiv121__vmi_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@@CXXABI_1.3
++FUNC:_ZNK10__cxxabiv129__pointer_to_member_type_info15__pointer_catchEPKNS_17__pbase_type_infoEPPvj@@CXXABI_1.3
++FUNC:_ZNK11__gnu_debug16_Error_formatter10_M_messageENS_13_Debug_msg_idE@@GLIBCXX_3.4
++FUNC:_ZNK11__gnu_debug16_Error_formatter10_Parameter14_M_print_fieldEPKS0_PKc@@GLIBCXX_3.4
++FUNC:_ZNK11__gnu_debug16_Error_formatter10_Parameter20_M_print_descriptionEPKS0_@@GLIBCXX_3.4
++FUNC:_ZNK11__gnu_debug16_Error_formatter13_M_print_wordEPKc@@GLIBCXX_3.4
++FUNC:_ZNK11__gnu_debug16_Error_formatter15_M_print_stringEPKc@@GLIBCXX_3.4
++FUNC:_ZNK11__gnu_debug16_Error_formatter17_M_get_max_lengthEv@@GLIBCXX_3.4.10
++FUNC:_ZNK11__gnu_debug16_Error_formatter8_M_errorEv@@GLIBCXX_3.4
++FUNC:_ZNK11__gnu_debug19_Safe_iterator_base11_M_singularEv@@GLIBCXX_3.4
++FUNC:_ZNK11__gnu_debug19_Safe_iterator_base14_M_can_compareERKS0_@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE11_M_disjunctEPKw@@GLIBCXX_3.4.5
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE11_M_disjunctEPKw@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwj@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwjj@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofERKS2_j@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEwj@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwj@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwjj@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofERKS2_j@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEwj@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE13get_allocatorEv@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEjjPKc@@GLIBCXX_3.4.5
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEjjPKc@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwj@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwjj@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofERKS2_j@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEwj@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwj@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwjj@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofERKS2_j@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEwj@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE2atEj@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE3endEv@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE4_Rep12_M_is_leakedEv@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE4_Rep12_M_is_sharedEv@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE4backEv@@GLIBCXX_3.4.15
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE4cendEv@@GLIBCXX_3.4.14
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE4copyEPwjj@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE4dataEv@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwj@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwjj@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE4findERKS2_j@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE4findEwj@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE4rendEv@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE4sizeEv@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE5beginEv@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE5c_strEv@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE5crendEv@@GLIBCXX_3.4.14
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE5emptyEv@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE5frontEv@@GLIBCXX_3.4.15
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwj@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwjj@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE5rfindERKS2_j@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE5rfindEwj@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE6_M_repEv@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE6cbeginEv@@GLIBCXX_3.4.14
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE6lengthEv@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE6rbeginEv@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE6substrEjj@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE7_M_dataEv@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE7_M_iendEv@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE7compareEPKw@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE7compareERKS2_@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE7compareEjjPKw@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE7compareEjjPKwj@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE7compareEjjRKS2_@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE7compareEjjRKS2_jj@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE7crbeginEv@@GLIBCXX_3.4.14
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE8_M_checkEjPKc@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE8_M_limitEjj@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE8capacityEv@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE8max_sizeEv@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE9_M_ibeginEv@@GLIBCXX_3.4
++FUNC:_ZNKSbIwSt11char_traitsIwESaIwEEixEj@@GLIBCXX_3.4
++FUNC:_ZNKSi6gcountEv@@GLIBCXX_3.4
++FUNC:_ZNKSi6sentrycvbEv@@GLIBCXX_3.4
++FUNC:_ZNKSo6sentrycvbEv@@GLIBCXX_3.4
++FUNC:_ZNKSs11_M_disjunctEPKc@@GLIBCXX_3.4.5
++FUNC:_ZNKSs11_M_disjunctEPKc@GLIBCXX_3.4
++FUNC:_ZNKSs12find_last_ofEPKcj@@GLIBCXX_3.4
++FUNC:_ZNKSs12find_last_ofEPKcjj@@GLIBCXX_3.4
++FUNC:_ZNKSs12find_last_ofERKSsj@@GLIBCXX_3.4
++FUNC:_ZNKSs12find_last_ofEcj@@GLIBCXX_3.4
++FUNC:_ZNKSs13find_first_ofEPKcj@@GLIBCXX_3.4
++FUNC:_ZNKSs13find_first_ofEPKcjj@@GLIBCXX_3.4
++FUNC:_ZNKSs13find_first_ofERKSsj@@GLIBCXX_3.4
++FUNC:_ZNKSs13find_first_ofEcj@@GLIBCXX_3.4
++FUNC:_ZNKSs13get_allocatorEv@@GLIBCXX_3.4
++FUNC:_ZNKSs15_M_check_lengthEjjPKc@@GLIBCXX_3.4.5
++FUNC:_ZNKSs15_M_check_lengthEjjPKc@GLIBCXX_3.4
++FUNC:_ZNKSs16find_last_not_ofEPKcj@@GLIBCXX_3.4
++FUNC:_ZNKSs16find_last_not_ofEPKcjj@@GLIBCXX_3.4
++FUNC:_ZNKSs16find_last_not_ofERKSsj@@GLIBCXX_3.4
++FUNC:_ZNKSs16find_last_not_ofEcj@@GLIBCXX_3.4
++FUNC:_ZNKSs17find_first_not_ofEPKcj@@GLIBCXX_3.4
++FUNC:_ZNKSs17find_first_not_ofEPKcjj@@GLIBCXX_3.4
++FUNC:_ZNKSs17find_first_not_ofERKSsj@@GLIBCXX_3.4
++FUNC:_ZNKSs17find_first_not_ofEcj@@GLIBCXX_3.4
++FUNC:_ZNKSs2atEj@@GLIBCXX_3.4
++FUNC:_ZNKSs3endEv@@GLIBCXX_3.4
++FUNC:_ZNKSs4_Rep12_M_is_leakedEv@@GLIBCXX_3.4
++FUNC:_ZNKSs4_Rep12_M_is_sharedEv@@GLIBCXX_3.4
++FUNC:_ZNKSs4backEv@@GLIBCXX_3.4.15
++FUNC:_ZNKSs4cendEv@@GLIBCXX_3.4.14
++FUNC:_ZNKSs4copyEPcjj@@GLIBCXX_3.4
++FUNC:_ZNKSs4dataEv@@GLIBCXX_3.4
++FUNC:_ZNKSs4findEPKcj@@GLIBCXX_3.4
++FUNC:_ZNKSs4findEPKcjj@@GLIBCXX_3.4
++FUNC:_ZNKSs4findERKSsj@@GLIBCXX_3.4
++FUNC:_ZNKSs4findEcj@@GLIBCXX_3.4
++FUNC:_ZNKSs4rendEv@@GLIBCXX_3.4
++FUNC:_ZNKSs4sizeEv@@GLIBCXX_3.4
++FUNC:_ZNKSs5beginEv@@GLIBCXX_3.4
++FUNC:_ZNKSs5c_strEv@@GLIBCXX_3.4
++FUNC:_ZNKSs5crendEv@@GLIBCXX_3.4.14
++FUNC:_ZNKSs5emptyEv@@GLIBCXX_3.4
++FUNC:_ZNKSs5frontEv@@GLIBCXX_3.4.15
++FUNC:_ZNKSs5rfindEPKcj@@GLIBCXX_3.4
++FUNC:_ZNKSs5rfindEPKcjj@@GLIBCXX_3.4
++FUNC:_ZNKSs5rfindERKSsj@@GLIBCXX_3.4
++FUNC:_ZNKSs5rfindEcj@@GLIBCXX_3.4
++FUNC:_ZNKSs6_M_repEv@@GLIBCXX_3.4
++FUNC:_ZNKSs6cbeginEv@@GLIBCXX_3.4.14
++FUNC:_ZNKSs6lengthEv@@GLIBCXX_3.4
++FUNC:_ZNKSs6rbeginEv@@GLIBCXX_3.4
++FUNC:_ZNKSs6substrEjj@@GLIBCXX_3.4
++FUNC:_ZNKSs7_M_dataEv@@GLIBCXX_3.4
++FUNC:_ZNKSs7_M_iendEv@@GLIBCXX_3.4
++FUNC:_ZNKSs7compareEPKc@@GLIBCXX_3.4
++FUNC:_ZNKSs7compareERKSs@@GLIBCXX_3.4
++FUNC:_ZNKSs7compareEjjPKc@@GLIBCXX_3.4
++FUNC:_ZNKSs7compareEjjPKcj@@GLIBCXX_3.4
++FUNC:_ZNKSs7compareEjjRKSs@@GLIBCXX_3.4
++FUNC:_ZNKSs7compareEjjRKSsjj@@GLIBCXX_3.4
++FUNC:_ZNKSs7crbeginEv@@GLIBCXX_3.4.14
++FUNC:_ZNKSs8_M_checkEjPKc@@GLIBCXX_3.4
++FUNC:_ZNKSs8_M_limitEjj@@GLIBCXX_3.4
++FUNC:_ZNKSs8capacityEv@@GLIBCXX_3.4
++FUNC:_ZNKSs8max_sizeEv@@GLIBCXX_3.4
++FUNC:_ZNKSs9_M_ibeginEv@@GLIBCXX_3.4
++FUNC:_ZNKSsixEj@@GLIBCXX_3.4
++FUNC:_ZNKSt10bad_typeid4whatEv@@GLIBCXX_3.4.9
++FUNC:_ZNKSt10error_code23default_error_conditionEv@@GLIBCXX_3.4.11
++FUNC:_ZNKSt10istrstream5rdbufEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10lock_error4whatEv@@GLIBCXX_3.4.11
++FUNC:_ZNKSt10moneypunctIcLb0EE10neg_formatEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb0EE10pos_formatEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb0EE11curr_symbolEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb0EE11do_groupingEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb0EE11frac_digitsEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb0EE13decimal_pointEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb0EE13do_neg_formatEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb0EE13do_pos_formatEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb0EE13negative_signEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb0EE13positive_signEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb0EE13thousands_sepEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb0EE14do_curr_symbolEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb0EE14do_frac_digitsEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb0EE16do_decimal_pointEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb0EE16do_negative_signEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb0EE16do_positive_signEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb0EE16do_thousands_sepEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb0EE8groupingEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb1EE10neg_formatEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb1EE10pos_formatEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb1EE11curr_symbolEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb1EE11do_groupingEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb1EE11frac_digitsEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb1EE13decimal_pointEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb1EE13do_neg_formatEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb1EE13do_pos_formatEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb1EE13negative_signEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb1EE13positive_signEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb1EE13thousands_sepEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb1EE14do_curr_symbolEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb1EE14do_frac_digitsEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb1EE16do_decimal_pointEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb1EE16do_negative_signEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb1EE16do_positive_signEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb1EE16do_thousands_sepEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIcLb1EE8groupingEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb0EE10neg_formatEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb0EE10pos_formatEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb0EE11curr_symbolEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb0EE11do_groupingEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb0EE11frac_digitsEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb0EE13decimal_pointEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb0EE13do_neg_formatEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb0EE13do_pos_formatEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb0EE13negative_signEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb0EE13positive_signEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb0EE13thousands_sepEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb0EE14do_curr_symbolEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb0EE14do_frac_digitsEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb0EE16do_decimal_pointEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb0EE16do_negative_signEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb0EE16do_positive_signEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb0EE16do_thousands_sepEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb0EE8groupingEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb1EE10neg_formatEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb1EE10pos_formatEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb1EE11curr_symbolEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb1EE11do_groupingEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb1EE11frac_digitsEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb1EE13decimal_pointEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb1EE13do_neg_formatEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb1EE13do_pos_formatEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb1EE13negative_signEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb1EE13positive_signEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb1EE13thousands_sepEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb1EE14do_curr_symbolEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb1EE14do_frac_digitsEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb1EE16do_decimal_pointEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb1EE16do_negative_signEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb1EE16do_positive_signEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb1EE16do_thousands_sepEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10moneypunctIwLb1EE8groupingEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10ostrstream5rdbufEv@@GLIBCXX_3.4
++FUNC:_ZNKSt10ostrstream6pcountEv@@GLIBCXX_3.4
++FUNC:_ZNKSt11__timepunctIcE15_M_am_pm_formatEPKc@@GLIBCXX_3.4
++FUNC:_ZNKSt11__timepunctIcE15_M_date_formatsEPPKc@@GLIBCXX_3.4
++FUNC:_ZNKSt11__timepunctIcE15_M_time_formatsEPPKc@@GLIBCXX_3.4
++FUNC:_ZNKSt11__timepunctIcE19_M_days_abbreviatedEPPKc@@GLIBCXX_3.4
++FUNC:_ZNKSt11__timepunctIcE20_M_date_time_formatsEPPKc@@GLIBCXX_3.4
++FUNC:_ZNKSt11__timepunctIcE21_M_months_abbreviatedEPPKc@@GLIBCXX_3.4
++FUNC:_ZNKSt11__timepunctIcE6_M_putEPcjPKcPK2tm@@GLIBCXX_3.4
++FUNC:_ZNKSt11__timepunctIcE7_M_daysEPPKc@@GLIBCXX_3.4
++FUNC:_ZNKSt11__timepunctIcE8_M_am_pmEPPKc@@GLIBCXX_3.4
++FUNC:_ZNKSt11__timepunctIcE9_M_monthsEPPKc@@GLIBCXX_3.4
++FUNC:_ZNKSt11__timepunctIwE15_M_am_pm_formatEPKw@@GLIBCXX_3.4
++FUNC:_ZNKSt11__timepunctIwE15_M_date_formatsEPPKw@@GLIBCXX_3.4
++FUNC:_ZNKSt11__timepunctIwE15_M_time_formatsEPPKw@@GLIBCXX_3.4
++FUNC:_ZNKSt11__timepunctIwE19_M_days_abbreviatedEPPKw@@GLIBCXX_3.4
++FUNC:_ZNKSt11__timepunctIwE20_M_date_time_formatsEPPKw@@GLIBCXX_3.4
++FUNC:_ZNKSt11__timepunctIwE21_M_months_abbreviatedEPPKw@@GLIBCXX_3.4
++FUNC:_ZNKSt11__timepunctIwE6_M_putEPwjPKwPK2tm@@GLIBCXX_3.4
++FUNC:_ZNKSt11__timepunctIwE7_M_daysEPPKw@@GLIBCXX_3.4
++FUNC:_ZNKSt11__timepunctIwE8_M_am_pmEPPKw@@GLIBCXX_3.4
++FUNC:_ZNKSt11__timepunctIwE9_M_monthsEPPKw@@GLIBCXX_3.4
++FUNC:_ZNKSt11logic_error4whatEv@@GLIBCXX_3.4
++FUNC:_ZNKSt12__basic_fileIcE7is_openEv@@GLIBCXX_3.4
++FUNC:_ZNKSt12bad_weak_ptr4whatEv@@GLIBCXX_3.4.15
++FUNC:_ZNKSt12future_error4whatEv@@GLIBCXX_3.4.14
++FUNC:_ZNKSt12strstreambuf6pcountEv@@GLIBCXX_3.4
++FUNC:_ZNKSt13bad_exception4whatEv@@GLIBCXX_3.4.9
++FUNC:_ZNKSt13basic_filebufIcSt11char_traitsIcEE7is_openEv@@GLIBCXX_3.4
++FUNC:_ZNKSt13basic_filebufIwSt11char_traitsIwEE7is_openEv@@GLIBCXX_3.4
++FUNC:_ZNKSt13basic_fstreamIcSt11char_traitsIcEE5rdbufEv@@GLIBCXX_3.4
++FUNC:_ZNKSt13basic_fstreamIcSt11char_traitsIcEE7is_openEv@@GLIBCXX_3.4.5
++FUNC:_ZNKSt13basic_fstreamIcSt11char_traitsIcEE7is_openEv@GLIBCXX_3.4
++FUNC:_ZNKSt13basic_fstreamIwSt11char_traitsIwEE5rdbufEv@@GLIBCXX_3.4
++FUNC:_ZNKSt13basic_fstreamIwSt11char_traitsIwEE7is_openEv@@GLIBCXX_3.4.5
++FUNC:_ZNKSt13basic_fstreamIwSt11char_traitsIwEE7is_openEv@GLIBCXX_3.4
++FUNC:_ZNKSt13basic_istreamIwSt11char_traitsIwEE6gcountEv@@GLIBCXX_3.4
++FUNC:_ZNKSt13basic_istreamIwSt11char_traitsIwEE6sentrycvbEv@@GLIBCXX_3.4
++FUNC:_ZNKSt13basic_ostreamIwSt11char_traitsIwEE6sentrycvbEv@@GLIBCXX_3.4
++FUNC:_ZNKSt13runtime_error4whatEv@@GLIBCXX_3.4
++FUNC:_ZNKSt14basic_ifstreamIcSt11char_traitsIcEE5rdbufEv@@GLIBCXX_3.4
++FUNC:_ZNKSt14basic_ifstreamIcSt11char_traitsIcEE7is_openEv@@GLIBCXX_3.4.5
++FUNC:_ZNKSt14basic_ifstreamIcSt11char_traitsIcEE7is_openEv@GLIBCXX_3.4
++FUNC:_ZNKSt14basic_ifstreamIwSt11char_traitsIwEE5rdbufEv@@GLIBCXX_3.4
++FUNC:_ZNKSt14basic_ifstreamIwSt11char_traitsIwEE7is_openEv@@GLIBCXX_3.4.5
++FUNC:_ZNKSt14basic_ifstreamIwSt11char_traitsIwEE7is_openEv@GLIBCXX_3.4
++FUNC:_ZNKSt14basic_ofstreamIcSt11char_traitsIcEE5rdbufEv@@GLIBCXX_3.4
++FUNC:_ZNKSt14basic_ofstreamIcSt11char_traitsIcEE7is_openEv@@GLIBCXX_3.4.5
++FUNC:_ZNKSt14basic_ofstreamIcSt11char_traitsIcEE7is_openEv@GLIBCXX_3.4
++FUNC:_ZNKSt14basic_ofstreamIwSt11char_traitsIwEE5rdbufEv@@GLIBCXX_3.4
++FUNC:_ZNKSt14basic_ofstreamIwSt11char_traitsIwEE7is_openEv@@GLIBCXX_3.4.5
++FUNC:_ZNKSt14basic_ofstreamIwSt11char_traitsIwEE7is_openEv@GLIBCXX_3.4
++FUNC:_ZNKSt14error_category10equivalentERKSt10error_codei@@GLIBCXX_3.4.11
++FUNC:_ZNKSt14error_category10equivalentEiRKSt15error_condition@@GLIBCXX_3.4.11
++FUNC:_ZNKSt14error_category23default_error_conditionEi@@GLIBCXX_3.4.11
++FUNC:_ZNKSt15__exception_ptr13exception_ptr20__cxa_exception_typeEv@@CXXABI_1.3.3
++FUNC:_ZNKSt15__exception_ptr13exception_ptrcvMS0_FvvEEv@@CXXABI_1.3.3
++FUNC:_ZNKSt15__exception_ptr13exception_ptrntEv@@CXXABI_1.3.3
++FUNC:_ZNKSt15basic_streambufIcSt11char_traitsIcEE4gptrEv@@GLIBCXX_3.4
++FUNC:_ZNKSt15basic_streambufIcSt11char_traitsIcEE4pptrEv@@GLIBCXX_3.4
++FUNC:_ZNKSt15basic_streambufIcSt11char_traitsIcEE5ebackEv@@GLIBCXX_3.4
++FUNC:_ZNKSt15basic_streambufIcSt11char_traitsIcEE5egptrEv@@GLIBCXX_3.4
++FUNC:_ZNKSt15basic_streambufIcSt11char_traitsIcEE5epptrEv@@GLIBCXX_3.4
++FUNC:_ZNKSt15basic_streambufIcSt11char_traitsIcEE5pbaseEv@@GLIBCXX_3.4
++FUNC:_ZNKSt15basic_streambufIcSt11char_traitsIcEE6getlocEv@@GLIBCXX_3.4
++FUNC:_ZNKSt15basic_streambufIwSt11char_traitsIwEE4gptrEv@@GLIBCXX_3.4
++FUNC:_ZNKSt15basic_streambufIwSt11char_traitsIwEE4pptrEv@@GLIBCXX_3.4
++FUNC:_ZNKSt15basic_streambufIwSt11char_traitsIwEE5ebackEv@@GLIBCXX_3.4
++FUNC:_ZNKSt15basic_streambufIwSt11char_traitsIwEE5egptrEv@@GLIBCXX_3.4
++FUNC:_ZNKSt15basic_streambufIwSt11char_traitsIwEE5epptrEv@@GLIBCXX_3.4
++FUNC:_ZNKSt15basic_streambufIwSt11char_traitsIwEE5pbaseEv@@GLIBCXX_3.4
++FUNC:_ZNKSt15basic_streambufIwSt11char_traitsIwEE6getlocEv@@GLIBCXX_3.4
++FUNC:_ZNKSt15basic_stringbufIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
++FUNC:_ZNKSt15basic_stringbufIwSt11char_traitsIwESaIwEE3strEv@@GLIBCXX_3.4
++FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
++FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE5rdbufEv@@GLIBCXX_3.4
++FUNC:_ZNKSt18basic_stringstreamIwSt11char_traitsIwESaIwEE3strEv@@GLIBCXX_3.4
++FUNC:_ZNKSt18basic_stringstreamIwSt11char_traitsIwESaIwEE5rdbufEv@@GLIBCXX_3.4
++FUNC:_ZNKSt19basic_istringstreamIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
++FUNC:_ZNKSt19basic_istringstreamIcSt11char_traitsIcESaIcEE5rdbufEv@@GLIBCXX_3.4
++FUNC:_ZNKSt19basic_istringstreamIwSt11char_traitsIwESaIwEE3strEv@@GLIBCXX_3.4
++FUNC:_ZNKSt19basic_istringstreamIwSt11char_traitsIwESaIwEE5rdbufEv@@GLIBCXX_3.4
++FUNC:_ZNKSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
++FUNC:_ZNKSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE5rdbufEv@@GLIBCXX_3.4
++FUNC:_ZNKSt19basic_ostringstreamIwSt11char_traitsIwESaIwEE3strEv@@GLIBCXX_3.4
++FUNC:_ZNKSt19basic_ostringstreamIwSt11char_traitsIwESaIwEE5rdbufEv@@GLIBCXX_3.4
++FUNC:_ZNKSt3tr14hashIRKSbIwSt11char_traitsIwESaIwEEEclES6_@@GLIBCXX_3.4.10
++FUNC:_ZNKSt3tr14hashIRKSsEclES2_@@GLIBCXX_3.4.10
++FUNC:_ZNKSt3tr14hashISbIwSt11char_traitsIwESaIwEEEclES4_@@GLIBCXX_3.4.10
++FUNC:_ZNKSt3tr14hashISsEclESs@@GLIBCXX_3.4.10
++FUNC:_ZNKSt3tr14hashIeEclEe@@GLIBCXX_3.4.10
++FUNC:_ZNKSt4hashIRKSbIwSt11char_traitsIwESaIwEEEclES5_@@GLIBCXX_3.4.10
++FUNC:_ZNKSt4hashIRKSsEclES1_@@GLIBCXX_3.4.10
++FUNC:_ZNKSt4hashISbIwSt11char_traitsIwESaIwEEEclES3_@@GLIBCXX_3.4.10
++FUNC:_ZNKSt4hashISsEclESs@@GLIBCXX_3.4.10
++FUNC:_ZNKSt4hashISt10error_codeEclES0_@@GLIBCXX_3.4.11
++FUNC:_ZNKSt4hashIeEclEe@@GLIBCXX_3.4.10
++FUNC:_ZNKSt5ctypeIcE10do_tolowerEPcPKc@@GLIBCXX_3.4
++FUNC:_ZNKSt5ctypeIcE10do_tolowerEc@@GLIBCXX_3.4
++FUNC:_ZNKSt5ctypeIcE10do_toupperEPcPKc@@GLIBCXX_3.4
++FUNC:_ZNKSt5ctypeIcE10do_toupperEc@@GLIBCXX_3.4
++FUNC:_ZNKSt5ctypeIcE13_M_widen_initEv@@GLIBCXX_3.4.11
++FUNC:_ZNKSt5ctypeIcE14_M_narrow_initEv@@GLIBCXX_3.4.11
++FUNC:_ZNKSt5ctypeIcE8do_widenEPKcS2_Pc@@GLIBCXX_3.4
++FUNC:_ZNKSt5ctypeIcE8do_widenEc@@GLIBCXX_3.4
++FUNC:_ZNKSt5ctypeIcE9do_narrowEPKcS2_cPc@@GLIBCXX_3.4
++FUNC:_ZNKSt5ctypeIcE9do_narrowEcc@@GLIBCXX_3.4
++FUNC:_ZNKSt5ctypeIwE10do_scan_isEtPKwS2_@@GLIBCXX_3.4
++FUNC:_ZNKSt5ctypeIwE10do_tolowerEPwPKw@@GLIBCXX_3.4
++FUNC:_ZNKSt5ctypeIwE10do_tolowerEw@@GLIBCXX_3.4
++FUNC:_ZNKSt5ctypeIwE10do_toupperEPwPKw@@GLIBCXX_3.4
++FUNC:_ZNKSt5ctypeIwE10do_toupperEw@@GLIBCXX_3.4
++FUNC:_ZNKSt5ctypeIwE11do_scan_notEtPKwS2_@@GLIBCXX_3.4
++FUNC:_ZNKSt5ctypeIwE19_M_convert_to_wmaskEt@@GLIBCXX_3.4
++FUNC:_ZNKSt5ctypeIwE5do_isEPKwS2_Pt@@GLIBCXX_3.4
++FUNC:_ZNKSt5ctypeIwE5do_isEtw@@GLIBCXX_3.4
++FUNC:_ZNKSt5ctypeIwE8do_widenEPKcS2_Pw@@GLIBCXX_3.4
++FUNC:_ZNKSt5ctypeIwE8do_widenEc@@GLIBCXX_3.4
++FUNC:_ZNKSt5ctypeIwE9do_narrowEPKwS2_cPc@@GLIBCXX_3.4
++FUNC:_ZNKSt5ctypeIwE9do_narrowEwc@@GLIBCXX_3.4
++FUNC:_ZNKSt6locale2id5_M_idEv@@GLIBCXX_3.4
++FUNC:_ZNKSt6locale4nameEv@@GLIBCXX_3.4
++FUNC:_ZNKSt6localeeqERKS_@@GLIBCXX_3.4
++FUNC:_ZNKSt7codecvtIcc11__mbstate_tE10do_unshiftERS0_PcS3_RS3_@@GLIBCXX_3.4
++FUNC:_ZNKSt7codecvtIcc11__mbstate_tE11do_encodingEv@@GLIBCXX_3.4
++FUNC:_ZNKSt7codecvtIcc11__mbstate_tE13do_max_lengthEv@@GLIBCXX_3.4
++FUNC:_ZNKSt7codecvtIcc11__mbstate_tE16do_always_noconvEv@@GLIBCXX_3.4
++FUNC:_ZNKSt7codecvtIcc11__mbstate_tE5do_inERS0_PKcS4_RS4_PcS6_RS6_@@GLIBCXX_3.4
++FUNC:_ZNKSt7codecvtIcc11__mbstate_tE6do_outERS0_PKcS4_RS4_PcS6_RS6_@@GLIBCXX_3.4
++FUNC:_ZNKSt7codecvtIcc11__mbstate_tE9do_lengthERS0_PKcS4_j@@GLIBCXX_3.4
++FUNC:_ZNKSt7codecvtIwc11__mbstate_tE10do_unshiftERS0_PcS3_RS3_@@GLIBCXX_3.4
++FUNC:_ZNKSt7codecvtIwc11__mbstate_tE11do_encodingEv@@GLIBCXX_3.4
++FUNC:_ZNKSt7codecvtIwc11__mbstate_tE13do_max_lengthEv@@GLIBCXX_3.4
++FUNC:_ZNKSt7codecvtIwc11__mbstate_tE16do_always_noconvEv@@GLIBCXX_3.4
++FUNC:_ZNKSt7codecvtIwc11__mbstate_tE5do_inERS0_PKcS4_RS4_PwS6_RS6_@@GLIBCXX_3.4
++FUNC:_ZNKSt7codecvtIwc11__mbstate_tE6do_outERS0_PKwS4_RS4_PcS6_RS6_@@GLIBCXX_3.4
++FUNC:_ZNKSt7codecvtIwc11__mbstate_tE9do_lengthERS0_PKcS4_j@@GLIBCXX_3.4
++FUNC:_ZNKSt7collateIcE10_M_compareEPKcS2_@@GLIBCXX_3.4
++FUNC:_ZNKSt7collateIcE10do_compareEPKcS2_S2_S2_@@GLIBCXX_3.4
++FUNC:_ZNKSt7collateIcE12_M_transformEPcPKcj@@GLIBCXX_3.4
++FUNC:_ZNKSt7collateIcE12do_transformEPKcS2_@@GLIBCXX_3.4
++FUNC:_ZNKSt7collateIcE4hashEPKcS2_@@GLIBCXX_3.4
++FUNC:_ZNKSt7collateIcE7compareEPKcS2_S2_S2_@@GLIBCXX_3.4
++FUNC:_ZNKSt7collateIcE7do_hashEPKcS2_@@GLIBCXX_3.4
++FUNC:_ZNKSt7collateIcE9transformEPKcS2_@@GLIBCXX_3.4
++FUNC:_ZNKSt7collateIwE10_M_compareEPKwS2_@@GLIBCXX_3.4
++FUNC:_ZNKSt7collateIwE10do_compareEPKwS2_S2_S2_@@GLIBCXX_3.4
++FUNC:_ZNKSt7collateIwE12_M_transformEPwPKwj@@GLIBCXX_3.4
++FUNC:_ZNKSt7collateIwE12do_transformEPKwS2_@@GLIBCXX_3.4
++FUNC:_ZNKSt7collateIwE4hashEPKwS2_@@GLIBCXX_3.4
++FUNC:_ZNKSt7collateIwE7compareEPKwS2_S2_S2_@@GLIBCXX_3.4
++FUNC:_ZNKSt7collateIwE7do_hashEPKwS2_@@GLIBCXX_3.4
++FUNC:_ZNKSt7collateIwE9transformEPKwS2_@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIjEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRT_@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIlEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRT_@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intImEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRT_@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intItEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRT_@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIxEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRT_@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIyEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRT_@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE16_M_extract_floatES3_S3_RSt8ios_baseRSt12_Ios_IostateRSs@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRPv@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRb@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRd@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRe@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRf@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRj@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRl@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRm@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRt@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRx@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRy@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRPv@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRb@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRd@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRe@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRf@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRj@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRl@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRm@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRt@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRx@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRy@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intIjEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRT_@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intIlEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRT_@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intImEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRT_@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intItEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRT_@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intIxEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRT_@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intIyEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRT_@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE16_M_extract_floatES3_S3_RSt8ios_baseRSt12_Ios_IostateRSs@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRPv@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRb@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRd@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRe@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRf@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRj@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRl@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRm@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRt@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRx@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRy@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRPv@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRb@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRd@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRe@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRf@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRj@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRl@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRm@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRt@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRx@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRy@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE12_M_group_intEPKcjcRSt8ios_basePcS9_Ri@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE13_M_insert_intIlEES3_S3_RSt8ios_basecT_@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE13_M_insert_intImEES3_S3_RSt8ios_basecT_@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE13_M_insert_intIxEES3_S3_RSt8ios_basecT_@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE13_M_insert_intIyEES3_S3_RSt8ios_basecT_@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE14_M_group_floatEPKcjcS6_PcS7_Ri@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE15_M_insert_floatIdEES3_S3_RSt8ios_baseccT_@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE15_M_insert_floatIeEES3_S3_RSt8ios_baseccT_@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES3_RSt8ios_basecPKv@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES3_RSt8ios_basecb@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES3_RSt8ios_basecd@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES3_RSt8ios_basece@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES3_RSt8ios_basecl@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES3_RSt8ios_basecm@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES3_RSt8ios_basecx@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES3_RSt8ios_basecy@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6_M_padEciRSt8ios_basePcPKcRi@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES3_RSt8ios_basecPKv@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES3_RSt8ios_basecb@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES3_RSt8ios_basecd@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES3_RSt8ios_basece@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES3_RSt8ios_basecl@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES3_RSt8ios_basecm@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES3_RSt8ios_basecx@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES3_RSt8ios_basecy@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE12_M_group_intEPKcjwRSt8ios_basePwS9_Ri@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE13_M_insert_intIlEES3_S3_RSt8ios_basewT_@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE13_M_insert_intImEES3_S3_RSt8ios_basewT_@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE13_M_insert_intIxEES3_S3_RSt8ios_basewT_@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE13_M_insert_intIyEES3_S3_RSt8ios_basewT_@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE14_M_group_floatEPKcjwPKwPwS9_Ri@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE15_M_insert_floatIdEES3_S3_RSt8ios_basewcT_@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE15_M_insert_floatIeEES3_S3_RSt8ios_basewcT_@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES3_RSt8ios_basewPKv@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES3_RSt8ios_basewb@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES3_RSt8ios_basewd@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES3_RSt8ios_basewe@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES3_RSt8ios_basewl@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES3_RSt8ios_basewm@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES3_RSt8ios_basewx@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES3_RSt8ios_basewy@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6_M_padEwiRSt8ios_basePwPKwRi@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_RSt8ios_basewPKv@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_RSt8ios_basewb@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_RSt8ios_basewd@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_RSt8ios_basewe@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_RSt8ios_basewl@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_RSt8ios_basewm@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_RSt8ios_basewx@@GLIBCXX_3.4
++FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_RSt8ios_basewy@@GLIBCXX_3.4
++FUNC:_ZNKSt8bad_cast4whatEv@@GLIBCXX_3.4.9
++FUNC:_ZNKSt8ios_base7failure4whatEv@@GLIBCXX_3.4
++FUNC:_ZNKSt8messagesIcE18_M_convert_to_charERKSs@@GLIBCXX_3.4
++FUNC:_ZNKSt8messagesIcE20_M_convert_from_charEPc@@GLIBCXX_3.4
++FUNC:_ZNKSt8messagesIcE3getEiiiRKSs@@GLIBCXX_3.4
++FUNC:_ZNKSt8messagesIcE4openERKSsRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZNKSt8messagesIcE4openERKSsRKSt6localePKc@@GLIBCXX_3.4
++FUNC:_ZNKSt8messagesIcE5closeEi@@GLIBCXX_3.4
++FUNC:_ZNKSt8messagesIcE6do_getEiiiRKSs@@GLIBCXX_3.4
++FUNC:_ZNKSt8messagesIcE7do_openERKSsRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZNKSt8messagesIcE8do_closeEi@@GLIBCXX_3.4
++FUNC:_ZNKSt8messagesIwE18_M_convert_to_charERKSbIwSt11char_traitsIwESaIwEE@@GLIBCXX_3.4
++FUNC:_ZNKSt8messagesIwE20_M_convert_from_charEPc@@GLIBCXX_3.4
++FUNC:_ZNKSt8messagesIwE3getEiiiRKSbIwSt11char_traitsIwESaIwEE@@GLIBCXX_3.4
++FUNC:_ZNKSt8messagesIwE4openERKSsRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZNKSt8messagesIwE4openERKSsRKSt6localePKc@@GLIBCXX_3.4
++FUNC:_ZNKSt8messagesIwE5closeEi@@GLIBCXX_3.4
++FUNC:_ZNKSt8messagesIwE6do_getEiiiRKSbIwSt11char_traitsIwESaIwEE@@GLIBCXX_3.4
++FUNC:_ZNKSt8messagesIwE7do_openERKSsRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZNKSt8messagesIwE8do_closeEi@@GLIBCXX_3.4
++FUNC:_ZNKSt8numpunctIcE11do_groupingEv@@GLIBCXX_3.4
++FUNC:_ZNKSt8numpunctIcE11do_truenameEv@@GLIBCXX_3.4
++FUNC:_ZNKSt8numpunctIcE12do_falsenameEv@@GLIBCXX_3.4
++FUNC:_ZNKSt8numpunctIcE13decimal_pointEv@@GLIBCXX_3.4
++FUNC:_ZNKSt8numpunctIcE13thousands_sepEv@@GLIBCXX_3.4
++FUNC:_ZNKSt8numpunctIcE16do_decimal_pointEv@@GLIBCXX_3.4
++FUNC:_ZNKSt8numpunctIcE16do_thousands_sepEv@@GLIBCXX_3.4
++FUNC:_ZNKSt8numpunctIcE8groupingEv@@GLIBCXX_3.4
++FUNC:_ZNKSt8numpunctIcE8truenameEv@@GLIBCXX_3.4
++FUNC:_ZNKSt8numpunctIcE9falsenameEv@@GLIBCXX_3.4
++FUNC:_ZNKSt8numpunctIwE11do_groupingEv@@GLIBCXX_3.4
++FUNC:_ZNKSt8numpunctIwE11do_truenameEv@@GLIBCXX_3.4
++FUNC:_ZNKSt8numpunctIwE12do_falsenameEv@@GLIBCXX_3.4
++FUNC:_ZNKSt8numpunctIwE13decimal_pointEv@@GLIBCXX_3.4
++FUNC:_ZNKSt8numpunctIwE13thousands_sepEv@@GLIBCXX_3.4
++FUNC:_ZNKSt8numpunctIwE16do_decimal_pointEv@@GLIBCXX_3.4
++FUNC:_ZNKSt8numpunctIwE16do_thousands_sepEv@@GLIBCXX_3.4
++FUNC:_ZNKSt8numpunctIwE8groupingEv@@GLIBCXX_3.4
++FUNC:_ZNKSt8numpunctIwE8truenameEv@@GLIBCXX_3.4
++FUNC:_ZNKSt8numpunctIwE9falsenameEv@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE10date_orderEv@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE11do_get_dateES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE11do_get_timeES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE11do_get_yearES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE11get_weekdayES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE13do_date_orderEv@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE13get_monthnameES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_numES3_S3_RiiijRSt8ios_baseRSt12_Ios_Iostate@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14do_get_weekdayES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE15_M_extract_nameES3_S3_RiPPKcjRSt8ios_baseRSt12_Ios_Iostate@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE16do_get_monthnameES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE21_M_extract_via_formatES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tmPKc@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE24_M_extract_wday_or_monthES3_S3_RiPPKcjRSt8ios_baseRSt12_Ios_Iostate@@GLIBCXX_3.4.14
++FUNC:_ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE8get_dateES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE8get_timeES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE8get_yearES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE10date_orderEv@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE11do_get_dateES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE11do_get_timeES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE11do_get_yearES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE11get_weekdayES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE13do_date_orderEv@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE13get_monthnameES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_numES3_S3_RiiijRSt8ios_baseRSt12_Ios_Iostate@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14do_get_weekdayES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE15_M_extract_nameES3_S3_RiPPKwjRSt8ios_baseRSt12_Ios_Iostate@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE16do_get_monthnameES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE21_M_extract_via_formatES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tmPKw@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE24_M_extract_wday_or_monthES3_S3_RiPPKwjRSt8ios_baseRSt12_Ios_Iostate@@GLIBCXX_3.4.14
++FUNC:_ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE8get_dateES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE8get_timeES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE8get_yearES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES3_RSt8ios_basecPK2tmPKcSB_@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES3_RSt8ios_basecPK2tmcc@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES3_RSt8ios_basecPK2tmcc@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES3_RSt8ios_basewPK2tmPKwSB_@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES3_RSt8ios_basewPK2tmcc@@GLIBCXX_3.4
++FUNC:_ZNKSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_RSt8ios_basewPK2tmcc@@GLIBCXX_3.4
++FUNC:_ZNKSt8valarrayIjE4sizeEv@@GLIBCXX_3.4
++FUNC:_ZNKSt9bad_alloc4whatEv@@GLIBCXX_3.4.9
++FUNC:_ZNKSt9basic_iosIcSt11char_traitsIcEE10exceptionsEv@@GLIBCXX_3.4
++FUNC:_ZNKSt9basic_iosIcSt11char_traitsIcEE3badEv@@GLIBCXX_3.4
++FUNC:_ZNKSt9basic_iosIcSt11char_traitsIcEE3eofEv@@GLIBCXX_3.4
++FUNC:_ZNKSt9basic_iosIcSt11char_traitsIcEE3tieEv@@GLIBCXX_3.4
++FUNC:_ZNKSt9basic_iosIcSt11char_traitsIcEE4failEv@@GLIBCXX_3.4
++FUNC:_ZNKSt9basic_iosIcSt11char_traitsIcEE4fillEv@@GLIBCXX_3.4
++FUNC:_ZNKSt9basic_iosIcSt11char_traitsIcEE4goodEv@@GLIBCXX_3.4
++FUNC:_ZNKSt9basic_iosIcSt11char_traitsIcEE5rdbufEv@@GLIBCXX_3.4
++FUNC:_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc@@GLIBCXX_3.4
++FUNC:_ZNKSt9basic_iosIcSt11char_traitsIcEE6narrowEcc@@GLIBCXX_3.4
++FUNC:_ZNKSt9basic_iosIcSt11char_traitsIcEE7rdstateEv@@GLIBCXX_3.4
++FUNC:_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv@@GLIBCXX_3.4
++FUNC:_ZNKSt9basic_iosIcSt11char_traitsIcEEntEv@@GLIBCXX_3.4
++FUNC:_ZNKSt9basic_iosIwSt11char_traitsIwEE10exceptionsEv@@GLIBCXX_3.4
++FUNC:_ZNKSt9basic_iosIwSt11char_traitsIwEE3badEv@@GLIBCXX_3.4
++FUNC:_ZNKSt9basic_iosIwSt11char_traitsIwEE3eofEv@@GLIBCXX_3.4
++FUNC:_ZNKSt9basic_iosIwSt11char_traitsIwEE3tieEv@@GLIBCXX_3.4
++FUNC:_ZNKSt9basic_iosIwSt11char_traitsIwEE4failEv@@GLIBCXX_3.4
++FUNC:_ZNKSt9basic_iosIwSt11char_traitsIwEE4fillEv@@GLIBCXX_3.4
++FUNC:_ZNKSt9basic_iosIwSt11char_traitsIwEE4goodEv@@GLIBCXX_3.4
++FUNC:_ZNKSt9basic_iosIwSt11char_traitsIwEE5rdbufEv@@GLIBCXX_3.4
++FUNC:_ZNKSt9basic_iosIwSt11char_traitsIwEE5widenEc@@GLIBCXX_3.4
++FUNC:_ZNKSt9basic_iosIwSt11char_traitsIwEE6narrowEwc@@GLIBCXX_3.4
++FUNC:_ZNKSt9basic_iosIwSt11char_traitsIwEE7rdstateEv@@GLIBCXX_3.4
++FUNC:_ZNKSt9basic_iosIwSt11char_traitsIwEEcvPvEv@@GLIBCXX_3.4
++FUNC:_ZNKSt9basic_iosIwSt11char_traitsIwEEntEv@@GLIBCXX_3.4
++FUNC:_ZNKSt9exception4whatEv@@GLIBCXX_3.4
++FUNC:_ZNKSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE10_M_extractILb0EEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRSs@@GLIBCXX_3.4
++FUNC:_ZNKSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE10_M_extractILb1EEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRSs@@GLIBCXX_3.4
++FUNC:_ZNKSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES3_S3_bRSt8ios_baseRSt12_Ios_IostateRSs@@GLIBCXX_3.4
++FUNC:_ZNKSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES3_S3_bRSt8ios_baseRSt12_Ios_IostateRe@@GLIBCXX_3.4
++FUNC:_ZNKSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES3_S3_bRSt8ios_baseRSt12_Ios_IostateRSs@@GLIBCXX_3.4
++FUNC:_ZNKSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES3_S3_bRSt8ios_baseRSt12_Ios_IostateRe@@GLIBCXX_3.4
++FUNC:_ZNKSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE10_M_extractILb0EEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRSs@@GLIBCXX_3.4
++FUNC:_ZNKSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE10_M_extractILb1EEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRSs@@GLIBCXX_3.4
++FUNC:_ZNKSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES3_S3_bRSt8ios_baseRSt12_Ios_IostateRSbIwS2_SaIwEE@@GLIBCXX_3.4
++FUNC:_ZNKSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES3_S3_bRSt8ios_baseRSt12_Ios_IostateRe@@GLIBCXX_3.4
++FUNC:_ZNKSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES3_S3_bRSt8ios_baseRSt12_Ios_IostateRSbIwS2_SaIwEE@@GLIBCXX_3.4
++FUNC:_ZNKSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES3_S3_bRSt8ios_baseRSt12_Ios_IostateRe@@GLIBCXX_3.4
++FUNC:_ZNKSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES3_bRSt8ios_basecRKSs@@GLIBCXX_3.4
++FUNC:_ZNKSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES3_bRSt8ios_basece@@GLIBCXX_3.4
++FUNC:_ZNKSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES3_bRSt8ios_basecRKSs@@GLIBCXX_3.4
++FUNC:_ZNKSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES3_bRSt8ios_basece@@GLIBCXX_3.4
++FUNC:_ZNKSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE9_M_insertILb0EEES3_S3_RSt8ios_basecRKSs@@GLIBCXX_3.4
++FUNC:_ZNKSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE9_M_insertILb1EEES3_S3_RSt8ios_basecRKSs@@GLIBCXX_3.4
++FUNC:_ZNKSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES3_bRSt8ios_basewRKSbIwS2_SaIwEE@@GLIBCXX_3.4
++FUNC:_ZNKSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES3_bRSt8ios_basewe@@GLIBCXX_3.4
++FUNC:_ZNKSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_bRSt8ios_basewRKSbIwS2_SaIwEE@@GLIBCXX_3.4
++FUNC:_ZNKSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_bRSt8ios_basewe@@GLIBCXX_3.4
++FUNC:_ZNKSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE9_M_insertILb0EEES3_S3_RSt8ios_basewRKSbIwS2_SaIwEE@@GLIBCXX_3.4
++FUNC:_ZNKSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE9_M_insertILb1EEES3_S3_RSt8ios_basewRKSbIwS2_SaIwEE@@GLIBCXX_3.4
++FUNC:_ZNKSt9strstream5rdbufEv@@GLIBCXX_3.4
++FUNC:_ZNKSt9strstream6pcountEv@@GLIBCXX_3.4
++FUNC:_ZNKSt9type_info10__do_catchEPKS_PPvj@@GLIBCXX_3.4
++FUNC:_ZNKSt9type_info11__do_upcastEPKN10__cxxabiv117__class_type_infoEPPv@@GLIBCXX_3.4
++FUNC:_ZNKSt9type_info14__is_pointer_pEv@@GLIBCXX_3.4
++FUNC:_ZNKSt9type_info15__is_function_pEv@@GLIBCXX_3.4
++FUNC:_ZNSaIcEC1ERKS_@@GLIBCXX_3.4
++FUNC:_ZNSaIcEC1Ev@@GLIBCXX_3.4
++FUNC:_ZNSaIcEC2ERKS_@@GLIBCXX_3.4
++FUNC:_ZNSaIcEC2Ev@@GLIBCXX_3.4
++FUNC:_ZNSaIcED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSaIcED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSaIwEC1ERKS_@@GLIBCXX_3.4
++FUNC:_ZNSaIwEC1Ev@@GLIBCXX_3.4
++FUNC:_ZNSaIwEC2ERKS_@@GLIBCXX_3.4
++FUNC:_ZNSaIwEC2Ev@@GLIBCXX_3.4
++FUNC:_ZNSaIwED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSaIwED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE10_S_compareEjj@@GLIBCXX_3.4.16
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE12_Alloc_hiderC1EPwRKS1_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE12_Alloc_hiderC2EPwRKS1_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE12_M_leak_hardEv@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE12_S_constructEjwRKS1_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE12_S_constructIN9__gnu_cxx17__normal_iteratorIPwS2_EEEES6_T_S8_RKS1_St20forward_iterator_tag@@GLIBCXX_3.4.14
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE12_S_constructIPKwEEPwT_S7_RKS1_St20forward_iterator_tag@@GLIBCXX_3.4.14
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE12_S_constructIPwEES4_T_S5_RKS1_St20forward_iterator_tag@@GLIBCXX_3.4.14
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE12_S_empty_repEv@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE13_S_copy_charsEPwN9__gnu_cxx17__normal_iteratorIPKwS2_EES8_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE13_S_copy_charsEPwN9__gnu_cxx17__normal_iteratorIS3_S2_EES6_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE13_S_copy_charsEPwPKwS5_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE13_S_copy_charsEPwS3_S3_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE13shrink_to_fitEv@@GLIBCXX_3.4.14
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE14_M_replace_auxEjjjw@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE15_M_replace_safeEjjPKwj@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE18_S_construct_aux_2EjwRKS1_@@GLIBCXX_3.4.14
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE2atEj@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE3endEv@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE4_Rep10_M_destroyERKS1_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE4_Rep10_M_disposeERKS1_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE4_Rep10_M_refcopyEv@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE4_Rep10_M_refdataEv@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE4_Rep12_S_empty_repEv@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE4_Rep13_M_set_leakedEv@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE4_Rep15_M_set_sharableEv@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE4_Rep26_M_set_length_and_sharableEj@@GLIBCXX_3.4.5
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE4_Rep26_M_set_length_and_sharableEj@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE4_Rep7_M_grabERKS1_S5_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE4_Rep8_M_cloneERKS1_j@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE4_Rep9_S_createEjjRKS1_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE4backEv@@GLIBCXX_3.4.15
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE4rendEv@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE4swapERS2_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE5beginEv@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE5clearEv@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE5eraseEN9__gnu_cxx17__normal_iteratorIPwS2_EE@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE5eraseEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE5eraseEjj@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE5frontEv@@GLIBCXX_3.4.15
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE6appendEPKw@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE6appendEPKwj@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE6appendERKS2_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE6appendERKS2_jj@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE6appendESt16initializer_listIwE@@GLIBCXX_3.4.11
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE6appendEjw@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE6assignEOS2_@@GLIBCXX_3.4.14
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE6assignEPKw@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE6assignEPKwj@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE6assignERKS2_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE6assignERKS2_jj@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE6assignESt16initializer_listIwE@@GLIBCXX_3.4.11
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE6assignEjw@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE6insertEN9__gnu_cxx17__normal_iteratorIPwS2_EESt16initializer_listIwE@@GLIBCXX_3.4.11
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE6insertEN9__gnu_cxx17__normal_iteratorIPwS2_EEjw@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE6insertEN9__gnu_cxx17__normal_iteratorIPwS2_EEw@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE6insertEjPKw@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE6insertEjPKwj@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE6insertEjRKS2_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE6insertEjRKS2_jj@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE6insertEjjw@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE6rbeginEv@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE6resizeEj@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE6resizeEjw@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE7_M_copyEPwPKwj@@GLIBCXX_3.4.5
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE7_M_copyEPwPKwj@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE7_M_dataEPw@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE7_M_leakEv@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE7_M_moveEPwPKwj@@GLIBCXX_3.4.5
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE7_M_moveEPwPKwj@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_NS4_IPKwS2_EES9_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_PKw@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_PKwS8_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_PKwj@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_RKS2_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_S5_S5_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_S6_S6_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_St16initializer_listIwE@@GLIBCXX_3.4.11
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_jw@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE7replaceEjjPKw@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE7replaceEjjPKwj@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE7replaceEjjRKS2_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE7replaceEjjRKS2_jj@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE7replaceEjjjw@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE7reserveEj@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE9_M_assignEPwjw@@GLIBCXX_3.4.5
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE9_M_assignEPwjw@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE9_M_mutateEjjj@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE9push_backEw@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEC1EOS2_@@GLIBCXX_3.4.14
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEC1EPKwRKS1_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEC1EPKwjRKS1_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEC1ERKS1_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEC1ERKS2_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEC1ERKS2_jj@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEC1ERKS2_jjRKS1_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEC1ESt16initializer_listIwERKS1_@@GLIBCXX_3.4.11
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEC1EjwRKS1_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEC1Ev@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEC1IN9__gnu_cxx17__normal_iteratorIPwS2_EEEET_S8_RKS1_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEC1IPKwEET_S6_RKS1_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEC1IPwEET_S5_RKS1_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEC2EOS2_@@GLIBCXX_3.4.15
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEC2EPKwRKS1_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEC2EPKwjRKS1_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEC2ERKS1_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEC2ERKS2_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEC2ERKS2_jj@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEC2ERKS2_jjRKS1_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEC2ESt16initializer_listIwERKS1_@@GLIBCXX_3.4.11
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEC2EjwRKS1_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEC2Ev@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEC2IN9__gnu_cxx17__normal_iteratorIPwS2_EEEET_S8_RKS1_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEC2IPKwEET_S6_RKS1_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEC2IPwEET_S5_RKS1_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEaSEOS2_@@GLIBCXX_3.4.14
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEaSEPKw@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEaSERKS2_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEaSESt16initializer_listIwE@@GLIBCXX_3.4.11
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEaSEw@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEixEj@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEpLEPKw@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEpLERKS2_@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEpLESt16initializer_listIwE@@GLIBCXX_3.4.11
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEEpLEw@@GLIBCXX_3.4
++FUNC:_ZNSdC1EPSt15basic_streambufIcSt11char_traitsIcEE@@GLIBCXX_3.4
++FUNC:_ZNSdC1Ev@@GLIBCXX_3.4
++FUNC:_ZNSdC2EPSt15basic_streambufIcSt11char_traitsIcEE@@GLIBCXX_3.4
++FUNC:_ZNSdC2Ev@@GLIBCXX_3.4
++FUNC:_ZNSdD0Ev@@GLIBCXX_3.4
++FUNC:_ZNSdD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSdD2Ev@@GLIBCXX_3.4
++FUNC:_ZNSi10_M_extractIPvEERSiRT_@@GLIBCXX_3.4.9
++FUNC:_ZNSi10_M_extractIbEERSiRT_@@GLIBCXX_3.4.9
++FUNC:_ZNSi10_M_extractIdEERSiRT_@@GLIBCXX_3.4.9
++FUNC:_ZNSi10_M_extractIeEERSiRT_@@GLIBCXX_3.4.9
++FUNC:_ZNSi10_M_extractIfEERSiRT_@@GLIBCXX_3.4.9
++FUNC:_ZNSi10_M_extractIjEERSiRT_@@GLIBCXX_3.4.9
++FUNC:_ZNSi10_M_extractIlEERSiRT_@@GLIBCXX_3.4.9
++FUNC:_ZNSi10_M_extractImEERSiRT_@@GLIBCXX_3.4.9
++FUNC:_ZNSi10_M_extractItEERSiRT_@@GLIBCXX_3.4.9
++FUNC:_ZNSi10_M_extractIxEERSiRT_@@GLIBCXX_3.4.9
++FUNC:_ZNSi10_M_extractIyEERSiRT_@@GLIBCXX_3.4.9
++FUNC:_ZNSi3getEPci@@GLIBCXX_3.4
++FUNC:_ZNSi3getEPcic@@GLIBCXX_3.4
++FUNC:_ZNSi3getERSt15basic_streambufIcSt11char_traitsIcEE@@GLIBCXX_3.4
++FUNC:_ZNSi3getERSt15basic_streambufIcSt11char_traitsIcEEc@@GLIBCXX_3.4
++FUNC:_ZNSi3getERc@@GLIBCXX_3.4
++FUNC:_ZNSi3getEv@@GLIBCXX_3.4
++FUNC:_ZNSi4peekEv@@GLIBCXX_3.4
++FUNC:_ZNSi4readEPci@@GLIBCXX_3.4
++FUNC:_ZNSi4syncEv@@GLIBCXX_3.4
++FUNC:_ZNSi5seekgESt4fposI11__mbstate_tE@@GLIBCXX_3.4
++FUNC:_ZNSi5seekgExSt12_Ios_Seekdir@@GLIBCXX_3.4
++FUNC:_ZNSi5tellgEv@@GLIBCXX_3.4
++FUNC:_ZNSi5ungetEv@@GLIBCXX_3.4
++FUNC:_ZNSi6ignoreEi@@GLIBCXX_3.4.5
++FUNC:_ZNSi6ignoreEi@GLIBCXX_3.4
++FUNC:_ZNSi6ignoreEii@@GLIBCXX_3.4
++FUNC:_ZNSi6ignoreEv@@GLIBCXX_3.4.5
++FUNC:_ZNSi6ignoreEv@GLIBCXX_3.4
++FUNC:_ZNSi6sentryC1ERSib@@GLIBCXX_3.4
++FUNC:_ZNSi6sentryC2ERSib@@GLIBCXX_3.4
++FUNC:_ZNSi7getlineEPci@@GLIBCXX_3.4
++FUNC:_ZNSi7getlineEPcic@@GLIBCXX_3.4
++FUNC:_ZNSi7putbackEc@@GLIBCXX_3.4
++FUNC:_ZNSi8readsomeEPci@@GLIBCXX_3.4
++FUNC:_ZNSiC1EPSt15basic_streambufIcSt11char_traitsIcEE@@GLIBCXX_3.4
++FUNC:_ZNSiC1Ev@@GLIBCXX_3.4
++FUNC:_ZNSiC2EPSt15basic_streambufIcSt11char_traitsIcEE@@GLIBCXX_3.4
++FUNC:_ZNSiC2Ev@@GLIBCXX_3.4
++FUNC:_ZNSiD0Ev@@GLIBCXX_3.4
++FUNC:_ZNSiD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSiD2Ev@@GLIBCXX_3.4
++FUNC:_ZNSirsEPFRSiS_E@@GLIBCXX_3.4
++FUNC:_ZNSirsEPFRSt8ios_baseS0_E@@GLIBCXX_3.4
++FUNC:_ZNSirsEPFRSt9basic_iosIcSt11char_traitsIcEES3_E@@GLIBCXX_3.4
++FUNC:_ZNSirsEPSt15basic_streambufIcSt11char_traitsIcEE@@GLIBCXX_3.4
++FUNC:_ZNSirsERPv@@GLIBCXX_3.4
++FUNC:_ZNSirsERb@@GLIBCXX_3.4
++FUNC:_ZNSirsERd@@GLIBCXX_3.4
++FUNC:_ZNSirsERe@@GLIBCXX_3.4
++FUNC:_ZNSirsERf@@GLIBCXX_3.4
++FUNC:_ZNSirsERi@@GLIBCXX_3.4
++FUNC:_ZNSirsERj@@GLIBCXX_3.4
++FUNC:_ZNSirsERl@@GLIBCXX_3.4
++FUNC:_ZNSirsERm@@GLIBCXX_3.4
++FUNC:_ZNSirsERs@@GLIBCXX_3.4
++FUNC:_ZNSirsERt@@GLIBCXX_3.4
++FUNC:_ZNSirsERx@@GLIBCXX_3.4
++FUNC:_ZNSirsERy@@GLIBCXX_3.4
++FUNC:_ZNSo3putEc@@GLIBCXX_3.4
++FUNC:_ZNSo5flushEv@@GLIBCXX_3.4
++FUNC:_ZNSo5seekpESt4fposI11__mbstate_tE@@GLIBCXX_3.4
++FUNC:_ZNSo5seekpExSt12_Ios_Seekdir@@GLIBCXX_3.4
++FUNC:_ZNSo5tellpEv@@GLIBCXX_3.4
++FUNC:_ZNSo5writeEPKci@@GLIBCXX_3.4
++FUNC:_ZNSo6sentryC1ERSo@@GLIBCXX_3.4
++FUNC:_ZNSo6sentryC2ERSo@@GLIBCXX_3.4
++FUNC:_ZNSo6sentryD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSo6sentryD2Ev@@GLIBCXX_3.4
++FUNC:_ZNSo8_M_writeEPKci@@GLIBCXX_3.4
++FUNC:_ZNSo9_M_insertIPKvEERSoT_@@GLIBCXX_3.4.9
++FUNC:_ZNSo9_M_insertIbEERSoT_@@GLIBCXX_3.4.9
++FUNC:_ZNSo9_M_insertIdEERSoT_@@GLIBCXX_3.4.9
++FUNC:_ZNSo9_M_insertIeEERSoT_@@GLIBCXX_3.4.9
++FUNC:_ZNSo9_M_insertIlEERSoT_@@GLIBCXX_3.4.9
++FUNC:_ZNSo9_M_insertImEERSoT_@@GLIBCXX_3.4.9
++FUNC:_ZNSo9_M_insertIxEERSoT_@@GLIBCXX_3.4.9
++FUNC:_ZNSo9_M_insertIyEERSoT_@@GLIBCXX_3.4.9
++FUNC:_ZNSoC1EPSt15basic_streambufIcSt11char_traitsIcEE@@GLIBCXX_3.4
++FUNC:_ZNSoC1Ev@@GLIBCXX_3.4
++FUNC:_ZNSoC2EPSt15basic_streambufIcSt11char_traitsIcEE@@GLIBCXX_3.4
++FUNC:_ZNSoC2Ev@@GLIBCXX_3.4
++FUNC:_ZNSoD0Ev@@GLIBCXX_3.4
++FUNC:_ZNSoD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSoD2Ev@@GLIBCXX_3.4
++FUNC:_ZNSolsEPFRSoS_E@@GLIBCXX_3.4
++FUNC:_ZNSolsEPFRSt8ios_baseS0_E@@GLIBCXX_3.4
++FUNC:_ZNSolsEPFRSt9basic_iosIcSt11char_traitsIcEES3_E@@GLIBCXX_3.4
++FUNC:_ZNSolsEPKv@@GLIBCXX_3.4
++FUNC:_ZNSolsEPSt15basic_streambufIcSt11char_traitsIcEE@@GLIBCXX_3.4
++FUNC:_ZNSolsEb@@GLIBCXX_3.4
++FUNC:_ZNSolsEd@@GLIBCXX_3.4
++FUNC:_ZNSolsEe@@GLIBCXX_3.4
++FUNC:_ZNSolsEf@@GLIBCXX_3.4
++FUNC:_ZNSolsEi@@GLIBCXX_3.4
++FUNC:_ZNSolsEj@@GLIBCXX_3.4
++FUNC:_ZNSolsEl@@GLIBCXX_3.4
++FUNC:_ZNSolsEm@@GLIBCXX_3.4
++FUNC:_ZNSolsEs@@GLIBCXX_3.4
++FUNC:_ZNSolsEt@@GLIBCXX_3.4
++FUNC:_ZNSolsEx@@GLIBCXX_3.4
++FUNC:_ZNSolsEy@@GLIBCXX_3.4
++FUNC:_ZNSs10_S_compareEjj@@GLIBCXX_3.4.16
++FUNC:_ZNSs12_Alloc_hiderC1EPcRKSaIcE@@GLIBCXX_3.4
++FUNC:_ZNSs12_Alloc_hiderC2EPcRKSaIcE@@GLIBCXX_3.4
++FUNC:_ZNSs12_M_leak_hardEv@@GLIBCXX_3.4
++FUNC:_ZNSs12_S_constructEjcRKSaIcE@@GLIBCXX_3.4
++FUNC:_ZNSs12_S_constructIN9__gnu_cxx17__normal_iteratorIPcSsEEEES2_T_S4_RKSaIcESt20forward_iterator_tag@@GLIBCXX_3.4.14
++FUNC:_ZNSs12_S_constructIPKcEEPcT_S3_RKSaIcESt20forward_iterator_tag@@GLIBCXX_3.4.14
++FUNC:_ZNSs12_S_constructIPcEES0_T_S1_RKSaIcESt20forward_iterator_tag@@GLIBCXX_3.4.14
++FUNC:_ZNSs12_S_empty_repEv@@GLIBCXX_3.4
++FUNC:_ZNSs13_S_copy_charsEPcN9__gnu_cxx17__normal_iteratorIPKcSsEES4_@@GLIBCXX_3.4
++FUNC:_ZNSs13_S_copy_charsEPcN9__gnu_cxx17__normal_iteratorIS_SsEES2_@@GLIBCXX_3.4
++FUNC:_ZNSs13_S_copy_charsEPcPKcS1_@@GLIBCXX_3.4
++FUNC:_ZNSs13_S_copy_charsEPcS_S_@@GLIBCXX_3.4
++FUNC:_ZNSs13shrink_to_fitEv@@GLIBCXX_3.4.14
++FUNC:_ZNSs14_M_replace_auxEjjjc@@GLIBCXX_3.4
++FUNC:_ZNSs15_M_replace_safeEjjPKcj@@GLIBCXX_3.4
++FUNC:_ZNSs18_S_construct_aux_2EjcRKSaIcE@@GLIBCXX_3.4.14
++FUNC:_ZNSs2atEj@@GLIBCXX_3.4
++FUNC:_ZNSs3endEv@@GLIBCXX_3.4
++FUNC:_ZNSs4_Rep10_M_destroyERKSaIcE@@GLIBCXX_3.4
++FUNC:_ZNSs4_Rep10_M_disposeERKSaIcE@@GLIBCXX_3.4
++FUNC:_ZNSs4_Rep10_M_refcopyEv@@GLIBCXX_3.4
++FUNC:_ZNSs4_Rep10_M_refdataEv@@GLIBCXX_3.4
++FUNC:_ZNSs4_Rep12_S_empty_repEv@@GLIBCXX_3.4
++FUNC:_ZNSs4_Rep13_M_set_leakedEv@@GLIBCXX_3.4
++FUNC:_ZNSs4_Rep15_M_set_sharableEv@@GLIBCXX_3.4
++FUNC:_ZNSs4_Rep26_M_set_length_and_sharableEj@@GLIBCXX_3.4.5
++FUNC:_ZNSs4_Rep26_M_set_length_and_sharableEj@GLIBCXX_3.4
++FUNC:_ZNSs4_Rep7_M_grabERKSaIcES2_@@GLIBCXX_3.4
++FUNC:_ZNSs4_Rep8_M_cloneERKSaIcEj@@GLIBCXX_3.4
++FUNC:_ZNSs4_Rep9_S_createEjjRKSaIcE@@GLIBCXX_3.4
++FUNC:_ZNSs4backEv@@GLIBCXX_3.4.15
++FUNC:_ZNSs4rendEv@@GLIBCXX_3.4
++FUNC:_ZNSs4swapERSs@@GLIBCXX_3.4
++FUNC:_ZNSs5beginEv@@GLIBCXX_3.4
++FUNC:_ZNSs5clearEv@@GLIBCXX_3.4
++FUNC:_ZNSs5eraseEN9__gnu_cxx17__normal_iteratorIPcSsEE@@GLIBCXX_3.4
++FUNC:_ZNSs5eraseEN9__gnu_cxx17__normal_iteratorIPcSsEES2_@@GLIBCXX_3.4
++FUNC:_ZNSs5eraseEjj@@GLIBCXX_3.4
++FUNC:_ZNSs5frontEv@@GLIBCXX_3.4.15
++FUNC:_ZNSs6appendEPKc@@GLIBCXX_3.4
++FUNC:_ZNSs6appendEPKcj@@GLIBCXX_3.4
++FUNC:_ZNSs6appendERKSs@@GLIBCXX_3.4
++FUNC:_ZNSs6appendERKSsjj@@GLIBCXX_3.4
++FUNC:_ZNSs6appendESt16initializer_listIcE@@GLIBCXX_3.4.11
++FUNC:_ZNSs6appendEjc@@GLIBCXX_3.4
++FUNC:_ZNSs6assignEOSs@@GLIBCXX_3.4.14
++FUNC:_ZNSs6assignEPKc@@GLIBCXX_3.4
++FUNC:_ZNSs6assignEPKcj@@GLIBCXX_3.4
++FUNC:_ZNSs6assignERKSs@@GLIBCXX_3.4
++FUNC:_ZNSs6assignERKSsjj@@GLIBCXX_3.4
++FUNC:_ZNSs6assignESt16initializer_listIcE@@GLIBCXX_3.4.11
++FUNC:_ZNSs6assignEjc@@GLIBCXX_3.4
++FUNC:_ZNSs6insertEN9__gnu_cxx17__normal_iteratorIPcSsEESt16initializer_listIcE@@GLIBCXX_3.4.11
++FUNC:_ZNSs6insertEN9__gnu_cxx17__normal_iteratorIPcSsEEc@@GLIBCXX_3.4
++FUNC:_ZNSs6insertEN9__gnu_cxx17__normal_iteratorIPcSsEEjc@@GLIBCXX_3.4
++FUNC:_ZNSs6insertEjPKc@@GLIBCXX_3.4
++FUNC:_ZNSs6insertEjPKcj@@GLIBCXX_3.4
++FUNC:_ZNSs6insertEjRKSs@@GLIBCXX_3.4
++FUNC:_ZNSs6insertEjRKSsjj@@GLIBCXX_3.4
++FUNC:_ZNSs6insertEjjc@@GLIBCXX_3.4
++FUNC:_ZNSs6rbeginEv@@GLIBCXX_3.4
++FUNC:_ZNSs6resizeEj@@GLIBCXX_3.4
++FUNC:_ZNSs6resizeEjc@@GLIBCXX_3.4
++FUNC:_ZNSs7_M_copyEPcPKcj@@GLIBCXX_3.4.5
++FUNC:_ZNSs7_M_copyEPcPKcj@GLIBCXX_3.4
++FUNC:_ZNSs7_M_dataEPc@@GLIBCXX_3.4
++FUNC:_ZNSs7_M_leakEv@@GLIBCXX_3.4
++FUNC:_ZNSs7_M_moveEPcPKcj@@GLIBCXX_3.4.5
++FUNC:_ZNSs7_M_moveEPcPKcj@GLIBCXX_3.4
++FUNC:_ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_NS0_IPKcSsEES5_@@GLIBCXX_3.4
++FUNC:_ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_PKc@@GLIBCXX_3.4
++FUNC:_ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_PKcS4_@@GLIBCXX_3.4
++FUNC:_ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_PKcj@@GLIBCXX_3.4
++FUNC:_ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_RKSs@@GLIBCXX_3.4
++FUNC:_ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_S1_S1_@@GLIBCXX_3.4
++FUNC:_ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_S2_S2_@@GLIBCXX_3.4
++FUNC:_ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_St16initializer_listIcE@@GLIBCXX_3.4.11
++FUNC:_ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_jc@@GLIBCXX_3.4
++FUNC:_ZNSs7replaceEjjPKc@@GLIBCXX_3.4
++FUNC:_ZNSs7replaceEjjPKcj@@GLIBCXX_3.4
++FUNC:_ZNSs7replaceEjjRKSs@@GLIBCXX_3.4
++FUNC:_ZNSs7replaceEjjRKSsjj@@GLIBCXX_3.4
++FUNC:_ZNSs7replaceEjjjc@@GLIBCXX_3.4
++FUNC:_ZNSs7reserveEj@@GLIBCXX_3.4
++FUNC:_ZNSs9_M_assignEPcjc@@GLIBCXX_3.4.5
++FUNC:_ZNSs9_M_assignEPcjc@GLIBCXX_3.4
++FUNC:_ZNSs9_M_mutateEjjj@@GLIBCXX_3.4
++FUNC:_ZNSs9push_backEc@@GLIBCXX_3.4
++FUNC:_ZNSsC1EOSs@@GLIBCXX_3.4.14
++FUNC:_ZNSsC1EPKcRKSaIcE@@GLIBCXX_3.4
++FUNC:_ZNSsC1EPKcjRKSaIcE@@GLIBCXX_3.4
++FUNC:_ZNSsC1ERKSaIcE@@GLIBCXX_3.4
++FUNC:_ZNSsC1ERKSs@@GLIBCXX_3.4
++FUNC:_ZNSsC1ERKSsjj@@GLIBCXX_3.4
++FUNC:_ZNSsC1ERKSsjjRKSaIcE@@GLIBCXX_3.4
++FUNC:_ZNSsC1ESt16initializer_listIcERKSaIcE@@GLIBCXX_3.4.11
++FUNC:_ZNSsC1EjcRKSaIcE@@GLIBCXX_3.4
++FUNC:_ZNSsC1Ev@@GLIBCXX_3.4
++FUNC:_ZNSsC1IN9__gnu_cxx17__normal_iteratorIPcSsEEEET_S4_RKSaIcE@@GLIBCXX_3.4
++FUNC:_ZNSsC1IPKcEET_S2_RKSaIcE@@GLIBCXX_3.4
++FUNC:_ZNSsC1IPcEET_S1_RKSaIcE@@GLIBCXX_3.4
++FUNC:_ZNSsC2EOSs@@GLIBCXX_3.4.15
++FUNC:_ZNSsC2EPKcRKSaIcE@@GLIBCXX_3.4
++FUNC:_ZNSsC2EPKcjRKSaIcE@@GLIBCXX_3.4
++FUNC:_ZNSsC2ERKSaIcE@@GLIBCXX_3.4
++FUNC:_ZNSsC2ERKSs@@GLIBCXX_3.4
++FUNC:_ZNSsC2ERKSsjj@@GLIBCXX_3.4
++FUNC:_ZNSsC2ERKSsjjRKSaIcE@@GLIBCXX_3.4
++FUNC:_ZNSsC2ESt16initializer_listIcERKSaIcE@@GLIBCXX_3.4.11
++FUNC:_ZNSsC2EjcRKSaIcE@@GLIBCXX_3.4
++FUNC:_ZNSsC2Ev@@GLIBCXX_3.4
++FUNC:_ZNSsC2IN9__gnu_cxx17__normal_iteratorIPcSsEEEET_S4_RKSaIcE@@GLIBCXX_3.4
++FUNC:_ZNSsC2IPKcEET_S2_RKSaIcE@@GLIBCXX_3.4
++FUNC:_ZNSsC2IPcEET_S1_RKSaIcE@@GLIBCXX_3.4
++FUNC:_ZNSsD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSsD2Ev@@GLIBCXX_3.4
++FUNC:_ZNSsaSEOSs@@GLIBCXX_3.4.14
++FUNC:_ZNSsaSEPKc@@GLIBCXX_3.4
++FUNC:_ZNSsaSERKSs@@GLIBCXX_3.4
++FUNC:_ZNSsaSESt16initializer_listIcE@@GLIBCXX_3.4.11
++FUNC:_ZNSsaSEc@@GLIBCXX_3.4
++FUNC:_ZNSsixEj@@GLIBCXX_3.4
++FUNC:_ZNSspLEPKc@@GLIBCXX_3.4
++FUNC:_ZNSspLERKSs@@GLIBCXX_3.4
++FUNC:_ZNSspLESt16initializer_listIcE@@GLIBCXX_3.4.11
++FUNC:_ZNSspLEc@@GLIBCXX_3.4
++FUNC:_ZNSt10__num_base15_S_format_floatERKSt8ios_basePcc@@GLIBCXX_3.4
++FUNC:_ZNSt10bad_typeidD0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt10bad_typeidD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt10bad_typeidD2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt10istrstream3strEv@@GLIBCXX_3.4
++FUNC:_ZNSt10istrstreamC1EPKc@@GLIBCXX_3.4
++FUNC:_ZNSt10istrstreamC1EPKci@@GLIBCXX_3.4
++FUNC:_ZNSt10istrstreamC1EPc@@GLIBCXX_3.4
++FUNC:_ZNSt10istrstreamC1EPci@@GLIBCXX_3.4
++FUNC:_ZNSt10istrstreamC2EPKc@@GLIBCXX_3.4
++FUNC:_ZNSt10istrstreamC2EPKci@@GLIBCXX_3.4
++FUNC:_ZNSt10istrstreamC2EPc@@GLIBCXX_3.4
++FUNC:_ZNSt10istrstreamC2EPci@@GLIBCXX_3.4
++FUNC:_ZNSt10istrstreamD0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt10istrstreamD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt10istrstreamD2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt10money_base20_S_construct_patternEccc@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIcLb0EE24_M_initialize_moneypunctEP15__locale_structPKc@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIcLb0EEC1EP15__locale_structPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIcLb0EEC1EPSt18__moneypunct_cacheIcLb0EEj@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIcLb0EEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIcLb0EEC2EP15__locale_structPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIcLb0EEC2EPSt18__moneypunct_cacheIcLb0EEj@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIcLb0EEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIcLb0EED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIcLb0EED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIcLb0EED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIcLb1EE24_M_initialize_moneypunctEP15__locale_structPKc@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIcLb1EEC1EP15__locale_structPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIcLb1EEC1EPSt18__moneypunct_cacheIcLb1EEj@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIcLb1EEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIcLb1EEC2EP15__locale_structPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIcLb1EEC2EPSt18__moneypunct_cacheIcLb1EEj@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIcLb1EEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIcLb1EED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIcLb1EED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIcLb1EED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIwLb0EE24_M_initialize_moneypunctEP15__locale_structPKc@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIwLb0EEC1EP15__locale_structPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIwLb0EEC1EPSt18__moneypunct_cacheIwLb0EEj@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIwLb0EEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIwLb0EEC2EP15__locale_structPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIwLb0EEC2EPSt18__moneypunct_cacheIwLb0EEj@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIwLb0EEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIwLb0EED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIwLb0EED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIwLb0EED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIwLb1EE24_M_initialize_moneypunctEP15__locale_structPKc@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIwLb1EEC1EP15__locale_structPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIwLb1EEC1EPSt18__moneypunct_cacheIwLb1EEj@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIwLb1EEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIwLb1EEC2EP15__locale_structPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIwLb1EEC2EPSt18__moneypunct_cacheIwLb1EEj@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIwLb1EEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIwLb1EED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIwLb1EED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt10moneypunctIwLb1EED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt10ostrstream3strEv@@GLIBCXX_3.4
++FUNC:_ZNSt10ostrstream6freezeEb@@GLIBCXX_3.4
++FUNC:_ZNSt10ostrstreamC1EPciSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt10ostrstreamC1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt10ostrstreamC2EPciSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt10ostrstreamC2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt10ostrstreamD0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt10ostrstreamD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt10ostrstreamD2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt11__timepunctIcE23_M_initialize_timepunctEP15__locale_struct@@GLIBCXX_3.4
++FUNC:_ZNSt11__timepunctIcEC1EP15__locale_structPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt11__timepunctIcEC1EPSt17__timepunct_cacheIcEj@@GLIBCXX_3.4
++FUNC:_ZNSt11__timepunctIcEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt11__timepunctIcEC2EP15__locale_structPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt11__timepunctIcEC2EPSt17__timepunct_cacheIcEj@@GLIBCXX_3.4
++FUNC:_ZNSt11__timepunctIcEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt11__timepunctIcED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt11__timepunctIcED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt11__timepunctIcED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt11__timepunctIwE23_M_initialize_timepunctEP15__locale_struct@@GLIBCXX_3.4
++FUNC:_ZNSt11__timepunctIwEC1EP15__locale_structPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt11__timepunctIwEC1EPSt17__timepunct_cacheIwEj@@GLIBCXX_3.4
++FUNC:_ZNSt11__timepunctIwEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt11__timepunctIwEC2EP15__locale_structPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt11__timepunctIwEC2EPSt17__timepunct_cacheIwEj@@GLIBCXX_3.4
++FUNC:_ZNSt11__timepunctIwEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt11__timepunctIwED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt11__timepunctIwED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt11__timepunctIwED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt11char_traitsIcE2eqERKcS2_@@GLIBCXX_3.4.5
++FUNC:_ZNSt11char_traitsIcE2eqERKcS2_@GLIBCXX_3.4
++FUNC:_ZNSt11char_traitsIwE2eqERKwS2_@@GLIBCXX_3.4.5
++FUNC:_ZNSt11char_traitsIwE2eqERKwS2_@GLIBCXX_3.4
++FUNC:_ZNSt11logic_errorC1ERKSs@@GLIBCXX_3.4
++FUNC:_ZNSt11logic_errorC2ERKSs@@GLIBCXX_3.4
++FUNC:_ZNSt11logic_errorD0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt11logic_errorD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt11logic_errorD2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt11range_errorC1ERKSs@@GLIBCXX_3.4
++FUNC:_ZNSt11range_errorC2ERKSs@@GLIBCXX_3.4
++FUNC:_ZNSt11range_errorD0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt11range_errorD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt11range_errorD2Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt11regex_errorD0Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt11regex_errorD1Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt11regex_errorD2Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt12__basic_fileIcE2fdEv@@GLIBCXX_3.4
++FUNC:_ZNSt12__basic_fileIcE4fileEv@@GLIBCXX_3.4.1
++FUNC:_ZNSt12__basic_fileIcE4openEPKcSt13_Ios_Openmodei@@GLIBCXX_3.4
++FUNC:_ZNSt12__basic_fileIcE4syncEv@@GLIBCXX_3.4
++FUNC:_ZNSt12__basic_fileIcE5closeEv@@GLIBCXX_3.4
++FUNC:_ZNSt12__basic_fileIcE6xsgetnEPci@@GLIBCXX_3.4
++FUNC:_ZNSt12__basic_fileIcE6xsputnEPKci@@GLIBCXX_3.4
++FUNC:_ZNSt12__basic_fileIcE7seekoffExSt12_Ios_Seekdir@@GLIBCXX_3.4
++FUNC:_ZNSt12__basic_fileIcE8sys_openEP8_IO_FILESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt12__basic_fileIcE8sys_openEiSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt12__basic_fileIcE8xsputn_2EPKciS2_i@@GLIBCXX_3.4
++FUNC:_ZNSt12__basic_fileIcE9showmanycEv@@GLIBCXX_3.4
++FUNC:_ZNSt12__basic_fileIcEC1EP15pthread_mutex_t@@GLIBCXX_3.4
++FUNC:_ZNSt12__basic_fileIcEC2EP15pthread_mutex_t@@GLIBCXX_3.4
++FUNC:_ZNSt12__basic_fileIcED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt12__basic_fileIcED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt12bad_weak_ptrD0Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt12bad_weak_ptrD1Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt12bad_weak_ptrD2Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt12ctype_bynameIcEC1EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt12ctype_bynameIcEC2EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt12ctype_bynameIcED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt12ctype_bynameIcED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt12ctype_bynameIcED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt12ctype_bynameIwEC1EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt12ctype_bynameIwEC2EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt12ctype_bynameIwED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt12ctype_bynameIwED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt12ctype_bynameIwED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt12domain_errorC1ERKSs@@GLIBCXX_3.4
++FUNC:_ZNSt12domain_errorC2ERKSs@@GLIBCXX_3.4
++FUNC:_ZNSt12domain_errorD0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt12domain_errorD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt12domain_errorD2Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt12future_errorD0Ev@@GLIBCXX_3.4.14
++FUNC:_ZNSt12future_errorD1Ev@@GLIBCXX_3.4.14
++FUNC:_ZNSt12future_errorD2Ev@@GLIBCXX_3.4.14
++FUNC:_ZNSt12length_errorC1ERKSs@@GLIBCXX_3.4
++FUNC:_ZNSt12length_errorC2ERKSs@@GLIBCXX_3.4
++FUNC:_ZNSt12length_errorD0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt12length_errorD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt12length_errorD2Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt12out_of_rangeC1ERKSs@@GLIBCXX_3.4
++FUNC:_ZNSt12out_of_rangeC2ERKSs@@GLIBCXX_3.4
++FUNC:_ZNSt12out_of_rangeD0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt12out_of_rangeD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt12out_of_rangeD2Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt12strstreambuf3strEv@@GLIBCXX_3.4
++FUNC:_ZNSt12strstreambuf6freezeEb@@GLIBCXX_3.4
++FUNC:_ZNSt12strstreambuf6setbufEPci@@GLIBCXX_3.4
++FUNC:_ZNSt12strstreambuf7_M_freeEPc@@GLIBCXX_3.4
++FUNC:_ZNSt12strstreambuf7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt12strstreambuf7seekposESt4fposI11__mbstate_tESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt12strstreambuf8_M_allocEj@@GLIBCXX_3.4
++FUNC:_ZNSt12strstreambuf8_M_setupEPcS0_i@@GLIBCXX_3.4
++FUNC:_ZNSt12strstreambuf8overflowEi@@GLIBCXX_3.4
++FUNC:_ZNSt12strstreambuf9pbackfailEi@@GLIBCXX_3.4
++FUNC:_ZNSt12strstreambuf9underflowEv@@GLIBCXX_3.4
++FUNC:_ZNSt12strstreambufC1EPFPvjEPFvS0_E@@GLIBCXX_3.4
++FUNC:_ZNSt12strstreambufC1EPKai@@GLIBCXX_3.4
++FUNC:_ZNSt12strstreambufC1EPKci@@GLIBCXX_3.4
++FUNC:_ZNSt12strstreambufC1EPKhi@@GLIBCXX_3.4
++FUNC:_ZNSt12strstreambufC1EPaiS0_@@GLIBCXX_3.4
++FUNC:_ZNSt12strstreambufC1EPciS0_@@GLIBCXX_3.4
++FUNC:_ZNSt12strstreambufC1EPhiS0_@@GLIBCXX_3.4
++FUNC:_ZNSt12strstreambufC1Ei@@GLIBCXX_3.4
++FUNC:_ZNSt12strstreambufC2EPFPvjEPFvS0_E@@GLIBCXX_3.4
++FUNC:_ZNSt12strstreambufC2EPKai@@GLIBCXX_3.4
++FUNC:_ZNSt12strstreambufC2EPKci@@GLIBCXX_3.4
++FUNC:_ZNSt12strstreambufC2EPKhi@@GLIBCXX_3.4
++FUNC:_ZNSt12strstreambufC2EPaiS0_@@GLIBCXX_3.4
++FUNC:_ZNSt12strstreambufC2EPciS0_@@GLIBCXX_3.4
++FUNC:_ZNSt12strstreambufC2EPhiS0_@@GLIBCXX_3.4
++FUNC:_ZNSt12strstreambufC2Ei@@GLIBCXX_3.4
++FUNC:_ZNSt12strstreambufD0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt12strstreambufD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt12strstreambufD2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt12system_errorD0Ev@@GLIBCXX_3.4.11
++FUNC:_ZNSt12system_errorD1Ev@@GLIBCXX_3.4.11
++FUNC:_ZNSt12system_errorD2Ev@@GLIBCXX_3.4.11
++FUNC:_ZNSt13__future_base11_State_baseD0Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt13__future_base11_State_baseD1Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt13__future_base11_State_baseD2Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt13__future_base12_Result_baseC1Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt13__future_base12_Result_baseC2Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt13__future_base12_Result_baseD0Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt13__future_base12_Result_baseD1Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt13__future_base12_Result_baseD2Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt13bad_exceptionD0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13bad_exceptionD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13bad_exceptionD2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIcSt11char_traitsIcEE13_M_set_bufferEi@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIcSt11char_traitsIcEE14_M_get_ext_posER11__mbstate_t@@GLIBCXX_3.4.15
++FUNC:_ZNSt13basic_filebufIcSt11char_traitsIcEE15_M_create_pbackEv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIcSt11char_traitsIcEE16_M_destroy_pbackEv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIcSt11char_traitsIcEE19_M_terminate_outputEv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIcSt11char_traitsIcEE22_M_convert_to_externalEPci@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIcSt11char_traitsIcEE26_M_destroy_internal_bufferEv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIcSt11char_traitsIcEE27_M_allocate_internal_bufferEv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIcSt11char_traitsIcEE4openERKSsSt13_Ios_Openmode@@GLIBCXX_3.4.13
++FUNC:_ZNSt13basic_filebufIcSt11char_traitsIcEE4syncEv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIcSt11char_traitsIcEE5closeEv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIcSt11char_traitsIcEE5imbueERKSt6locale@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIcSt11char_traitsIcEE6setbufEPci@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIcSt11char_traitsIcEE6xsgetnEPci@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIcSt11char_traitsIcEE6xsputnEPKci@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIcSt11char_traitsIcEE7_M_seekExSt12_Ios_Seekdir11__mbstate_t@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIcSt11char_traitsIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIcSt11char_traitsIcEE7seekposESt4fposI11__mbstate_tESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIcSt11char_traitsIcEE8overflowEi@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIcSt11char_traitsIcEE9pbackfailEi@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIcSt11char_traitsIcEE9showmanycEv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIcSt11char_traitsIcEE9underflowEv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIcSt11char_traitsIcEEC1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIcSt11char_traitsIcEEC2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIcSt11char_traitsIcEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIcSt11char_traitsIcEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIwSt11char_traitsIwEE13_M_set_bufferEi@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIwSt11char_traitsIwEE14_M_get_ext_posER11__mbstate_t@@GLIBCXX_3.4.15
++FUNC:_ZNSt13basic_filebufIwSt11char_traitsIwEE15_M_create_pbackEv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIwSt11char_traitsIwEE16_M_destroy_pbackEv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIwSt11char_traitsIwEE19_M_terminate_outputEv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIwSt11char_traitsIwEE22_M_convert_to_externalEPwi@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIwSt11char_traitsIwEE26_M_destroy_internal_bufferEv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIwSt11char_traitsIwEE27_M_allocate_internal_bufferEv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIwSt11char_traitsIwEE4openEPKcSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIwSt11char_traitsIwEE4openERKSsSt13_Ios_Openmode@@GLIBCXX_3.4.13
++FUNC:_ZNSt13basic_filebufIwSt11char_traitsIwEE4syncEv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIwSt11char_traitsIwEE5closeEv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIwSt11char_traitsIwEE5imbueERKSt6locale@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIwSt11char_traitsIwEE6setbufEPwi@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIwSt11char_traitsIwEE6xsgetnEPwi@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIwSt11char_traitsIwEE6xsputnEPKwi@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIwSt11char_traitsIwEE7_M_seekExSt12_Ios_Seekdir11__mbstate_t@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIwSt11char_traitsIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIwSt11char_traitsIwEE7seekposESt4fposI11__mbstate_tESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIwSt11char_traitsIwEE8overflowEj@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIwSt11char_traitsIwEE9pbackfailEj@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIwSt11char_traitsIwEE9showmanycEv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIwSt11char_traitsIwEE9underflowEv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIwSt11char_traitsIwEEC1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIwSt11char_traitsIwEEC2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIwSt11char_traitsIwEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIwSt11char_traitsIwEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_filebufIwSt11char_traitsIwEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_fstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_fstreamIcSt11char_traitsIcEE4openERKSsSt13_Ios_Openmode@@GLIBCXX_3.4.13
++FUNC:_ZNSt13basic_fstreamIcSt11char_traitsIcEE5closeEv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_fstreamIcSt11char_traitsIcEE7is_openEv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_fstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_fstreamIcSt11char_traitsIcEEC1ERKSsSt13_Ios_Openmode@@GLIBCXX_3.4.13
++FUNC:_ZNSt13basic_fstreamIcSt11char_traitsIcEEC1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_fstreamIcSt11char_traitsIcEEC2EPKcSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_fstreamIcSt11char_traitsIcEEC2ERKSsSt13_Ios_Openmode@@GLIBCXX_3.4.13
++FUNC:_ZNSt13basic_fstreamIcSt11char_traitsIcEEC2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_fstreamIcSt11char_traitsIcEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_fstreamIcSt11char_traitsIcEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_fstreamIcSt11char_traitsIcEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_fstreamIwSt11char_traitsIwEE4openEPKcSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_fstreamIwSt11char_traitsIwEE4openERKSsSt13_Ios_Openmode@@GLIBCXX_3.4.13
++FUNC:_ZNSt13basic_fstreamIwSt11char_traitsIwEE5closeEv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_fstreamIwSt11char_traitsIwEE7is_openEv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_fstreamIwSt11char_traitsIwEEC1EPKcSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_fstreamIwSt11char_traitsIwEEC1ERKSsSt13_Ios_Openmode@@GLIBCXX_3.4.13
++FUNC:_ZNSt13basic_fstreamIwSt11char_traitsIwEEC1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_fstreamIwSt11char_traitsIwEEC2EPKcSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_fstreamIwSt11char_traitsIwEEC2ERKSsSt13_Ios_Openmode@@GLIBCXX_3.4.13
++FUNC:_ZNSt13basic_fstreamIwSt11char_traitsIwEEC2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_fstreamIwSt11char_traitsIwEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_fstreamIwSt11char_traitsIwEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_fstreamIwSt11char_traitsIwEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE10_M_extractIPvEERS2_RT_@@GLIBCXX_3.4.9
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE10_M_extractIbEERS2_RT_@@GLIBCXX_3.4.9
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE10_M_extractIdEERS2_RT_@@GLIBCXX_3.4.9
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE10_M_extractIeEERS2_RT_@@GLIBCXX_3.4.9
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE10_M_extractIfEERS2_RT_@@GLIBCXX_3.4.9
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE10_M_extractIjEERS2_RT_@@GLIBCXX_3.4.9
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE10_M_extractIlEERS2_RT_@@GLIBCXX_3.4.9
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE10_M_extractImEERS2_RT_@@GLIBCXX_3.4.9
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE10_M_extractItEERS2_RT_@@GLIBCXX_3.4.9
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE10_M_extractIxEERS2_RT_@@GLIBCXX_3.4.9
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE10_M_extractIyEERS2_RT_@@GLIBCXX_3.4.9
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE3getEPwi@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE3getEPwiw@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE3getERSt15basic_streambufIwS1_E@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE3getERSt15basic_streambufIwS1_Ew@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE3getERw@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE3getEv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE4peekEv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE4readEPwi@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE4syncEv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE5seekgESt4fposI11__mbstate_tE@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE5seekgExSt12_Ios_Seekdir@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE5tellgEv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE5ungetEv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE6ignoreEi@@GLIBCXX_3.4.5
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE6ignoreEi@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE6ignoreEij@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE6ignoreEv@@GLIBCXX_3.4.5
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE6ignoreEv@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE6sentryC1ERS2_b@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE6sentryC2ERS2_b@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE7getlineEPwi@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE7getlineEPwiw@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE7putbackEw@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEE8readsomeEPwi@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEEC1EPSt15basic_streambufIwS1_E@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEEC1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEEC2EPSt15basic_streambufIwS1_E@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEEC2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEErsEPFRS2_S3_E@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEErsEPFRSt8ios_baseS4_E@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEErsEPFRSt9basic_iosIwS1_ES5_E@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEErsEPSt15basic_streambufIwS1_E@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEErsERPv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEErsERb@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEErsERd@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEErsERe@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEErsERf@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEErsERi@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEErsERj@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEErsERl@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEErsERm@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEErsERs@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEErsERt@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEErsERx@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_istreamIwSt11char_traitsIwEErsERy@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEE3putEw@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEE5flushEv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEE5seekpESt4fposI11__mbstate_tE@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEE5seekpExSt12_Ios_Seekdir@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEE5tellpEv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEE5writeEPKwi@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEE6sentryC1ERS2_@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEE6sentryC2ERS2_@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEE6sentryD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEE6sentryD2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEE8_M_writeEPKwi@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEE9_M_insertIPKvEERS2_T_@@GLIBCXX_3.4.9
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEE9_M_insertIbEERS2_T_@@GLIBCXX_3.4.9
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEE9_M_insertIdEERS2_T_@@GLIBCXX_3.4.9
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEE9_M_insertIeEERS2_T_@@GLIBCXX_3.4.9
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEE9_M_insertIlEERS2_T_@@GLIBCXX_3.4.9
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEE9_M_insertImEERS2_T_@@GLIBCXX_3.4.9
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEE9_M_insertIxEERS2_T_@@GLIBCXX_3.4.9
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEE9_M_insertIyEERS2_T_@@GLIBCXX_3.4.9
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEEC1EPSt15basic_streambufIwS1_E@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEEC1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEEC2EPSt15basic_streambufIwS1_E@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEEC2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEElsEPFRS2_S3_E@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEElsEPFRSt8ios_baseS4_E@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEElsEPFRSt9basic_iosIwS1_ES5_E@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEElsEPKv@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEElsEPSt15basic_streambufIwS1_E@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEElsEb@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEElsEd@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEElsEe@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEElsEf@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEElsEi@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEElsEj@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEElsEl@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEElsEm@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEElsEs@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEElsEt@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEElsEx@@GLIBCXX_3.4
++FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEElsEy@@GLIBCXX_3.4
++FUNC:_ZNSt13runtime_errorC1ERKSs@@GLIBCXX_3.4
++FUNC:_ZNSt13runtime_errorC2ERKSs@@GLIBCXX_3.4
++FUNC:_ZNSt13runtime_errorD0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13runtime_errorD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt13runtime_errorD2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ifstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ifstreamIcSt11char_traitsIcEE4openERKSsSt13_Ios_Openmode@@GLIBCXX_3.4.13
++FUNC:_ZNSt14basic_ifstreamIcSt11char_traitsIcEE5closeEv@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ifstreamIcSt11char_traitsIcEE7is_openEv@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1ERKSsSt13_Ios_Openmode@@GLIBCXX_3.4.13
++FUNC:_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC2EPKcSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC2ERKSsSt13_Ios_Openmode@@GLIBCXX_3.4.13
++FUNC:_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ifstreamIcSt11char_traitsIcEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ifstreamIcSt11char_traitsIcEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ifstreamIwSt11char_traitsIwEE4openEPKcSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ifstreamIwSt11char_traitsIwEE4openERKSsSt13_Ios_Openmode@@GLIBCXX_3.4.13
++FUNC:_ZNSt14basic_ifstreamIwSt11char_traitsIwEE5closeEv@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ifstreamIwSt11char_traitsIwEE7is_openEv@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ifstreamIwSt11char_traitsIwEEC1EPKcSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ifstreamIwSt11char_traitsIwEEC1ERKSsSt13_Ios_Openmode@@GLIBCXX_3.4.13
++FUNC:_ZNSt14basic_ifstreamIwSt11char_traitsIwEEC1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ifstreamIwSt11char_traitsIwEEC2EPKcSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ifstreamIwSt11char_traitsIwEEC2ERKSsSt13_Ios_Openmode@@GLIBCXX_3.4.13
++FUNC:_ZNSt14basic_ifstreamIwSt11char_traitsIwEEC2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ifstreamIwSt11char_traitsIwEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ifstreamIwSt11char_traitsIwEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ifstreamIwSt11char_traitsIwEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_iostreamIwSt11char_traitsIwEEC1EPSt15basic_streambufIwS1_E@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_iostreamIwSt11char_traitsIwEEC1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_iostreamIwSt11char_traitsIwEEC2EPSt15basic_streambufIwS1_E@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_iostreamIwSt11char_traitsIwEEC2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_iostreamIwSt11char_traitsIwEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_iostreamIwSt11char_traitsIwEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_iostreamIwSt11char_traitsIwEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openERKSsSt13_Ios_Openmode@@GLIBCXX_3.4.13
++FUNC:_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ofstreamIcSt11char_traitsIcEE7is_openEv@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1ERKSsSt13_Ios_Openmode@@GLIBCXX_3.4.13
++FUNC:_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC2EPKcSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC2ERKSsSt13_Ios_Openmode@@GLIBCXX_3.4.13
++FUNC:_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ofstreamIcSt11char_traitsIcEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ofstreamIcSt11char_traitsIcEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ofstreamIwSt11char_traitsIwEE4openEPKcSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ofstreamIwSt11char_traitsIwEE4openERKSsSt13_Ios_Openmode@@GLIBCXX_3.4.13
++FUNC:_ZNSt14basic_ofstreamIwSt11char_traitsIwEE5closeEv@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ofstreamIwSt11char_traitsIwEE7is_openEv@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ofstreamIwSt11char_traitsIwEEC1EPKcSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ofstreamIwSt11char_traitsIwEEC1ERKSsSt13_Ios_Openmode@@GLIBCXX_3.4.13
++FUNC:_ZNSt14basic_ofstreamIwSt11char_traitsIwEEC1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ofstreamIwSt11char_traitsIwEEC2EPKcSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ofstreamIwSt11char_traitsIwEEC2ERKSsSt13_Ios_Openmode@@GLIBCXX_3.4.13
++FUNC:_ZNSt14basic_ofstreamIwSt11char_traitsIwEEC2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ofstreamIwSt11char_traitsIwEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ofstreamIwSt11char_traitsIwEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14basic_ofstreamIwSt11char_traitsIwEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14codecvt_bynameIcc11__mbstate_tEC1EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt14codecvt_bynameIcc11__mbstate_tEC2EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt14codecvt_bynameIcc11__mbstate_tED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14codecvt_bynameIcc11__mbstate_tED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14codecvt_bynameIcc11__mbstate_tED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14codecvt_bynameIwc11__mbstate_tEC1EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt14codecvt_bynameIwc11__mbstate_tEC2EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt14codecvt_bynameIwc11__mbstate_tED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14codecvt_bynameIwc11__mbstate_tED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14codecvt_bynameIwc11__mbstate_tED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14collate_bynameIcEC1EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt14collate_bynameIcEC2EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt14collate_bynameIcED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14collate_bynameIcED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14collate_bynameIcED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14collate_bynameIwEC1EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt14collate_bynameIwEC2EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt14collate_bynameIwED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14collate_bynameIwED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14collate_bynameIwED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14error_categoryC1Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt14error_categoryC2Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt14error_categoryD0Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt14error_categoryD1Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt14error_categoryD2Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt14overflow_errorC1ERKSs@@GLIBCXX_3.4
++FUNC:_ZNSt14overflow_errorC2ERKSs@@GLIBCXX_3.4
++FUNC:_ZNSt14overflow_errorD0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14overflow_errorD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt14overflow_errorD2Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt15_List_node_base10_M_reverseEv@@GLIBCXX_3.4.14
++FUNC:_ZNSt15_List_node_base11_M_transferEPS_S0_@@GLIBCXX_3.4.14
++FUNC:_ZNSt15_List_node_base4hookEPS_@@GLIBCXX_3.4
++FUNC:_ZNSt15_List_node_base4swapERS_S0_@@GLIBCXX_3.4
++FUNC:_ZNSt15_List_node_base6unhookEv@@GLIBCXX_3.4
++FUNC:_ZNSt15_List_node_base7_M_hookEPS_@@GLIBCXX_3.4.14
++FUNC:_ZNSt15_List_node_base7reverseEv@@GLIBCXX_3.4
++FUNC:_ZNSt15_List_node_base8transferEPS_S0_@@GLIBCXX_3.4
++FUNC:_ZNSt15_List_node_base9_M_unhookEv@@GLIBCXX_3.4.14
++FUNC:_ZNSt15__exception_ptr13exception_ptr4swapERS0_@@CXXABI_1.3.3
++FUNC:_ZNSt15__exception_ptr13exception_ptrC1EMS0_FvvE@@CXXABI_1.3.3
++FUNC:_ZNSt15__exception_ptr13exception_ptrC1ERKS0_@@CXXABI_1.3.3
++FUNC:_ZNSt15__exception_ptr13exception_ptrC1Ev@@CXXABI_1.3.3
++FUNC:_ZNSt15__exception_ptr13exception_ptrC2EMS0_FvvE@@CXXABI_1.3.3
++FUNC:_ZNSt15__exception_ptr13exception_ptrC2ERKS0_@@CXXABI_1.3.3
++FUNC:_ZNSt15__exception_ptr13exception_ptrC2Ev@@CXXABI_1.3.3
++FUNC:_ZNSt15__exception_ptr13exception_ptrD1Ev@@CXXABI_1.3.3
++FUNC:_ZNSt15__exception_ptr13exception_ptrD2Ev@@CXXABI_1.3.3
++FUNC:_ZNSt15__exception_ptr13exception_ptraSERKS0_@@CXXABI_1.3.3
++FUNC:_ZNSt15__exception_ptreqERKNS_13exception_ptrES2_@@CXXABI_1.3.3
++FUNC:_ZNSt15__exception_ptrneERKNS_13exception_ptrES2_@@CXXABI_1.3.3
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE10pubseekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE10pubseekposESt4fposI11__mbstate_tESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE4setgEPcS3_S3_@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE4setpEPcS3_@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE4syncEv@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE5gbumpEi@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE5imbueERKSt6locale@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE5pbumpEi@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE5sgetcEv@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE5sgetnEPci@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE5sputcEc@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE5sputnEPKci@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE5uflowEv@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE6sbumpcEv@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE6setbufEPci@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE6snextcEv@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE6stosscEv@@GLIBCXX_3.4.10
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE6xsgetnEPci@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE6xsputnEPKci@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE7pubsyncEv@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE7seekposESt4fposI11__mbstate_tESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE7sungetcEv@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE8in_availEv@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE8overflowEi@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE8pubimbueERKSt6locale@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE9pbackfailEi@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE9pubsetbufEPci@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE9showmanycEv@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE9sputbackcEc@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE9underflowEv@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEEC1ERKS2_@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEEC1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEEC2ERKS2_@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEEC2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEEaSERKS2_@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE10pubseekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE10pubseekposESt4fposI11__mbstate_tESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE4setgEPwS3_S3_@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE4setpEPwS3_@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE4syncEv@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE5gbumpEi@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE5imbueERKSt6locale@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE5pbumpEi@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE5sgetcEv@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE5sgetnEPwi@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE5sputcEw@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE5sputnEPKwi@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE5uflowEv@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE6sbumpcEv@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE6setbufEPwi@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE6snextcEv@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE6stosscEv@@GLIBCXX_3.4.10
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE6xsgetnEPwi@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE6xsputnEPKwi@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE7pubsyncEv@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE7seekposESt4fposI11__mbstate_tESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE7sungetcEv@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE8in_availEv@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE8overflowEj@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE8pubimbueERKSt6locale@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE9pbackfailEj@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE9pubsetbufEPwi@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE9showmanycEv@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE9sputbackcEw@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE9underflowEv@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEEC1ERKS2_@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEEC1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEEC2ERKS2_@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEEC2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEEaSERKS2_@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE15_M_update_egptrEv@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE17_M_stringbuf_initESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE3strERKSs@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE6setbufEPci@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE7_M_syncEPcjj@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE7seekposESt4fposI11__mbstate_tESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE8overflowEi@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE9pbackfailEi@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE9showmanycEv@@GLIBCXX_3.4.6
++FUNC:_ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE9underflowEv@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEEC1ERKSsSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEEC1ESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEEC2ERKSsSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEEC2ESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE15_M_update_egptrEv@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE17_M_stringbuf_initESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE3strERKSbIwS1_S2_E@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE6setbufEPwi@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE7_M_syncEPwjj@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE7seekposESt4fposI11__mbstate_tESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE8overflowEj@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE9pbackfailEj@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE9showmanycEv@@GLIBCXX_3.4.6
++FUNC:_ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE9underflowEv@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEEC1ERKSbIwS1_S2_ESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEEC1ESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEEC2ERKSbIwS1_S2_ESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEEC2ESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15messages_bynameIcEC1EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt15messages_bynameIcEC2EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt15messages_bynameIcED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15messages_bynameIcED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15messages_bynameIcED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15messages_bynameIwEC1EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt15messages_bynameIwEC2EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt15messages_bynameIwED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15messages_bynameIwED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15messages_bynameIwED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15numpunct_bynameIcEC1EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt15numpunct_bynameIcEC2EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt15numpunct_bynameIcED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15numpunct_bynameIcED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15numpunct_bynameIcED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15numpunct_bynameIwEC1EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt15numpunct_bynameIwEC2EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt15numpunct_bynameIwED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15numpunct_bynameIwED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15numpunct_bynameIwED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15underflow_errorC1ERKSs@@GLIBCXX_3.4
++FUNC:_ZNSt15underflow_errorC2ERKSs@@GLIBCXX_3.4
++FUNC:_ZNSt15underflow_errorD0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15underflow_errorD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt15underflow_errorD2Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt16__numpunct_cacheIcE8_M_cacheERKSt6locale@@GLIBCXX_3.4
++FUNC:_ZNSt16__numpunct_cacheIcEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt16__numpunct_cacheIcEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt16__numpunct_cacheIcED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt16__numpunct_cacheIcED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt16__numpunct_cacheIcED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt16__numpunct_cacheIwE8_M_cacheERKSt6locale@@GLIBCXX_3.4
++FUNC:_ZNSt16__numpunct_cacheIwEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt16__numpunct_cacheIwEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt16__numpunct_cacheIwED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt16__numpunct_cacheIwED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt16__numpunct_cacheIwED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt16invalid_argumentC1ERKSs@@GLIBCXX_3.4
++FUNC:_ZNSt16invalid_argumentC2ERKSs@@GLIBCXX_3.4
++FUNC:_ZNSt16invalid_argumentD0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt16invalid_argumentD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt16invalid_argumentD2Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt16nested_exceptionD0Ev@@CXXABI_1.3.5
++FUNC:_ZNSt16nested_exceptionD1Ev@@CXXABI_1.3.5
++FUNC:_ZNSt16nested_exceptionD2Ev@@CXXABI_1.3.5
++FUNC:_ZNSt17__timepunct_cacheIcEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt17__timepunct_cacheIcEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt17__timepunct_cacheIcED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt17__timepunct_cacheIcED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt17__timepunct_cacheIcED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt17__timepunct_cacheIwEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt17__timepunct_cacheIwEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt17__timepunct_cacheIwED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt17__timepunct_cacheIwED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt17__timepunct_cacheIwED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt17bad_function_callD0Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt17bad_function_callD1Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt17bad_function_callD2Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt17moneypunct_bynameIcLb0EEC1EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt17moneypunct_bynameIcLb0EEC2EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt17moneypunct_bynameIcLb0EED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt17moneypunct_bynameIcLb0EED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt17moneypunct_bynameIcLb0EED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt17moneypunct_bynameIcLb1EEC1EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt17moneypunct_bynameIcLb1EEC2EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt17moneypunct_bynameIcLb1EED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt17moneypunct_bynameIcLb1EED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt17moneypunct_bynameIcLb1EED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt17moneypunct_bynameIwLb0EEC1EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt17moneypunct_bynameIwLb0EEC2EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt17moneypunct_bynameIwLb0EED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt17moneypunct_bynameIwLb0EED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt17moneypunct_bynameIwLb0EED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt17moneypunct_bynameIwLb1EEC1EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt17moneypunct_bynameIwLb1EEC2EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt17moneypunct_bynameIwLb1EED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt17moneypunct_bynameIwLb1EED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt17moneypunct_bynameIwLb1EED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt18__moneypunct_cacheIcLb0EE8_M_cacheERKSt6locale@@GLIBCXX_3.4
++FUNC:_ZNSt18__moneypunct_cacheIcLb0EEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt18__moneypunct_cacheIcLb0EEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt18__moneypunct_cacheIcLb0EED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt18__moneypunct_cacheIcLb0EED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt18__moneypunct_cacheIcLb0EED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt18__moneypunct_cacheIcLb1EE8_M_cacheERKSt6locale@@GLIBCXX_3.4
++FUNC:_ZNSt18__moneypunct_cacheIcLb1EEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt18__moneypunct_cacheIcLb1EEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt18__moneypunct_cacheIcLb1EED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt18__moneypunct_cacheIcLb1EED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt18__moneypunct_cacheIcLb1EED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt18__moneypunct_cacheIwLb0EE8_M_cacheERKSt6locale@@GLIBCXX_3.4
++FUNC:_ZNSt18__moneypunct_cacheIwLb0EEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt18__moneypunct_cacheIwLb0EEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt18__moneypunct_cacheIwLb0EED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt18__moneypunct_cacheIwLb0EED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt18__moneypunct_cacheIwLb0EED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt18__moneypunct_cacheIwLb1EE8_M_cacheERKSt6locale@@GLIBCXX_3.4
++FUNC:_ZNSt18__moneypunct_cacheIwLb1EEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt18__moneypunct_cacheIwLb1EEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt18__moneypunct_cacheIwLb1EED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt18__moneypunct_cacheIwLb1EED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt18__moneypunct_cacheIwLb1EED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt18basic_stringstreamIcSt11char_traitsIcESaIcEE3strERKSs@@GLIBCXX_3.4
++FUNC:_ZNSt18basic_stringstreamIcSt11char_traitsIcESaIcEEC1ERKSsSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt18basic_stringstreamIcSt11char_traitsIcESaIcEEC1ESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt18basic_stringstreamIcSt11char_traitsIcESaIcEEC2ERKSsSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt18basic_stringstreamIcSt11char_traitsIcESaIcEEC2ESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt18basic_stringstreamIcSt11char_traitsIcESaIcEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt18basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt18basic_stringstreamIcSt11char_traitsIcESaIcEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt18basic_stringstreamIwSt11char_traitsIwESaIwEE3strERKSbIwS1_S2_E@@GLIBCXX_3.4
++FUNC:_ZNSt18basic_stringstreamIwSt11char_traitsIwESaIwEEC1ERKSbIwS1_S2_ESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt18basic_stringstreamIwSt11char_traitsIwESaIwEEC1ESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt18basic_stringstreamIwSt11char_traitsIwESaIwEEC2ERKSbIwS1_S2_ESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt18basic_stringstreamIwSt11char_traitsIwESaIwEEC2ESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt18basic_stringstreamIwSt11char_traitsIwESaIwEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt18basic_stringstreamIwSt11char_traitsIwESaIwEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt18basic_stringstreamIwSt11char_traitsIwESaIwEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt18condition_variable10notify_allEv@@GLIBCXX_3.4.11
++FUNC:_ZNSt18condition_variable10notify_oneEv@@GLIBCXX_3.4.11
++FUNC:_ZNSt18condition_variable4waitERSt11unique_lockISt5mutexE@@GLIBCXX_3.4.11
++FUNC:_ZNSt18condition_variableC1Ev@@GLIBCXX_3.4.11
++FUNC:_ZNSt18condition_variableC2Ev@@GLIBCXX_3.4.11
++FUNC:_ZNSt18condition_variableD1Ev@@GLIBCXX_3.4.11
++FUNC:_ZNSt18condition_variableD2Ev@@GLIBCXX_3.4.11
++FUNC:_ZNSt19basic_istringstreamIcSt11char_traitsIcESaIcEE3strERKSs@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_istringstreamIcSt11char_traitsIcESaIcEEC1ERKSsSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_istringstreamIcSt11char_traitsIcESaIcEEC1ESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_istringstreamIcSt11char_traitsIcESaIcEEC2ERKSsSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_istringstreamIcSt11char_traitsIcESaIcEEC2ESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_istringstreamIcSt11char_traitsIcESaIcEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_istringstreamIcSt11char_traitsIcESaIcEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_istringstreamIcSt11char_traitsIcESaIcEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_istringstreamIwSt11char_traitsIwESaIwEE3strERKSbIwS1_S2_E@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_istringstreamIwSt11char_traitsIwESaIwEEC1ERKSbIwS1_S2_ESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_istringstreamIwSt11char_traitsIwESaIwEEC1ESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_istringstreamIwSt11char_traitsIwESaIwEEC2ERKSbIwS1_S2_ESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_istringstreamIwSt11char_traitsIwESaIwEEC2ESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_istringstreamIwSt11char_traitsIwESaIwEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_istringstreamIwSt11char_traitsIwESaIwEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_istringstreamIwSt11char_traitsIwESaIwEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE3strERKSs@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_ostringstreamIcSt11char_traitsIcESaIcEEC1ERKSsSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_ostringstreamIcSt11char_traitsIcESaIcEEC1ESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_ostringstreamIcSt11char_traitsIcESaIcEEC2ERKSsSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_ostringstreamIcSt11char_traitsIcESaIcEEC2ESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_ostringstreamIwSt11char_traitsIwESaIwEE3strERKSbIwS1_S2_E@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_ostringstreamIwSt11char_traitsIwESaIwEEC1ERKSbIwS1_S2_ESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_ostringstreamIwSt11char_traitsIwESaIwEEC1ESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_ostringstreamIwSt11char_traitsIwESaIwEEC2ERKSbIwS1_S2_ESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_ostringstreamIwSt11char_traitsIwESaIwEEC2ESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt19istreambuf_iteratorIcSt11char_traitsIcEEppEv@@GLIBCXX_3.4.5
++FUNC:_ZNSt19istreambuf_iteratorIcSt11char_traitsIcEEppEv@GLIBCXX_3.4
++FUNC:_ZNSt19istreambuf_iteratorIwSt11char_traitsIwEEppEv@@GLIBCXX_3.4.5
++FUNC:_ZNSt19istreambuf_iteratorIwSt11char_traitsIwEEppEv@GLIBCXX_3.4
++FUNC:_ZNSt22condition_variable_anyC1Ev@@GLIBCXX_3.4.11
++FUNC:_ZNSt22condition_variable_anyC2Ev@@GLIBCXX_3.4.11
++FUNC:_ZNSt22condition_variable_anyD1Ev@@GLIBCXX_3.4.11
++FUNC:_ZNSt22condition_variable_anyD2Ev@@GLIBCXX_3.4.11
++FUNC:_ZNSt5ctypeIcE13classic_tableEv@@GLIBCXX_3.4
++FUNC:_ZNSt5ctypeIcEC1EP15__locale_structPKtbj@@GLIBCXX_3.4
++FUNC:_ZNSt5ctypeIcEC1EPKtbj@@GLIBCXX_3.4
++FUNC:_ZNSt5ctypeIcEC2EP15__locale_structPKtbj@@GLIBCXX_3.4
++FUNC:_ZNSt5ctypeIcEC2EPKtbj@@GLIBCXX_3.4
++FUNC:_ZNSt5ctypeIcED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt5ctypeIcED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt5ctypeIcED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt5ctypeIwE19_M_initialize_ctypeEv@@GLIBCXX_3.4
++FUNC:_ZNSt5ctypeIwEC1EP15__locale_structj@@GLIBCXX_3.4
++FUNC:_ZNSt5ctypeIwEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt5ctypeIwEC2EP15__locale_structj@@GLIBCXX_3.4
++FUNC:_ZNSt5ctypeIwEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt5ctypeIwED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt5ctypeIwED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt5ctypeIwED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt6__norm15_List_node_base10_M_reverseEv@@GLIBCXX_3.4.14
++FUNC:_ZNSt6__norm15_List_node_base11_M_transferEPS0_S1_@@GLIBCXX_3.4.14
++FUNC:_ZNSt6__norm15_List_node_base4hookEPS0_@@GLIBCXX_3.4.9
++FUNC:_ZNSt6__norm15_List_node_base4swapERS0_S1_@@GLIBCXX_3.4.9
++FUNC:_ZNSt6__norm15_List_node_base6unhookEv@@GLIBCXX_3.4.9
++FUNC:_ZNSt6__norm15_List_node_base7_M_hookEPS0_@@GLIBCXX_3.4.14
++FUNC:_ZNSt6__norm15_List_node_base7reverseEv@@GLIBCXX_3.4.9
++FUNC:_ZNSt6__norm15_List_node_base8transferEPS0_S1_@@GLIBCXX_3.4.9
++FUNC:_ZNSt6__norm15_List_node_base9_M_unhookEv@@GLIBCXX_3.4.14
++FUNC:_ZNSt6chrono12system_clock3nowEv@@GLIBCXX_3.4.11
++FUNC:_ZNSt6gslice8_IndexerC1EjRKSt8valarrayIjES4_@@GLIBCXX_3.4
++FUNC:_ZNSt6gslice8_IndexerC2EjRKSt8valarrayIjES4_@@GLIBCXX_3.4
++FUNC:_ZNSt6locale11_M_coalesceERKS_S1_i@@GLIBCXX_3.4
++FUNC:_ZNSt6locale21_S_normalize_categoryEi@@GLIBCXX_3.4
++FUNC:_ZNSt6locale5_Impl16_M_install_cacheEPKNS_5facetEj@@GLIBCXX_3.4.7
++FUNC:_ZNSt6locale5_Impl16_M_install_facetEPKNS_2idEPKNS_5facetE@@GLIBCXX_3.4
++FUNC:_ZNSt6locale5_Impl16_M_replace_facetEPKS0_PKNS_2idE@@GLIBCXX_3.4
++FUNC:_ZNSt6locale5_Impl19_M_replace_categoryEPKS0_PKPKNS_2idE@@GLIBCXX_3.4
++FUNC:_ZNSt6locale5_Impl21_M_replace_categoriesEPKS0_i@@GLIBCXX_3.4
++FUNC:_ZNSt6locale5_ImplC1EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt6locale5_ImplC1ERKS0_j@@GLIBCXX_3.4
++FUNC:_ZNSt6locale5_ImplC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt6locale5_ImplC2EPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt6locale5_ImplC2ERKS0_j@@GLIBCXX_3.4
++FUNC:_ZNSt6locale5_ImplC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt6locale5_ImplD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt6locale5_ImplD2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt6locale5facet13_S_get_c_nameEv@@GLIBCXX_3.4.6
++FUNC:_ZNSt6locale5facet15_S_get_c_localeEv@@GLIBCXX_3.4
++FUNC:_ZNSt6locale5facet17_S_clone_c_localeERP15__locale_struct@@GLIBCXX_3.4
++FUNC:_ZNSt6locale5facet18_S_create_c_localeERP15__locale_structPKcS2_@@GLIBCXX_3.4
++FUNC:_ZNSt6locale5facet19_S_destroy_c_localeERP15__locale_struct@@GLIBCXX_3.4
++FUNC:_ZNSt6locale5facetD0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt6locale5facetD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt6locale5facetD2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt6locale6globalERKS_@@GLIBCXX_3.4
++FUNC:_ZNSt6locale7classicEv@@GLIBCXX_3.4
++FUNC:_ZNSt6localeC1EPKc@@GLIBCXX_3.4
++FUNC:_ZNSt6localeC1EPNS_5_ImplE@@GLIBCXX_3.4
++FUNC:_ZNSt6localeC1ERKS_@@GLIBCXX_3.4
++FUNC:_ZNSt6localeC1ERKS_PKci@@GLIBCXX_3.4
++FUNC:_ZNSt6localeC1ERKS_S1_i@@GLIBCXX_3.4
++FUNC:_ZNSt6localeC1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt6localeC2EPKc@@GLIBCXX_3.4
++FUNC:_ZNSt6localeC2EPNS_5_ImplE@@GLIBCXX_3.4
++FUNC:_ZNSt6localeC2ERKS_@@GLIBCXX_3.4
++FUNC:_ZNSt6localeC2ERKS_PKci@@GLIBCXX_3.4
++FUNC:_ZNSt6localeC2ERKS_S1_i@@GLIBCXX_3.4
++FUNC:_ZNSt6localeC2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt6localeD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt6localeD2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt6localeaSERKS_@@GLIBCXX_3.4
++FUNC:_ZNSt6thread15_M_start_threadESt10shared_ptrINS_10_Impl_baseEE@@GLIBCXX_3.4.11
++FUNC:_ZNSt6thread4joinEv@@GLIBCXX_3.4.11
++FUNC:_ZNSt6thread6detachEv@@GLIBCXX_3.4.11
++FUNC:_ZNSt7codecvtIcc11__mbstate_tEC1EP15__locale_structj@@GLIBCXX_3.4
++FUNC:_ZNSt7codecvtIcc11__mbstate_tEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt7codecvtIcc11__mbstate_tEC2EP15__locale_structj@@GLIBCXX_3.4
++FUNC:_ZNSt7codecvtIcc11__mbstate_tEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt7codecvtIcc11__mbstate_tED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt7codecvtIcc11__mbstate_tED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt7codecvtIcc11__mbstate_tED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt7codecvtIwc11__mbstate_tEC1EP15__locale_structj@@GLIBCXX_3.4
++FUNC:_ZNSt7codecvtIwc11__mbstate_tEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt7codecvtIwc11__mbstate_tEC2EP15__locale_structj@@GLIBCXX_3.4
++FUNC:_ZNSt7codecvtIwc11__mbstate_tEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt7codecvtIwc11__mbstate_tED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt7codecvtIwc11__mbstate_tED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt7codecvtIwc11__mbstate_tED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt7collateIcEC1EP15__locale_structj@@GLIBCXX_3.4
++FUNC:_ZNSt7collateIcEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt7collateIcEC2EP15__locale_structj@@GLIBCXX_3.4
++FUNC:_ZNSt7collateIcEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt7collateIcED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt7collateIcED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt7collateIcED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt7collateIwEC1EP15__locale_structj@@GLIBCXX_3.4
++FUNC:_ZNSt7collateIwEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt7collateIwEC2EP15__locale_structj@@GLIBCXX_3.4
++FUNC:_ZNSt7collateIwEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt7collateIwED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt7collateIwED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt7collateIwED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8__detail15_List_node_base10_M_reverseEv@@GLIBCXX_3.4.15
++FUNC:_ZNSt8__detail15_List_node_base11_M_transferEPS0_S1_@@GLIBCXX_3.4.15
++FUNC:_ZNSt8__detail15_List_node_base4swapERS0_S1_@@GLIBCXX_3.4.15
++FUNC:_ZNSt8__detail15_List_node_base7_M_hookEPS0_@@GLIBCXX_3.4.15
++FUNC:_ZNSt8__detail15_List_node_base9_M_unhookEv@@GLIBCXX_3.4.15
++FUNC:_ZNSt8bad_castD0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8bad_castD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8bad_castD2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8ios_base13_M_grow_wordsEib@@GLIBCXX_3.4
++FUNC:_ZNSt8ios_base15sync_with_stdioEb@@GLIBCXX_3.4
++FUNC:_ZNSt8ios_base17_M_call_callbacksENS_5eventE@@GLIBCXX_3.4.6
++FUNC:_ZNSt8ios_base17register_callbackEPFvNS_5eventERS_iEi@@GLIBCXX_3.4
++FUNC:_ZNSt8ios_base20_M_dispose_callbacksEv@@GLIBCXX_3.4.6
++FUNC:_ZNSt8ios_base4InitC1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8ios_base4InitC2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8ios_base4InitD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8ios_base4InitD2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8ios_base5imbueERKSt6locale@@GLIBCXX_3.4
++FUNC:_ZNSt8ios_base6xallocEv@@GLIBCXX_3.4
++FUNC:_ZNSt8ios_base7_M_initEv@@GLIBCXX_3.4
++FUNC:_ZNSt8ios_base7failureC1ERKSs@@GLIBCXX_3.4
++FUNC:_ZNSt8ios_base7failureC2ERKSs@@GLIBCXX_3.4
++FUNC:_ZNSt8ios_base7failureD0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8ios_base7failureD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8ios_base7failureD2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8ios_baseC1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8ios_baseC2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8ios_baseD0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8ios_baseD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8ios_baseD2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8messagesIcEC1EP15__locale_structPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt8messagesIcEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt8messagesIcEC2EP15__locale_structPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt8messagesIcEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt8messagesIcED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8messagesIcED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8messagesIcED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8messagesIwEC1EP15__locale_structPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt8messagesIwEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt8messagesIwEC2EP15__locale_structPKcj@@GLIBCXX_3.4
++FUNC:_ZNSt8messagesIwEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt8messagesIwED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8messagesIwED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8messagesIwED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8numpunctIcE22_M_initialize_numpunctEP15__locale_struct@@GLIBCXX_3.4
++FUNC:_ZNSt8numpunctIcEC1EP15__locale_structj@@GLIBCXX_3.4
++FUNC:_ZNSt8numpunctIcEC1EPSt16__numpunct_cacheIcEj@@GLIBCXX_3.4
++FUNC:_ZNSt8numpunctIcEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt8numpunctIcEC2EP15__locale_structj@@GLIBCXX_3.4
++FUNC:_ZNSt8numpunctIcEC2EPSt16__numpunct_cacheIcEj@@GLIBCXX_3.4
++FUNC:_ZNSt8numpunctIcEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt8numpunctIcED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8numpunctIcED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8numpunctIcED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8numpunctIwE22_M_initialize_numpunctEP15__locale_struct@@GLIBCXX_3.4
++FUNC:_ZNSt8numpunctIwEC1EP15__locale_structj@@GLIBCXX_3.4
++FUNC:_ZNSt8numpunctIwEC1EPSt16__numpunct_cacheIwEj@@GLIBCXX_3.4
++FUNC:_ZNSt8numpunctIwEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt8numpunctIwEC2EP15__locale_structj@@GLIBCXX_3.4
++FUNC:_ZNSt8numpunctIwEC2EPSt16__numpunct_cacheIwEj@@GLIBCXX_3.4
++FUNC:_ZNSt8numpunctIwEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt8numpunctIwED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8numpunctIwED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8numpunctIwED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8valarrayIjEC1ERKS0_@@GLIBCXX_3.4
++FUNC:_ZNSt8valarrayIjEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt8valarrayIjEC2ERKS0_@@GLIBCXX_3.4
++FUNC:_ZNSt8valarrayIjEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt8valarrayIjED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8valarrayIjED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt8valarrayIjEixEj@@GLIBCXX_3.4
++FUNC:_ZNSt9__atomic011atomic_flag12test_and_setESt12memory_order@@GLIBCXX_3.4.14
++FUNC:_ZNSt9__atomic011atomic_flag5clearESt12memory_order@@GLIBCXX_3.4.14
++FUNC:_ZNSt9__cxx199815_List_node_base10_M_reverseEv@@GLIBCXX_3.4.14
++FUNC:_ZNSt9__cxx199815_List_node_base11_M_transferEPS0_S1_@@GLIBCXX_3.4.14
++FUNC:_ZNSt9__cxx199815_List_node_base4hookEPS0_@@GLIBCXX_3.4.10
++FUNC:_ZNSt9__cxx199815_List_node_base4swapERS0_S1_@@GLIBCXX_3.4.10
++FUNC:_ZNSt9__cxx199815_List_node_base6unhookEv@@GLIBCXX_3.4.10
++FUNC:_ZNSt9__cxx199815_List_node_base7_M_hookEPS0_@@GLIBCXX_3.4.14
++FUNC:_ZNSt9__cxx199815_List_node_base7reverseEv@@GLIBCXX_3.4.10
++FUNC:_ZNSt9__cxx199815_List_node_base8transferEPS0_S1_@@GLIBCXX_3.4.10
++FUNC:_ZNSt9__cxx199815_List_node_base9_M_unhookEv@@GLIBCXX_3.4.14
++FUNC:_ZNSt9bad_allocD0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9bad_allocD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9bad_allocD2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIcSt11char_traitsIcEE10exceptionsESt12_Ios_Iostate@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIcSt11char_traitsIcEE11_M_setstateESt12_Ios_Iostate@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIcSt11char_traitsIcEE15_M_cache_localeERKSt6locale@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIcSt11char_traitsIcEE3tieEPSo@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIcSt11char_traitsIcEE4fillEc@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIcSt11char_traitsIcEE4initEPSt15basic_streambufIcS1_E@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIcSt11char_traitsIcEE5imbueERKSt6locale@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIcSt11char_traitsIcEE5rdbufEPSt15basic_streambufIcS1_E@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIcSt11char_traitsIcEE7copyfmtERKS2_@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIcSt11char_traitsIcEE8setstateESt12_Ios_Iostate@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIcSt11char_traitsIcEEC1EPSt15basic_streambufIcS1_E@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIcSt11char_traitsIcEEC1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIcSt11char_traitsIcEEC2EPSt15basic_streambufIcS1_E@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIcSt11char_traitsIcEEC2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIcSt11char_traitsIcEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIcSt11char_traitsIcEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIcSt11char_traitsIcEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIwSt11char_traitsIwEE10exceptionsESt12_Ios_Iostate@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIwSt11char_traitsIwEE11_M_setstateESt12_Ios_Iostate@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIwSt11char_traitsIwEE15_M_cache_localeERKSt6locale@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIwSt11char_traitsIwEE3tieEPSt13basic_ostreamIwS1_E@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIwSt11char_traitsIwEE4fillEw@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIwSt11char_traitsIwEE4initEPSt15basic_streambufIwS1_E@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIwSt11char_traitsIwEE5clearESt12_Ios_Iostate@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIwSt11char_traitsIwEE5imbueERKSt6locale@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIwSt11char_traitsIwEE5rdbufEPSt15basic_streambufIwS1_E@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIwSt11char_traitsIwEE7copyfmtERKS2_@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIwSt11char_traitsIwEE8setstateESt12_Ios_Iostate@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIwSt11char_traitsIwEEC1EPSt15basic_streambufIwS1_E@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIwSt11char_traitsIwEEC1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIwSt11char_traitsIwEEC2EPSt15basic_streambufIwS1_E@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIwSt11char_traitsIwEEC2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIwSt11char_traitsIwEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIwSt11char_traitsIwEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9basic_iosIwSt11char_traitsIwEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9exceptionD0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9exceptionD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9exceptionD2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1Ej@@GLIBCXX_3.4
++FUNC:_ZNSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2Ej@@GLIBCXX_3.4
++FUNC:_ZNSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9strstream3strEv@@GLIBCXX_3.4
++FUNC:_ZNSt9strstream6freezeEb@@GLIBCXX_3.4
++FUNC:_ZNSt9strstreamC1EPciSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt9strstreamC1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9strstreamC2EPciSt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt9strstreamC2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9strstreamD0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9strstreamD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9strstreamD2Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9type_infoD0Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9type_infoD1Ev@@GLIBCXX_3.4
++FUNC:_ZNSt9type_infoD2Ev@@GLIBCXX_3.4
++FUNC:_ZNVSt9__atomic011atomic_flag12test_and_setESt12memory_order@@GLIBCXX_3.4.11
++FUNC:_ZNVSt9__atomic011atomic_flag5clearESt12memory_order@@GLIBCXX_3.4.11
++FUNC:_ZSt10unexpectedv@@GLIBCXX_3.4
++FUNC:_ZSt11_Hash_bytesPKvjj@@CXXABI_1.3.5
++FUNC:_ZSt13set_terminatePFvvE@@GLIBCXX_3.4
++FUNC:_ZSt14__convert_to_vIdEvPKcRT_RSt12_Ios_IostateRKP15__locale_struct@@GLIBCXX_3.4
++FUNC:_ZSt14__convert_to_vIeEvPKcRT_RSt12_Ios_IostateRKP15__locale_struct@@GLIBCXX_3.4
++FUNC:_ZSt14__convert_to_vIfEvPKcRT_RSt12_Ios_IostateRKP15__locale_struct@@GLIBCXX_3.4
++FUNC:_ZSt14set_unexpectedPFvvE@@GLIBCXX_3.4
++FUNC:_ZSt15_Fnv_hash_bytesPKvjj@@CXXABI_1.3.5
++FUNC:_ZSt15future_categoryv@@GLIBCXX_3.4.15
++FUNC:_ZSt15set_new_handlerPFvvE@@GLIBCXX_3.4
++FUNC:_ZSt15system_categoryv@@GLIBCXX_3.4.11
++FUNC:_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_i@@GLIBCXX_3.4.9
++FUNC:_ZSt16__ostream_insertIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_PKS3_i@@GLIBCXX_3.4.9
++FUNC:_ZSt16__throw_bad_castv@@GLIBCXX_3.4
++FUNC:_ZSt16generic_categoryv@@GLIBCXX_3.4.11
++FUNC:_ZSt17__copy_streambufsIcSt11char_traitsIcEEiPSt15basic_streambufIT_T0_ES6_@@GLIBCXX_3.4.6
++FUNC:_ZSt17__copy_streambufsIwSt11char_traitsIwEEiPSt15basic_streambufIT_T0_ES6_@@GLIBCXX_3.4.6
++FUNC:_ZSt17__throw_bad_allocv@@GLIBCXX_3.4
++FUNC:_ZSt17__verify_groupingPKcjRKSs@@GLIBCXX_3.4.10
++FUNC:_ZSt17current_exceptionv@@CXXABI_1.3.3
++FUNC:_ZSt17rethrow_exceptionNSt15__exception_ptr13exception_ptrE@@CXXABI_1.3.3
++FUNC:_ZSt18_Rb_tree_decrementPKSt18_Rb_tree_node_base@@GLIBCXX_3.4
++FUNC:_ZSt18_Rb_tree_decrementPSt18_Rb_tree_node_base@@GLIBCXX_3.4
++FUNC:_ZSt18_Rb_tree_incrementPKSt18_Rb_tree_node_base@@GLIBCXX_3.4
++FUNC:_ZSt18_Rb_tree_incrementPSt18_Rb_tree_node_base@@GLIBCXX_3.4
++FUNC:_ZSt18__throw_bad_typeidv@@GLIBCXX_3.4
++FUNC:_ZSt18uncaught_exceptionv@@GLIBCXX_3.4
++FUNC:_ZSt19__throw_ios_failurePKc@@GLIBCXX_3.4
++FUNC:_ZSt19__throw_logic_errorPKc@@GLIBCXX_3.4
++FUNC:_ZSt19__throw_range_errorPKc@@GLIBCXX_3.4
++FUNC:_ZSt19__throw_regex_errorNSt15regex_constants10error_typeE@@GLIBCXX_3.4.15
++FUNC:_ZSt20_Rb_tree_black_countPKSt18_Rb_tree_node_baseS1_@@GLIBCXX_3.4
++FUNC:_ZSt20_Rb_tree_rotate_leftPSt18_Rb_tree_node_baseRS0_@@GLIBCXX_3.4
++FUNC:_ZSt20__throw_domain_errorPKc@@GLIBCXX_3.4
++FUNC:_ZSt20__throw_future_errori@@GLIBCXX_3.4.14
++FUNC:_ZSt20__throw_length_errorPKc@@GLIBCXX_3.4
++FUNC:_ZSt20__throw_out_of_rangePKc@@GLIBCXX_3.4
++FUNC:_ZSt20__throw_system_errori@@GLIBCXX_3.4.11
++FUNC:_ZSt21_Rb_tree_rotate_rightPSt18_Rb_tree_node_baseRS0_@@GLIBCXX_3.4
++FUNC:_ZSt21__copy_streambufs_eofIcSt11char_traitsIcEEiPSt15basic_streambufIT_T0_ES6_Rb@@GLIBCXX_3.4.9
++FUNC:_ZSt21__copy_streambufs_eofIwSt11char_traitsIwEEiPSt15basic_streambufIT_T0_ES6_Rb@@GLIBCXX_3.4.9
++FUNC:_ZSt21__throw_bad_exceptionv@@GLIBCXX_3.4
++FUNC:_ZSt21__throw_runtime_errorPKc@@GLIBCXX_3.4
++FUNC:_ZSt22__throw_overflow_errorPKc@@GLIBCXX_3.4
++FUNC:_ZSt23__throw_underflow_errorPKc@@GLIBCXX_3.4
++FUNC:_ZSt24__throw_invalid_argumentPKc@@GLIBCXX_3.4
++FUNC:_ZSt25__throw_bad_function_callv@@GLIBCXX_3.4.14
++FUNC:_ZSt28_Rb_tree_rebalance_for_erasePSt18_Rb_tree_node_baseRS_@@GLIBCXX_3.4
++FUNC:_ZSt29_Rb_tree_insert_and_rebalancebPSt18_Rb_tree_node_baseS0_RS_@@GLIBCXX_3.4
++FUNC:_ZSt2wsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_@@GLIBCXX_3.4
++FUNC:_ZSt2wsIwSt11char_traitsIwEERSt13basic_istreamIT_T0_ES6_@@GLIBCXX_3.4
++FUNC:_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@@GLIBCXX_3.4
++FUNC:_ZSt4endlIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_@@GLIBCXX_3.4
++FUNC:_ZSt4endsIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@@GLIBCXX_3.4
++FUNC:_ZSt4endsIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_@@GLIBCXX_3.4
++FUNC:_ZSt5flushIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@@GLIBCXX_3.4
++FUNC:_ZSt5flushIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_@@GLIBCXX_3.4
++FUNC:_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RSbIS4_S5_T1_E@@GLIBCXX_3.4
++FUNC:_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RSbIS4_S5_T1_ES4_@@GLIBCXX_3.4
++FUNC:_ZSt7getlineIwSt11char_traitsIwESaIwEERSt13basic_istreamIT_T0_ES7_RSbIS4_S5_T1_E@@GLIBCXX_3.4
++FUNC:_ZSt7getlineIwSt11char_traitsIwESaIwEERSt13basic_istreamIT_T0_ES7_RSbIS4_S5_T1_ES4_@@GLIBCXX_3.4
++FUNC:_ZSt9has_facetISt10moneypunctIcLb0EEEbRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9has_facetISt10moneypunctIwLb0EEEbRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9has_facetISt11__timepunctIcEEbRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9has_facetISt11__timepunctIwEEbRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9has_facetISt5ctypeIcEEbRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9has_facetISt5ctypeIwEEbRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9has_facetISt7codecvtIcc11__mbstate_tEEbRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9has_facetISt7codecvtIwc11__mbstate_tEEbRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9has_facetISt7collateIcEEbRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9has_facetISt7collateIwEEbRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9has_facetISt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEEbRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9has_facetISt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEEbRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9has_facetISt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEEbRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9has_facetISt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEEbRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9has_facetISt8messagesIcEEbRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9has_facetISt8messagesIwEEbRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9has_facetISt8numpunctIcEEbRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9has_facetISt8numpunctIwEEbRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9has_facetISt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEEbRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9has_facetISt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEEbRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9has_facetISt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEEbRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9has_facetISt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEEbRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9has_facetISt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEEbRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9has_facetISt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEEbRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9has_facetISt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEEbRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9has_facetISt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEEbRKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9terminatev@@GLIBCXX_3.4
++FUNC:_ZSt9use_facetISt10moneypunctIcLb0EEERKT_RKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9use_facetISt10moneypunctIcLb1EEERKT_RKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9use_facetISt10moneypunctIwLb0EEERKT_RKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9use_facetISt10moneypunctIwLb1EEERKT_RKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9use_facetISt11__timepunctIcEERKT_RKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9use_facetISt11__timepunctIwEERKT_RKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9use_facetISt5ctypeIcEERKT_RKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9use_facetISt5ctypeIwEERKT_RKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9use_facetISt7codecvtIcc11__mbstate_tEERKT_RKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9use_facetISt7codecvtIwc11__mbstate_tEERKT_RKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9use_facetISt7collateIcEERKT_RKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9use_facetISt7collateIwEERKT_RKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9use_facetISt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEERKT_RKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9use_facetISt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEERKT_RKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9use_facetISt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEERKT_RKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9use_facetISt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEERKT_RKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9use_facetISt8messagesIcEERKT_RKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9use_facetISt8messagesIwEERKT_RKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9use_facetISt8numpunctIcEERKT_RKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9use_facetISt8numpunctIwEERKT_RKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9use_facetISt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEERKT_RKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9use_facetISt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEERKT_RKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9use_facetISt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEERKT_RKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9use_facetISt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEERKT_RKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9use_facetISt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEERKT_RKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9use_facetISt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEERKT_RKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9use_facetISt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEERKT_RKSt6locale@@GLIBCXX_3.4
++FUNC:_ZSt9use_facetISt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEERKT_RKSt6locale@@GLIBCXX_3.4
++FUNC:_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKa@@GLIBCXX_3.4
++FUNC:_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@@GLIBCXX_3.4
++FUNC:_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKh@@GLIBCXX_3.4
++FUNC:_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_a@@GLIBCXX_3.4
++FUNC:_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@@GLIBCXX_3.4
++FUNC:_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_h@@GLIBCXX_3.4
++FUNC:_ZStlsIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_St12_Setiosflags@@GLIBCXX_3.4
++FUNC:_ZStlsIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_St13_Setprecision@@GLIBCXX_3.4
++FUNC:_ZStlsIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_St14_Resetiosflags@@GLIBCXX_3.4
++FUNC:_ZStlsIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_St5_Setw@@GLIBCXX_3.4
++FUNC:_ZStlsIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_St8_Setbase@@GLIBCXX_3.4
++FUNC:_ZStlsIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_St8_SetfillIS3_E@@GLIBCXX_3.4
++FUNC:_ZStlsIcSt11char_traitsIcESaIcEERSt13basic_ostreamIT_T0_ES7_RKSbIS4_S5_T1_E@@GLIBCXX_3.4
++FUNC:_ZStlsIdcSt11char_traitsIcEERSt13basic_ostreamIT0_T1_ES6_RKSt7complexIT_E@@GLIBCXX_3.4
++FUNC:_ZStlsIdwSt11char_traitsIwEERSt13basic_ostreamIT0_T1_ES6_RKSt7complexIT_E@@GLIBCXX_3.4
++FUNC:_ZStlsIecSt11char_traitsIcEERSt13basic_ostreamIT0_T1_ES6_RKSt7complexIT_E@@GLIBCXX_3.4
++FUNC:_ZStlsIewSt11char_traitsIwEERSt13basic_ostreamIT0_T1_ES6_RKSt7complexIT_E@@GLIBCXX_3.4
++FUNC:_ZStlsIfcSt11char_traitsIcEERSt13basic_ostreamIT0_T1_ES6_RKSt7complexIT_E@@GLIBCXX_3.4
++FUNC:_ZStlsIfwSt11char_traitsIwEERSt13basic_ostreamIT0_T1_ES6_RKSt7complexIT_E@@GLIBCXX_3.4
++FUNC:_ZStlsIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_PKS3_@@GLIBCXX_3.4
++FUNC:_ZStlsIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_PKc@@GLIBCXX_3.4
++FUNC:_ZStlsIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_S3_@@GLIBCXX_3.4
++FUNC:_ZStlsIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_St12_Setiosflags@@GLIBCXX_3.4
++FUNC:_ZStlsIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_St13_Setprecision@@GLIBCXX_3.4
++FUNC:_ZStlsIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_St14_Resetiosflags@@GLIBCXX_3.4
++FUNC:_ZStlsIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_St5_Setw@@GLIBCXX_3.4
++FUNC:_ZStlsIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_St8_Setbase@@GLIBCXX_3.4
++FUNC:_ZStlsIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_St8_SetfillIS3_E@@GLIBCXX_3.4
++FUNC:_ZStlsIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_c@@GLIBCXX_3.4
++FUNC:_ZStlsIwSt11char_traitsIwESaIwEERSt13basic_ostreamIT_T0_ES7_RKSbIS4_S5_T1_E@@GLIBCXX_3.4
++FUNC:_ZStplIcSt11char_traitsIcESaIcEESbIT_T0_T1_EPKS3_RKS6_@@GLIBCXX_3.4
++FUNC:_ZStplIcSt11char_traitsIcESaIcEESbIT_T0_T1_ERKS6_S8_@@GLIBCXX_3.4
++FUNC:_ZStplIcSt11char_traitsIcESaIcEESbIT_T0_T1_ES3_RKS6_@@GLIBCXX_3.4
++FUNC:_ZStplIwSt11char_traitsIwESaIwEESbIT_T0_T1_EPKS3_RKS6_@@GLIBCXX_3.4
++FUNC:_ZStplIwSt11char_traitsIwESaIwEESbIT_T0_T1_ERKS6_S8_@@GLIBCXX_3.4
++FUNC:_ZStplIwSt11char_traitsIwESaIwEESbIT_T0_T1_ES3_RKS6_@@GLIBCXX_3.4
++FUNC:_ZStrsISt11char_traitsIcEERSt13basic_istreamIcT_ES5_Pa@@GLIBCXX_3.4
++FUNC:_ZStrsISt11char_traitsIcEERSt13basic_istreamIcT_ES5_Ph@@GLIBCXX_3.4
++FUNC:_ZStrsISt11char_traitsIcEERSt13basic_istreamIcT_ES5_Ra@@GLIBCXX_3.4
++FUNC:_ZStrsISt11char_traitsIcEERSt13basic_istreamIcT_ES5_Rh@@GLIBCXX_3.4
++FUNC:_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_@@GLIBCXX_3.4
++FUNC:_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_RS3_@@GLIBCXX_3.4
++FUNC:_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_St12_Setiosflags@@GLIBCXX_3.4
++FUNC:_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_St13_Setprecision@@GLIBCXX_3.4
++FUNC:_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_St14_Resetiosflags@@GLIBCXX_3.4
++FUNC:_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_St5_Setw@@GLIBCXX_3.4
++FUNC:_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_St8_Setbase@@GLIBCXX_3.4
++FUNC:_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_St8_SetfillIS3_E@@GLIBCXX_3.4
++FUNC:_ZStrsIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RSbIS4_S5_T1_E@@GLIBCXX_3.4
++FUNC:_ZStrsIdcSt11char_traitsIcEERSt13basic_istreamIT0_T1_ES6_RSt7complexIT_E@@GLIBCXX_3.4
++FUNC:_ZStrsIdwSt11char_traitsIwEERSt13basic_istreamIT0_T1_ES6_RSt7complexIT_E@@GLIBCXX_3.4
++FUNC:_ZStrsIecSt11char_traitsIcEERSt13basic_istreamIT0_T1_ES6_RSt7complexIT_E@@GLIBCXX_3.4
++FUNC:_ZStrsIewSt11char_traitsIwEERSt13basic_istreamIT0_T1_ES6_RSt7complexIT_E@@GLIBCXX_3.4
++FUNC:_ZStrsIfcSt11char_traitsIcEERSt13basic_istreamIT0_T1_ES6_RSt7complexIT_E@@GLIBCXX_3.4
++FUNC:_ZStrsIfwSt11char_traitsIwEERSt13basic_istreamIT0_T1_ES6_RSt7complexIT_E@@GLIBCXX_3.4
++FUNC:_ZStrsIwSt11char_traitsIwEERSt13basic_istreamIT_T0_ES6_PS3_@@GLIBCXX_3.4
++FUNC:_ZStrsIwSt11char_traitsIwEERSt13basic_istreamIT_T0_ES6_RS3_@@GLIBCXX_3.4
++FUNC:_ZStrsIwSt11char_traitsIwEERSt13basic_istreamIT_T0_ES6_St12_Setiosflags@@GLIBCXX_3.4
++FUNC:_ZStrsIwSt11char_traitsIwEERSt13basic_istreamIT_T0_ES6_St13_Setprecision@@GLIBCXX_3.4
++FUNC:_ZStrsIwSt11char_traitsIwEERSt13basic_istreamIT_T0_ES6_St14_Resetiosflags@@GLIBCXX_3.4
++FUNC:_ZStrsIwSt11char_traitsIwEERSt13basic_istreamIT_T0_ES6_St5_Setw@@GLIBCXX_3.4
++FUNC:_ZStrsIwSt11char_traitsIwEERSt13basic_istreamIT_T0_ES6_St8_Setbase@@GLIBCXX_3.4
++FUNC:_ZStrsIwSt11char_traitsIwEERSt13basic_istreamIT_T0_ES6_St8_SetfillIS3_E@@GLIBCXX_3.4
++FUNC:_ZStrsIwSt11char_traitsIwESaIwEERSt13basic_istreamIT_T0_ES7_RSbIS4_S5_T1_E@@GLIBCXX_3.4
++FUNC:_ZThn8_NSdD0Ev@@GLIBCXX_3.4
++FUNC:_ZThn8_NSdD1Ev@@GLIBCXX_3.4
++FUNC:_ZThn8_NSt13basic_fstreamIcSt11char_traitsIcEED0Ev@@GLIBCXX_3.4
++FUNC:_ZThn8_NSt13basic_fstreamIcSt11char_traitsIcEED1Ev@@GLIBCXX_3.4
++FUNC:_ZThn8_NSt13basic_fstreamIwSt11char_traitsIwEED0Ev@@GLIBCXX_3.4
++FUNC:_ZThn8_NSt13basic_fstreamIwSt11char_traitsIwEED1Ev@@GLIBCXX_3.4
++FUNC:_ZThn8_NSt14basic_iostreamIwSt11char_traitsIwEED0Ev@@GLIBCXX_3.4
++FUNC:_ZThn8_NSt14basic_iostreamIwSt11char_traitsIwEED1Ev@@GLIBCXX_3.4
++FUNC:_ZThn8_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED0Ev@@GLIBCXX_3.4
++FUNC:_ZThn8_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@@GLIBCXX_3.4
++FUNC:_ZThn8_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED0Ev@@GLIBCXX_3.4
++FUNC:_ZThn8_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED1Ev@@GLIBCXX_3.4
++FUNC:_ZThn8_NSt9strstreamD0Ev@@GLIBCXX_3.4
++FUNC:_ZThn8_NSt9strstreamD1Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSdD0Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSdD1Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSiD0Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSiD1Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSoD0Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSoD1Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt10istrstreamD0Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt10istrstreamD1Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt10ostrstreamD0Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt10ostrstreamD1Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt13basic_fstreamIcSt11char_traitsIcEED0Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt13basic_fstreamIcSt11char_traitsIcEED1Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt13basic_fstreamIwSt11char_traitsIwEED0Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt13basic_fstreamIwSt11char_traitsIwEED1Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt13basic_istreamIwSt11char_traitsIwEED0Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt13basic_istreamIwSt11char_traitsIwEED1Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt13basic_ostreamIwSt11char_traitsIwEED0Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt13basic_ostreamIwSt11char_traitsIwEED1Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt14basic_ifstreamIcSt11char_traitsIcEED0Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt14basic_ifstreamIwSt11char_traitsIwEED0Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt14basic_ifstreamIwSt11char_traitsIwEED1Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt14basic_iostreamIwSt11char_traitsIwEED0Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt14basic_iostreamIwSt11char_traitsIwEED1Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt14basic_ofstreamIcSt11char_traitsIcEED0Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt14basic_ofstreamIwSt11char_traitsIwEED0Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt14basic_ofstreamIwSt11char_traitsIwEED1Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED0Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED0Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED1Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt19basic_istringstreamIcSt11char_traitsIcESaIcEED0Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt19basic_istringstreamIcSt11char_traitsIcESaIcEED1Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt19basic_istringstreamIwSt11char_traitsIwESaIwEED0Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt19basic_istringstreamIwSt11char_traitsIwESaIwEED1Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED0Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED1Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED0Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED1Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt9strstreamD0Ev@@GLIBCXX_3.4
++FUNC:_ZTv0_n12_NSt9strstreamD1Ev@@GLIBCXX_3.4
++FUNC:_ZdaPv@@GLIBCXX_3.4
++FUNC:_ZdaPvRKSt9nothrow_t@@GLIBCXX_3.4
++FUNC:_ZdlPv@@GLIBCXX_3.4
++FUNC:_ZdlPvRKSt9nothrow_t@@GLIBCXX_3.4
++FUNC:_Znaj@@GLIBCXX_3.4
++FUNC:_ZnajRKSt9nothrow_t@@GLIBCXX_3.4
++FUNC:_Znwj@@GLIBCXX_3.4
++FUNC:_ZnwjRKSt9nothrow_t@@GLIBCXX_3.4
++FUNC:__atomic_flag_for_address@@GLIBCXX_3.4.11
++FUNC:__atomic_flag_wait_explicit@@GLIBCXX_3.4.11
++FUNC:__cxa_allocate_exception@@CXXABI_1.3
++FUNC:__cxa_bad_cast@@CXXABI_1.3
++FUNC:__cxa_bad_typeid@@CXXABI_1.3
++FUNC:__cxa_begin_catch@@CXXABI_1.3
++FUNC:__cxa_call_unexpected@@CXXABI_1.3
++FUNC:__cxa_current_exception_type@@CXXABI_1.3
++FUNC:__cxa_demangle@@CXXABI_1.3
++FUNC:__cxa_end_catch@@CXXABI_1.3
++FUNC:__cxa_free_exception@@CXXABI_1.3
++FUNC:__cxa_get_exception_ptr@@CXXABI_1.3.1
++FUNC:__cxa_get_globals@@CXXABI_1.3
++FUNC:__cxa_get_globals_fast@@CXXABI_1.3
++FUNC:__cxa_guard_abort@@CXXABI_1.3
++FUNC:__cxa_guard_acquire@@CXXABI_1.3
++FUNC:__cxa_guard_release@@CXXABI_1.3
++FUNC:__cxa_pure_virtual@@CXXABI_1.3
++FUNC:__cxa_rethrow@@CXXABI_1.3
++FUNC:__cxa_throw@@CXXABI_1.3
++FUNC:__cxa_vec_cctor@@CXXABI_1.3
++FUNC:__cxa_vec_cleanup@@CXXABI_1.3
++FUNC:__cxa_vec_ctor@@CXXABI_1.3
++FUNC:__cxa_vec_delete2@@CXXABI_1.3
++FUNC:__cxa_vec_delete3@@CXXABI_1.3
++FUNC:__cxa_vec_delete@@CXXABI_1.3
++FUNC:__cxa_vec_dtor@@CXXABI_1.3
++FUNC:__cxa_vec_new2@@CXXABI_1.3
++FUNC:__cxa_vec_new3@@CXXABI_1.3
++FUNC:__cxa_vec_new@@CXXABI_1.3
++FUNC:__dynamic_cast@@CXXABI_1.3
++FUNC:__gxx_personality_v0@@CXXABI_1.3
++FUNC:__once_proxy@@GLIBCXX_3.4.11
++FUNC:atomic_flag_clear_explicit@@GLIBCXX_3.4.11
++FUNC:atomic_flag_test_and_set_explicit@@GLIBCXX_3.4.11
++OBJECT:0:CXXABI_1.3
++OBJECT:0:CXXABI_1.3.1
++OBJECT:0:CXXABI_1.3.2
++OBJECT:0:CXXABI_1.3.3
++OBJECT:0:CXXABI_1.3.4
++OBJECT:0:CXXABI_1.3.5
++OBJECT:0:GLIBCXX_3.4
++OBJECT:0:GLIBCXX_3.4.1
++OBJECT:0:GLIBCXX_3.4.10
++OBJECT:0:GLIBCXX_3.4.11
++OBJECT:0:GLIBCXX_3.4.12
++OBJECT:0:GLIBCXX_3.4.13
++OBJECT:0:GLIBCXX_3.4.14
++OBJECT:0:GLIBCXX_3.4.15
++OBJECT:0:GLIBCXX_3.4.16
++OBJECT:0:GLIBCXX_3.4.2
++OBJECT:0:GLIBCXX_3.4.3
++OBJECT:0:GLIBCXX_3.4.4
++OBJECT:0:GLIBCXX_3.4.5
++OBJECT:0:GLIBCXX_3.4.6
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++OBJECT:0:GLIBCXX_3.4.8
++OBJECT:0:GLIBCXX_3.4.9
++OBJECT:1028:_ZNSt3tr18__detail12__prime_listE@@GLIBCXX_3.4.10
++OBJECT:1028:_ZNSt8__detail12__prime_listE@@GLIBCXX_3.4.10
++OBJECT:12:_ZTIN10__cxxabiv116__enum_type_infoE@@CXXABI_1.3
++OBJECT:12:_ZTIN10__cxxabiv117__array_type_infoE@@CXXABI_1.3
++OBJECT:12:_ZTIN10__cxxabiv117__class_type_infoE@@CXXABI_1.3
++OBJECT:12:_ZTIN10__cxxabiv117__pbase_type_infoE@@CXXABI_1.3
++OBJECT:12:_ZTIN10__cxxabiv119__pointer_type_infoE@@CXXABI_1.3
++OBJECT:12:_ZTIN10__cxxabiv120__function_type_infoE@@CXXABI_1.3
++OBJECT:12:_ZTIN10__cxxabiv120__si_class_type_infoE@@CXXABI_1.3
++OBJECT:12:_ZTIN10__cxxabiv121__vmi_class_type_infoE@@CXXABI_1.3
++OBJECT:12:_ZTIN10__cxxabiv123__fundamental_type_infoE@@CXXABI_1.3
++OBJECT:12:_ZTIN10__cxxabiv129__pointer_to_member_type_infoE@@CXXABI_1.3
++OBJECT:12:_ZTIN9__gnu_cxx13stdio_filebufIcSt11char_traitsIcEEE@@GLIBCXX_3.4
++OBJECT:12:_ZTIN9__gnu_cxx13stdio_filebufIwSt11char_traitsIwEEE@@GLIBCXX_3.4
++OBJECT:12:_ZTIN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEEE@@GLIBCXX_3.4
++OBJECT:12:_ZTIN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEEE@@GLIBCXX_3.4
++OBJECT:12:_ZTINSt8ios_base7failureE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt10bad_typeid@@GLIBCXX_3.4
++OBJECT:12:_ZTISt10istrstream@@GLIBCXX_3.4
++OBJECT:12:_ZTISt10lock_error@@GLIBCXX_3.4.11
++OBJECT:12:_ZTISt10ostrstream@@GLIBCXX_3.4
++OBJECT:12:_ZTISt11__timepunctIcE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt11__timepunctIwE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt11logic_error@@GLIBCXX_3.4
++OBJECT:12:_ZTISt11range_error@@GLIBCXX_3.4
++OBJECT:12:_ZTISt11regex_error@@GLIBCXX_3.4.15
++OBJECT:12:_ZTISt12bad_weak_ptr@@GLIBCXX_3.4.15
++OBJECT:12:_ZTISt12ctype_bynameIcE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt12ctype_bynameIwE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt12domain_error@@GLIBCXX_3.4
++OBJECT:12:_ZTISt12future_error@@GLIBCXX_3.4.14
++OBJECT:12:_ZTISt12length_error@@GLIBCXX_3.4
++OBJECT:12:_ZTISt12out_of_range@@GLIBCXX_3.4
++OBJECT:12:_ZTISt12strstreambuf@@GLIBCXX_3.4
++OBJECT:12:_ZTISt12system_error@@GLIBCXX_3.4.11
++OBJECT:12:_ZTISt13bad_exception@@GLIBCXX_3.4
++OBJECT:12:_ZTISt13basic_filebufIcSt11char_traitsIcEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt13basic_filebufIwSt11char_traitsIwEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt13basic_fstreamIcSt11char_traitsIcEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt13basic_fstreamIwSt11char_traitsIwEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt13runtime_error@@GLIBCXX_3.4
++OBJECT:12:_ZTISt14basic_ifstreamIcSt11char_traitsIcEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt14basic_ifstreamIwSt11char_traitsIwEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt14basic_ofstreamIcSt11char_traitsIcEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt14basic_ofstreamIwSt11char_traitsIwEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt14codecvt_bynameIcc11__mbstate_tE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt14codecvt_bynameIwc11__mbstate_tE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt14collate_bynameIcE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt14collate_bynameIwE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt14overflow_error@@GLIBCXX_3.4
++OBJECT:12:_ZTISt15basic_stringbufIcSt11char_traitsIcESaIcEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt15basic_stringbufIwSt11char_traitsIwESaIwEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt15messages_bynameIcE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt15messages_bynameIwE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt15numpunct_bynameIcE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt15numpunct_bynameIwE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt15underflow_error@@GLIBCXX_3.4
++OBJECT:12:_ZTISt16invalid_argument@@GLIBCXX_3.4
++OBJECT:12:_ZTISt17bad_function_call@@GLIBCXX_3.4.15
++OBJECT:12:_ZTISt17moneypunct_bynameIcLb0EE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt17moneypunct_bynameIcLb1EE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt17moneypunct_bynameIwLb0EE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt17moneypunct_bynameIwLb1EE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt18basic_stringstreamIcSt11char_traitsIcESaIcEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt18basic_stringstreamIwSt11char_traitsIwESaIwEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt19basic_istringstreamIcSt11char_traitsIcESaIcEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt19basic_istringstreamIwSt11char_traitsIwESaIwEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt19basic_ostringstreamIcSt11char_traitsIcESaIcEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt19basic_ostringstreamIwSt11char_traitsIwESaIwEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt5ctypeIwE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt7codecvtIcc11__mbstate_tE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt7codecvtIwc11__mbstate_tE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt7collateIcE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt7collateIwE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt8bad_cast@@GLIBCXX_3.4
++OBJECT:12:_ZTISt8numpunctIcE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt8numpunctIwE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt9bad_alloc@@GLIBCXX_3.4
++OBJECT:12:_ZTISt9basic_iosIcSt11char_traitsIcEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt9basic_iosIwSt11char_traitsIwEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@@GLIBCXX_3.4
++OBJECT:12:_ZTISt9strstream@@GLIBCXX_3.4
++OBJECT:12:_ZTSSt5ctypeIcE@@GLIBCXX_3.4
++OBJECT:12:_ZTSSt5ctypeIwE@@GLIBCXX_3.4
++OBJECT:12:_ZTSSt8bad_cast@@GLIBCXX_3.4
++OBJECT:12:_ZTSSt8ios_base@@GLIBCXX_3.4
++OBJECT:13:_ZTSSt9bad_alloc@@GLIBCXX_3.4
++OBJECT:13:_ZTSSt9exception@@GLIBCXX_3.4
++OBJECT:13:_ZTSSt9strstream@@GLIBCXX_3.4
++OBJECT:13:_ZTSSt9time_base@@GLIBCXX_3.4
++OBJECT:13:_ZTSSt9type_info@@GLIBCXX_3.4
++OBJECT:140:_ZSt4cerr@@GLIBCXX_3.4
++OBJECT:140:_ZSt4clog@@GLIBCXX_3.4
++OBJECT:140:_ZSt4cout@@GLIBCXX_3.4
++OBJECT:144:_ZSt3cin@@GLIBCXX_3.4
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++OBJECT:144:_ZSt5wclog@@GLIBCXX_3.4
++OBJECT:144:_ZSt5wcout@@GLIBCXX_3.4
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++OBJECT:14:_ZTSSt7collateIcE@@GLIBCXX_3.4
++OBJECT:14:_ZTSSt7collateIwE@@GLIBCXX_3.4
++OBJECT:15:_ZTSSt10bad_typeid@@GLIBCXX_3.4
++OBJECT:15:_ZTSSt10ctype_base@@GLIBCXX_3.4
++OBJECT:15:_ZTSSt10istrstream@@GLIBCXX_3.4
++OBJECT:15:_ZTSSt10lock_error@@GLIBCXX_3.4.11
++OBJECT:15:_ZTSSt10money_base@@GLIBCXX_3.4
++OBJECT:15:_ZTSSt10ostrstream@@GLIBCXX_3.4
++OBJECT:15:_ZTSSt8messagesIcE@@GLIBCXX_3.4
++OBJECT:15:_ZTSSt8messagesIwE@@GLIBCXX_3.4
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++OBJECT:58:_ZTSSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@@GLIBCXX_3.4
++OBJECT:59:_ZTSSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@@GLIBCXX_3.4
++OBJECT:59:_ZTSSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@@GLIBCXX_3.4
++OBJECT:59:_ZTSSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@@GLIBCXX_3.4
++OBJECT:59:_ZTSSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@@GLIBCXX_3.4
++OBJECT:60:_ZTSSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@@GLIBCXX_3.4
++OBJECT:60:_ZTSSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@@GLIBCXX_3.4
++OBJECT:60:_ZTSSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@@GLIBCXX_3.4
++OBJECT:60:_ZTSSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@@GLIBCXX_3.4
++OBJECT:60:_ZTVSd@@GLIBCXX_3.4
++OBJECT:60:_ZTVSt13basic_fstreamIcSt11char_traitsIcEE@@GLIBCXX_3.4
++OBJECT:60:_ZTVSt13basic_fstreamIwSt11char_traitsIwEE@@GLIBCXX_3.4
++OBJECT:60:_ZTVSt14basic_iostreamIwSt11char_traitsIwEE@@GLIBCXX_3.4
++OBJECT:60:_ZTVSt18basic_stringstreamIcSt11char_traitsIcESaIcEE@@GLIBCXX_3.4
++OBJECT:60:_ZTVSt18basic_stringstreamIwSt11char_traitsIwESaIwEE@@GLIBCXX_3.4
++OBJECT:60:_ZTVSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@@GLIBCXX_3.4
++OBJECT:60:_ZTVSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@@GLIBCXX_3.4
++OBJECT:60:_ZTVSt9strstream@@GLIBCXX_3.4
++OBJECT:64:_ZTVN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEEE@@GLIBCXX_3.4
++OBJECT:64:_ZTVN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEEE@@GLIBCXX_3.4
++OBJECT:64:_ZTVSt12ctype_bynameIwE@@GLIBCXX_3.4
++OBJECT:64:_ZTVSt12strstreambuf@@GLIBCXX_3.4
++OBJECT:64:_ZTVSt13basic_filebufIcSt11char_traitsIcEE@@GLIBCXX_3.4
++OBJECT:64:_ZTVSt13basic_filebufIwSt11char_traitsIwEE@@GLIBCXX_3.4
++OBJECT:64:_ZTVSt15basic_streambufIcSt11char_traitsIcEE@@GLIBCXX_3.4
++OBJECT:64:_ZTVSt15basic_streambufIwSt11char_traitsIwEE@@GLIBCXX_3.4
++OBJECT:64:_ZTVSt15basic_stringbufIcSt11char_traitsIcESaIcEE@@GLIBCXX_3.4
++OBJECT:64:_ZTVSt15basic_stringbufIwSt11char_traitsIwESaIwEE@@GLIBCXX_3.4
++OBJECT:64:_ZTVSt21__ctype_abstract_baseIcE@@GLIBCXX_3.4
++OBJECT:64:_ZTVSt21__ctype_abstract_baseIwE@@GLIBCXX_3.4
++OBJECT:64:_ZTVSt5ctypeIwE@@GLIBCXX_3.4
++OBJECT:67:_ZTSSt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@@GLIBCXX_3.4
++OBJECT:67:_ZTSSt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@@GLIBCXX_3.4
++OBJECT:67:_ZTSSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@@GLIBCXX_3.4
++OBJECT:67:_ZTSSt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@@GLIBCXX_3.4
++OBJECT:8:_ZGVNSt10moneypunctIcLb0EE2idE@@GLIBCXX_3.4
++OBJECT:8:_ZGVNSt10moneypunctIcLb1EE2idE@@GLIBCXX_3.4
++OBJECT:8:_ZGVNSt10moneypunctIwLb0EE2idE@@GLIBCXX_3.4
++OBJECT:8:_ZGVNSt10moneypunctIwLb1EE2idE@@GLIBCXX_3.4
++OBJECT:8:_ZGVNSt11__timepunctIcE2idE@@GLIBCXX_3.4
++OBJECT:8:_ZGVNSt11__timepunctIwE2idE@@GLIBCXX_3.4
++OBJECT:8:_ZGVNSt7collateIcE2idE@@GLIBCXX_3.4
++OBJECT:8:_ZGVNSt7collateIwE2idE@@GLIBCXX_3.4
++OBJECT:8:_ZGVNSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@@GLIBCXX_3.4
++OBJECT:8:_ZGVNSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@@GLIBCXX_3.4
++OBJECT:8:_ZGVNSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@@GLIBCXX_3.4
++OBJECT:8:_ZGVNSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@@GLIBCXX_3.4
++OBJECT:8:_ZGVNSt8messagesIcE2idE@@GLIBCXX_3.4
++OBJECT:8:_ZGVNSt8messagesIwE2idE@@GLIBCXX_3.4
++OBJECT:8:_ZGVNSt8numpunctIcE2idE@@GLIBCXX_3.4
++OBJECT:8:_ZGVNSt8numpunctIwE2idE@@GLIBCXX_3.4
++OBJECT:8:_ZGVNSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@@GLIBCXX_3.4
++OBJECT:8:_ZGVNSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@@GLIBCXX_3.4
++OBJECT:8:_ZGVNSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@@GLIBCXX_3.4
++OBJECT:8:_ZGVNSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@@GLIBCXX_3.4
++OBJECT:8:_ZGVNSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@@GLIBCXX_3.4
++OBJECT:8:_ZGVNSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@@GLIBCXX_3.4
++OBJECT:8:_ZGVNSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@@GLIBCXX_3.4
++OBJECT:8:_ZGVNSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@@GLIBCXX_3.4
++OBJECT:8:_ZTIDd@@CXXABI_1.3.4
++OBJECT:8:_ZTIDe@@CXXABI_1.3.4
++OBJECT:8:_ZTIDf@@CXXABI_1.3.4
++OBJECT:8:_ZTIDi@@CXXABI_1.3.3
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++OBJECT:8:_ZTINSt6locale5facetE@@GLIBCXX_3.4
++OBJECT:8:_ZTISt10ctype_base@@GLIBCXX_3.4
++OBJECT:8:_ZTISt10money_base@@GLIBCXX_3.4
++OBJECT:8:_ZTISt12codecvt_base@@GLIBCXX_3.4
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++OBJECT:8:_ZTISt16nested_exception@@CXXABI_1.3.5
++OBJECT:8:_ZTISt8ios_base@@GLIBCXX_3.4
++OBJECT:8:_ZTISt9exception@@GLIBCXX_3.4
++OBJECT:8:_ZTISt9time_base@@GLIBCXX_3.4
++OBJECT:8:_ZTISt9type_info@@GLIBCXX_3.4
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++OBJECT:8:_ZTIb@@CXXABI_1.3
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++OBJECT:8:_ZTIe@@CXXABI_1.3
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++OBJECT:8:_ZTIi@@CXXABI_1.3
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++OBJECT:8:_ZTIl@@CXXABI_1.3
++OBJECT:8:_ZTIm@@CXXABI_1.3
++OBJECT:8:_ZTIn@@CXXABI_1.3.5
++OBJECT:8:_ZTIo@@CXXABI_1.3.5
++OBJECT:8:_ZTIs@@CXXABI_1.3
++OBJECT:8:_ZTIt@@CXXABI_1.3
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++OBJECT:8:_ZTIw@@CXXABI_1.3
++OBJECT:8:_ZTIx@@CXXABI_1.3
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++OBJECT:8:_ZTTSo@@GLIBCXX_3.4
++OBJECT:8:_ZTTSt13basic_istreamIwSt11char_traitsIwEE@@GLIBCXX_3.4
++OBJECT:8:_ZTTSt13basic_ostreamIwSt11char_traitsIwEE@@GLIBCXX_3.4
++TLS:4:_ZSt11__once_call@@GLIBCXX_3.4.11
++TLS:4:_ZSt15__once_callable@@GLIBCXX_3.4.11
diff --git a/4.7.0/gentoo/92_all_freebsd-pie.patch b/4.7.0/gentoo/92_all_freebsd-pie.patch
new file mode 100644
index 0000000..4905db7
--- /dev/null
+++ b/4.7.0/gentoo/92_all_freebsd-pie.patch
@@ -0,0 +1,71 @@
+https://bugs.gentoo.org/415185
+http://gcc.gnu.org/ml/gcc-patches/2012-05/msg00555.html
+
+From: Alexis Ballier <aballier@gentoo.org>
+To: gcc-patches@gcc.gnu.org
+Cc: Alexis Ballier <aballier@gentoo.org>
+Date: Tue, 8 May 2012 09:53:43 -0400
+Subject: [PATCH] gcc/config/freebsd-spec.h: Fix building PIE executables. Link them with crt{begin,end}S.o and Scrt1.o which are PIC instead of crt{begin,end}.o and crt1.o which are not. Spec synced from gnu-user.h.
+
+gcc/config/i386/freebsd.h: Likewise.
+---
+ gcc/config/freebsd-spec.h |    9 +++------
+ gcc/config/i386/freebsd.h |    9 +++------
+ 2 files changed, 6 insertions(+), 12 deletions(-)
+
+diff --git a/gcc/config/freebsd-spec.h b/gcc/config/freebsd-spec.h
+index 770a3d1..2808582 100644
+--- a/gcc/config/freebsd-spec.h
++++ b/gcc/config/freebsd-spec.h
+@@ -64,11 +64,8 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ 	before entering `main'.  */
+    
+ #define FBSD_STARTFILE_SPEC \
+-  "%{!shared: \
+-     %{pg:gcrt1.o%s} %{!pg:%{p:gcrt1.o%s} \
+-		       %{!p:%{profile:gcrt1.o%s} \
+-			 %{!profile:crt1.o%s}}}} \
+-   crti.o%s %{!shared:crtbegin.o%s} %{shared:crtbeginS.o%s}"
++  "%{!shared: %{pg|p|profile:gcrt1.o%s;pie:Scrt1.o%s;:crt1.o%s}} \
++   crti.o%s %{shared|pie:crtbeginS.o%s;:crtbegin.o%s}"
+ 
+ /* Provide a ENDFILE_SPEC appropriate for FreeBSD.  Here we tack on
+    the magical crtend.o file (see crtstuff.c) which provides part of 
+@@ -77,7 +74,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ 	`crtn.o'.  */
+ 
+ #define FBSD_ENDFILE_SPEC \
+-  "%{!shared:crtend.o%s} %{shared:crtendS.o%s} crtn.o%s"
++  "%{shared|pie:crtendS.o%s;:crtend.o%s} crtn.o%s"
+ 
+ /* Provide a LIB_SPEC appropriate for FreeBSD as configured and as
+    required by the user-land thread model.  Before __FreeBSD_version
+diff --git a/gcc/config/i386/freebsd.h b/gcc/config/i386/freebsd.h
+index 649274d..dd69e43 100644
+--- a/gcc/config/i386/freebsd.h
++++ b/gcc/config/i386/freebsd.h
+@@ -67,11 +67,8 @@ along with GCC; see the file COPYING3.  If not see
+    
+ #undef	STARTFILE_SPEC
+ #define STARTFILE_SPEC \
+-  "%{!shared: \
+-     %{pg:gcrt1.o%s} %{!pg:%{p:gcrt1.o%s} \
+-		       %{!p:%{profile:gcrt1.o%s} \
+-			 %{!profile:crt1.o%s}}}} \
+-   crti.o%s %{!shared:crtbegin.o%s} %{shared:crtbeginS.o%s}"
++  "%{!shared: %{pg|p|profile:gcrt1.o%s;pie:Scrt1.o%s;:crt1.o%s}} \
++   crti.o%s %{shared|pie:crtbeginS.o%s;:crtbegin.o%s}"
+ 
+ /* Provide a ENDFILE_SPEC appropriate for FreeBSD.  Here we tack on
+    the magical crtend.o file (see crtstuff.c) which provides part of 
+@@ -81,7 +78,7 @@ along with GCC; see the file COPYING3.  If not see
+ 
+ #undef	ENDFILE_SPEC
+ #define ENDFILE_SPEC \
+-  "%{!shared:crtend.o%s} %{shared:crtendS.o%s} crtn.o%s"
++  "%{shared|pie:crtendS.o%s;:crtend.o%s} crtn.o%s"
+ 
+ /* Provide a LINK_SPEC appropriate for FreeBSD.  Here we provide support
+    for the special GCC options -static and -shared, which allow us to
+-- 
+1.7.8.6
diff --git a/4.7.0/gentoo/README.history b/4.7.0/gentoo/README.history
new file mode 100644
index 0000000..a104f4a
--- /dev/null
+++ b/4.7.0/gentoo/README.history
@@ -0,0 +1,22 @@
+1.0		[pending]
+	+ 03_all_java-nomulti.patch
+	X 08_all_cross-compile.patch
+	+ 10_all_default-fortify-source.patch
+	+ 11_all_default-warn-format-security.patch
+	U 12_all_default-warn-trampolines.patch
+	+ 15_all_libgomp-Werror.patch
+	U 25_all_alpha-mieee-default.patch
+	+ 26_all_alpha-asm-mcpu.patch
+	+ 29_all_arm_armv4t-default.patch
+	+ 33_all_armhf.patch
+	U 34_all_ia64_note.GNU-stack.patch
+	+ 38_all_sh_pr24836_all-archs.patch
+	+ 42_all_superh_default-multilib.patch
+	+ 50_all_libiberty-asprintf.patch
+	+ 51_all_libiberty-pic.patch
+	+ 52_all_netbsd-Bsymbolic.patch
+	+ 64_all_gcc-hppa-64bit-pr52408.patch
+	+ 74_all_gcc46_cloog-dl.patch
+	+ 76_all_4.7.0_c-family-headers.patch
+	+ 80_all_gcc-4.6-x32.patch
+	+ 92_all_freebsd-pie.patch
diff --git a/4.7.0/uclibc/90_all_100-uclibc-conf.patch b/4.7.0/uclibc/90_all_100-uclibc-conf.patch
new file mode 100644
index 0000000..cca8c82
--- /dev/null
+++ b/4.7.0/uclibc/90_all_100-uclibc-conf.patch
@@ -0,0 +1,33 @@
+--- gcc/gcc/config/--- gcc/contrib/regression/objs-gcc.sh
++++ gcc/contrib/regression/objs-gcc.sh
+@@ -105,6 +105,10 @@
+  then
+   make all-gdb all-dejagnu all-ld || exit 1
+   make install-gdb install-dejagnu install-ld || exit 1
++elif [ $H_REAL_TARGET = $H_REAL_HOST -a $H_REAL_TARGET = i686-pc-linux-uclibc ]
++ then
++  make all-gdb all-dejagnu all-ld || exit 1
++  make install-gdb install-dejagnu install-ld || exit 1
+ elif [ $H_REAL_TARGET = $H_REAL_HOST ] ; then
+   make bootstrap || exit 1
+   make install || exit 1
+--- gcc/libjava/classpath/ltconfig
++++ gcc/libjava/classpath/ltconfig
+@@ -603,7 +603,7 @@
+ 
+ # Transform linux* to *-*-linux-gnu*, to support old configure scripts.
+ case $host_os in
+-linux-gnu*) ;;
++linux-gnu*|linux-uclibc*) ;;
+ linux*) host=`echo $host | sed 's/^\(.*-.*-linux\)\(.*\)$/\1-gnu\2/'`
+ esac
+ 
+@@ -1251,7 +1251,7 @@
+   ;;
+ 
+ # This must be Linux ELF.
+-linux-gnu*)
++linux*)
+   version_type=linux
+   need_lib_prefix=no
+   need_version=no
diff --git a/4.7.0/uclibc/90_all_301-missing-execinfo_h.patch b/4.7.0/uclibc/90_all_301-missing-execinfo_h.patch
new file mode 100644
index 0000000..0e2092f
--- /dev/null
+++ b/4.7.0/uclibc/90_all_301-missing-execinfo_h.patch
@@ -0,0 +1,11 @@
+--- gcc-4.0.0/boehm-gc/include/gc.h-orig	2005-04-28 22:28:57.000000000 -0500
++++ gcc-4.0.0/boehm-gc/include/gc.h	2005-04-28 22:30:38.000000000 -0500
+@@ -500,7 +500,7 @@
+ #ifdef __linux__
+ # include <features.h>
+ # if (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 1 || __GLIBC__ > 2) \
+-     && !defined(__ia64__)
++     && !defined(__ia64__) && !defined(__UCLIBC__)
+ #   ifndef GC_HAVE_BUILTIN_BACKTRACE
+ #     define GC_HAVE_BUILTIN_BACKTRACE
+ #   endif
diff --git a/4.7.0/uclibc/90_all_302-c99-snprintf.patch b/4.7.0/uclibc/90_all_302-c99-snprintf.patch
new file mode 100644
index 0000000..ba51a0e
--- /dev/null
+++ b/4.7.0/uclibc/90_all_302-c99-snprintf.patch
@@ -0,0 +1,13 @@
+Index: gcc-4.3.0/libstdc++-v3/include/c_global/cstdio
+===================================================================
+--- gcc-4.3.0/libstdc++-v3/include/c_global/cstdio	(revision 129202)
++++ gcc-4.3.0/libstdc++-v3/include/c_global/cstdio	(working copy)
+@@ -144,7 +144,7 @@
+ 
+ _GLIBCXX_END_NAMESPACE
+ 
+-#if _GLIBCXX_USE_C99
++#if _GLIBCXX_USE_C99 || defined __UCLIBC__
+ 
+ #undef snprintf
+ #undef vfscanf
diff --git a/4.7.0/uclibc/90_all_305-libmudflap-susv3-legacy.patch b/4.7.0/uclibc/90_all_305-libmudflap-susv3-legacy.patch
new file mode 100644
index 0000000..374b1f8
--- /dev/null
+++ b/4.7.0/uclibc/90_all_305-libmudflap-susv3-legacy.patch
@@ -0,0 +1,49 @@
+Index: gcc-4.2/libmudflap/mf-hooks2.c
+===================================================================
+--- gcc-4.2/libmudflap/mf-hooks2.c	(revision 119834)
++++ gcc-4.2/libmudflap/mf-hooks2.c	(working copy)
+@@ -427,7 +427,7 @@
+ {
+   TRACE ("%s\n", __PRETTY_FUNCTION__);
+   MF_VALIDATE_EXTENT(s, n, __MF_CHECK_WRITE, "bzero region");
+-  bzero (s, n);
++  memset (s, 0, n);
+ }
+ 
+ 
+@@ -437,7 +437,7 @@
+   TRACE ("%s\n", __PRETTY_FUNCTION__);
+   MF_VALIDATE_EXTENT(src, n, __MF_CHECK_READ, "bcopy src");
+   MF_VALIDATE_EXTENT(dest, n, __MF_CHECK_WRITE, "bcopy dest");
+-  bcopy (src, dest, n);
++  memmove (dest, src, n);
+ }
+ 
+ 
+@@ -447,7 +447,7 @@
+   TRACE ("%s\n", __PRETTY_FUNCTION__);
+   MF_VALIDATE_EXTENT(s1, n, __MF_CHECK_READ, "bcmp 1st arg");
+   MF_VALIDATE_EXTENT(s2, n, __MF_CHECK_READ, "bcmp 2nd arg");
+-  return bcmp (s1, s2, n);
++  return n == 0 ? 0 : memcmp (s1, s2, n);
+ }
+ 
+ 
+@@ -456,7 +456,7 @@
+   size_t n = strlen (s);
+   TRACE ("%s\n", __PRETTY_FUNCTION__);
+   MF_VALIDATE_EXTENT(s, CLAMPADD(n, 1), __MF_CHECK_READ, "index region");
+-  return index (s, c);
++  return strchr (s, c);
+ }
+ 
+ 
+@@ -465,7 +465,7 @@
+   size_t n = strlen (s);
+   TRACE ("%s\n", __PRETTY_FUNCTION__);
+   MF_VALIDATE_EXTENT(s, CLAMPADD(n, 1), __MF_CHECK_READ, "rindex region");
+-  return rindex (s, c);
++  return strrchr (s, c);
+ }
+ 
+ /* XXX:  stpcpy, memccpy */