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| author |   Luca Barbato <lu_zero@gentoo.org> | 2007-06-08 23:15:28 +0000 |
|---|---|---|
| committer | Luca Barbato <lu_zero@gentoo.org> | 2007-06-08 23:15:28 +0000 |
| commit | 9bf7558ea1fc74c9ca67a2da6258625c1cdb912e (patch) | |
| tree | 4ba6c6c5cda5e614a2ea783ba7d3d5f2a9164e93 /dev-libs/libatomic_ops/files/libatomic_ops-1.2-ppc64-load_acquire.patch | |
| parent | Cleanup. (diff) | |
| download | historical-9bf7558ea1fc74c9ca67a2da6258625c1cdb912e.tar.gz historical-9bf7558ea1fc74c9ca67a2da6258625c1cdb912e.tar.bz2 historical-9bf7558ea1fc74c9ca67a2da6258625c1cdb912e.zip | |
Marked ~ppc ~ppc64
Package-Manager: portage-2.1.2.9
Diffstat (limited to 'dev-libs/libatomic_ops/files/libatomic_ops-1.2-ppc64-load_acquire.patch')
| -rw-r--r-- | dev-libs/libatomic_ops/files/libatomic_ops-1.2-ppc64-load_acquire.patch | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/dev-libs/libatomic_ops/files/libatomic_ops-1.2-ppc64-load_acquire.patch b/dev-libs/libatomic_ops/files/libatomic_ops-1.2-ppc64-load_acquire.patch new file mode 100644 index 000000000000..3d09b3e9ae87 --- /dev/null +++ b/dev-libs/libatomic_ops/files/libatomic_ops-1.2-ppc64-load_acquire.patch @@ -0,0 +1,46 @@ +--- src/atomic_ops/sysdeps/gcc/powerpc.h 2006-03-28 22:49:14.000000000 +0000 ++++ /tmp/powerpc.h 2007-06-08 23:10:07.000000000 +0000 +@@ -63,6 +63,8 @@ + /* seems to be that a data dependent branch followed by an isync is */ + /* cheaper. And the documentation is fairly explicit that this also */ + /* has acquire semantics. */ ++/* ppc64 can live with the load+lwsync */ ++#if defined(__powerpc64__) || defined(__ppc64__) || defined(__64BIT__) + AO_INLINE AO_t + AO_load_acquire(volatile AO_t *addr) + { +@@ -72,7 +74,7 @@ + /* registers. I always got "impossible constraint" when I */ + /* tried the "y" constraint. */ + __asm__ __volatile__ ( +- "lwz %0,%1\n" ++ "ld %0,%1\n" + "cmpw cr7,%0,%0\n" + "bne- cr7,1f\n" + "1: isync\n" +@@ -80,7 +82,25 @@ + : "m"(*addr) : "memory", "cc"); + return result; + } ++#else ++AO_INLINE AO_t ++AO_load_acquire(volatile AO_t *addr) ++{ ++ AO_t result; + ++ /* FIXME: We should get gcc to allocate one of the condition */ ++ /* registers. I always got "impossible constraint" when I */ ++ /* tried the "y" constraint. */ ++ __asm__ __volatile__ ( ++ "lwz %0,%1\n" ++ "cmpw cr7,%0,%0\n" ++ "bne- cr7,1f\n" ++ "1: isync\n" ++ : "=r" (result) ++ : "m"(*addr) : "memory", "cc"); ++ return result; ++} ++#endif + #define AO_HAVE_load_acquire + + /* We explicitly specify store_release, since it relies */ |