summaryrefslogtreecommitdiff
blob: a4ceecd36839f43af1ef07cb6e0b86588bb575b1 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
DEFINED_PHASES=install prepare
DEPEND=app-arch/bzip2 sys-libs/readline sys-libs/zlib
DESCRIPTION=A Verilog simulation and synthesis tool
EAPI=4
HOMEPAGE=http://iverilog.icarus.com/
IUSE=examples
KEYWORDS=amd64 ppc sparc x86
LICENSE=GPL-2
RDEPEND=app-arch/bzip2 sys-libs/readline sys-libs/zlib
SLOT=0
SRC_URI=ftp://icarus.com/pub/eda/verilog/v0.9/verilog-0.9.6.tar.gz
_eclasses_=desktop	7fd20552ce4cc97e8acb132a499a7dd8	epatch	ed88001f77c6dd0d5f09e45c1a5b480e	estack	686eaab303305a908fd57b2fd7617800	eutils	fcb2aa98e1948b835b5ae66ca52868c5	ltprune	2729691420b6deeda2a90b1f1183fb55	multilib	ba693a7065ee4edc78b3ea02a015bcad	preserve-libs	ef207dc62baddfddfd39a164d9797648	toolchain-funcs	d3e75048a89c0445838d2f44e5c65d97	vcs-clean	2a0f74a496fa2b1552c4f3398258b7bf
_md5_=6c390db9e7a005dbbc244949cbec6e42